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Technical content

Features

 Input voltage range — 2.3V to 5.5V  Single 300mA (maximum) output  Dropout at 300mA load — 180mV (Typ)  Quiescent supply current — 50μA  Shutdown current — 100nA  Output noise — 100μVRMS /V  Over-temperature protection  Short-circuit protection  Under-voltage lockout  Internal 100Ω output discharge  SC70-5 Package

Applications

 LoRa® sensors, nodes and gateways  IoT low power radio applications  Consumer electronics  Wearable & Portable electronics  GPS devices  Set top boxes/HDTVs  Communication electronics  Industrial electronics SC573 300mA Low-Noise LDO Regulator

Description

SC573 is a low dropout linear voltage regulator designed for use in applications with space constraints and low power requirements. SC573 provides fixed output voltages, delivering up to 300mA of load current. Fixed output voltage eliminates the need for external feedback resistors. The device has an input, output and enable pin. Using the lowest possible input voltage for the output voltage reduces the power los s and improves overall package thermal performance and efficiency. The device has fast turn- on and turn-off voltage slew rate for fast system start up and reset response. Low quiescent current extends battery life. SC573 provide s protection circuitry such as short -circuit protection, under- voltage lockout, and thermal protection to prevent device failures. Stability is maintained by using 1µF capacitors on the output pins. SC70-5 package and small ceramic bypass capacitors minimize the required PCB area. Typical Application Circuit CIN VIN EN EN GND VIN SC573 COUT 1µF 1µF VOUT VOUT

Final Rev 2.1 Pin Configuration Marking Information SC573V18RTRC SC573V33RTRC

Ordering Information

Ordering Info Output Voltage3 Device Marking SC573V33RTRC 3.3V SC5H SC573V18RTRC 1.8V SC5L SC573EVB Evaluation Board (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Pb-free, halogen hree, RohS / WEEE compliant (3) Voltage Options: for additional fixed output voltage options, contact Semtech marketing

Final Rev 2.1 Parameter Symbol Conditions Min Typ Max Units Input Supply Voltage Range V 2.3 5.5 V Output Voltage Accuracy ΔV IOUT =1mA, VIN ≥ Max(VOUT + 1.0V or 2.3V ). +/- 2 Maximum Output Current I 300 mA Dropout Voltage V IOUT = 300mA, VIN = 3.0V to 3.6V 180 450 mV IOUT = 300mA, VIN = 3.0V to 3.6V, -40°C < TA < 85°C 180 400 mV IOUT = 300mA, VIN = 2.3V to 3.0V 300 540 mV IOUT = 300mA, VIN = 2.3V to 3.0V -40°C < TA < 85°C 300 490 mV Shutdown Current I EN=0, 0.1 1.2 μA Quiescent Current I IOUT = 0mA, VEN = VIN µA Load Regulation ΔV IOUT = 1mA to IMAX, -40 °C≤TA ≤85°C mV Line Regulation ΔV IOUT = 1mA, -40 °C ≤ TA ≤85°C 0.02 0.1 %/V Absolute Maximum Ratings Recommended Operating Conditions Thermal Information Thermal Resistance, Junction to Ambient(2) (°C/W ) .. 262 Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114-B. (2) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.

Electrical Characteristics

Unless otherwise noted VVIN = Max[VOUT + 1.0V or 2.3V ], CIN = 1μF, COUT = 1μF, VEN = VVIN, -40 °C < Tj < 125°C. Typical values are at TA = 25°C. All specifications apply to both LDOs unless otherwise noted.

Final Rev 2.1 Electrical Characteristics (continued) Parameter Symbol Conditions Min Typ Max Units Current Limit ILIM 350 550 750 mA Noise(3) eN Rload = 50Ω 10Hz < f < 100kHz 100 μVRMS/V Power Supply Rejection Ratio(3) PSRR IOUT = 5mA, f = 1kHz, dB Under Voltage Lockout VUVL VIN Rising 1.95 2.1 2.25 V UVLO Hysteresis VUVLO-HYS 100 mV Over Temperature Protection Threshold(4) TOT Temperature Rising 150 Over Temperature Threshold Hysteresis VOT-HYS Digital Inputs Logic Input High Threshold VIH VIN = 5.5V 1.2 V Logic Input Low Threshold VIL VIN = 2.5V 0.4 V Logic Input High Current IIH VIN = 5.5V 1.6 μA Logic Input Low Current IIL VIN = 5.5V μA Notes: (1) 50mV per LSB accuracy; when VOUT setting is lower than approximately 1.8V, accuracy specification percentage increases accordingly (2) Dropout voltage is defined as VIN - VOUT , when VOUT is 100mV below the value of VOUT at VIN ≥ Max(VOUT + 1.0V or 2.3V ). (3) Not tested in production, typical performance characteristic based on bench characterization (4) Thermal shutdown does not latch LDO off. Recovery begins if the temperature drops by the hysteresis level.

Final Rev 2.1 Pin Configurations and Descriptions SC573 Pin Name Pin Function

1 VIN Input supply for LDO – Bypass with a 1μF capacitor

2 GND Ground

3 EN Enable for LDO, Internal 5MΩ pull-down resistor

4 GND Ground

5 VOUT LDO Output -- Bypass with a 1μF capacitor

Final Rev 2.1 Block Diagram VREF UVLO O/T Power- ON Logic 1 5 3EN GND VIN VOUT SC573 Current Limit 2,4

Final Rev 2.1 Typical Characteristics Load Regulation (VIN=3.6V, VOUT=3.3V) Load Regulation (VIN=3.6V, VOUT=1.8V) Load Regulation (VIN=5.0V, VOUT=3.3V) Load Regulation (VIN=4.2V, VOUT=1.8V) Line Regulation (VOUT=3.3V, IOUT=150mA) Line Regulation (VOUT=3.3V, IOUT=300mA)

Final Rev 2.1 Typical Characteristics Line Regulation (VOUT=1.8V, IOUT=150mA) Dropout Voltage (VOUT=3.3V, IOUT=50mA) Line Regulation (VOUT=1.8V, IOUT=250mA) Dropout Voltage (VOUT=3.3V, IOUT=150mA) Dropout Voltage (VOUT=3.3V, IOUT=300mA) Dropout vs Load Current (VOUT=3.3V)

Final Rev 2.1 Typical Characteristics Start Up Via VIN (VOUT=3.3V) Start Up (Enable) (VOUT=3.3V) VIN 2V/div VIN 2V/div VOUT 1V/div IOUT 100mA/div VIN = 5V 100us/div VOUT 2V/div EN 2V/div IOUT 150mA/div VIN = 5V 1ms/div IOUT = 300mA IOUT = 300mA Start Up Via VIN (VOUT=1.8V) VIN 2V/div Start Up (Enable) (VOUT=1.8V) VIN 2V/div VOUT 1V/div IOUT 100mA/div VIN = 5V IOUT = 300mA 100us/div VOUT 2V/div EN 2V/div IOUT 150mA/div VIN = 5V IOUT = 300mA 1ms/div VIN 2V/div VOUT 1V/div IOUT 100mA/div Shutdown (VOUT=3.3V) VIN 2V/div VOUT 1V/div IOUT 100mA/div Shutdown (VOUT=1.8V) VIN = 5V IOUT = 300mA 2ms/div VIN = 5V IOUT = 300mA 2ms/div

Final Rev2.1 Typical Waveforms VOUT=3.3V, 0 to 300mA Load Transient VOUT 20mV/div IOUT 100mA/div VIN = 3.6V 200us/div IOUT = 0A to 300mA VOUT=3.3V, 0 to 300mA Load Transient VOUT 20mV/div IOUT 100mA/div VIN = 4.2V IOUT = 0A to 300mA 200us/div VOUT=3.3V, 0 to 300mA Load Transient VOUT 20mV/div IOUT 100mA/div VIN = 5V IOUT = 0A to 300mA 200us/div

Final Rev2.1 Typical Waveforms VOUT=3.3V Noise Spectral Density VIN = 5.4V, VOUT = 3.3V, Load 50 Ohms VOUT=1.8V, PSRR, Iout=30mA

Final Rev2.1 Applications Information General Description SC573 is a linea r regul ator with low dropout voltage, low supply current, and low output noise. The device provides a simple, low cost solution with minimal PCB area. It has a mini ature package size and needs two 1µF 0402 size external capacitors for its input and output. The LDO provides up to 300mA output current. Power On and Off Control and Turn-on Delay SC573 device has an enable pin (EN) th at controls the LDO output. P ulling the enable pin high will enable the device when VIN is above its UVLO level at abou t 2.4V. Pulling this pin low causes the device to shutdown where it typically draws 100nA from the input supply. When the enable pin is connected to the input voltage supply, the device turn-on and turn-off has two voltage thresholds to overcome. At the turn-on event, the enable pin voltage needs to be greater than the enable threshold and the VIN voltage needs to be higher than the UVLO. The higher of the two voltage s, whic h is the UVLO, determine s the turn on tim e. At turn- off, the firs t condition of either enable threshold low or the VIN UVLO will determine the turn-off event. After the enable goes high, the IC has a delay time before the outpu t voltage ramps up. The delay is typicall y between 120µs to 510µs. The 510µs is related to the lower VIN condition. With a 1μF outpu t capaci tor (capaci tor part numbe r: GRM155R61A105kE15) at no load c onditions, the output v oltage ramp time is typically at 15µs. The device has an internal discha rge MOSF ET to discha rge the outpu t voltage when the enable pin is asserted low; the typical discharge time is at 2ms. The enable and disable waveforms are illustrated in Figure 1 , and the Oscilloscope waveform is shown in the Typical Characteristics. Figure 1: Timing Diagram The Output Noise LDO noise gener ally is char acterized th rough noise spectral densi ty (NSD ) and t otal RMS v alue in the frequency band be tween 10 Hz to 100kH z. The noise spectral densi ty can be measu red using a net work analyzer with active probes. The RMS noise value is obtained from the noise spectral density curve by taking the squa re root of the a rea within the f requency range from 10Hz to 100kHz. The no rmalized output noise for SC573 is at a t ypical value of 100µVRMS/V. The generalized output voltage noise can be approximated by: VRMS=VOUT*100 µV. Protection Features SC573 provides protection features to ensure that no damage is incurred in the event of a fault condition. These functions include:

  • Under-Voltage Lockout
  • Over-Temperature Protection
  • Short-Circuit Protection with peak and fold- back current limit

Final Rev2.1 Applications Information (continued) Under-Voltage Lockout The Under- Voltage Lockout (UVLO) circuit protects the device from operating in an unknown state if the input voltage supply is too low. When either V IN drops below the UVLO threshold, as defined in the Electrical Characteristics section, the LDO is disabled. The LDO is re -enabled when V IN is increased above the hysteresis level. When powering up with V IN below the UVLO threshold, the LDO remains disabled. Over-Temperature Protection An internal Over- Temperature (OT) protection circuit monitors the internal junction temperature. When the temperature exceeds the OT threshold as defined in the Electrical Characteristics section, the OT protection dis - ables the corresponding LDO output. When the temperature drops below its hysteresis value, the LDO output will resume. Short-Circuit Protection The output has short-circuit protection with peak current limit and fold back current limit. If the output current exceeds the peak current limit, the output voltage will drop and the output current will be limited to its fold back current limit value. See the waveforms in the typical operation section. If the short circuit is removed or the load current reduces to below the fold back current limit, the LDO output will rise back into regulation. Component Selection SC573 is designed to minimize the PCB solution area. The recommended input and output capacitors are 1μF with 0402 package, part number GRM155R61A105kE15. Although there is no maximum value of output capacitor specified, very large values may increase the rise time of the output voltages without affecting stability. It is recommended that the value of output capacitance be restricted to a maximum of 10μF. Ceramic capacitors of type X5R or X7R should be used because of their low ESR and stable temperature coefficients. Tantalum capacitors and Y5V capacitors are not recommended. Thermal Considerations Although SC573 can provide 300mA of output current, the maximum power dissipation in the device is restricted by the miniature package size. The graph in Figure 2 can be used as a first-order guidelin e to determine whether the input v oltage, output v oltage, output cu rrent, and ambient temperature of the s ystem result in power dissipation within operating limits. Figure 2: Maximum PD vs. TA The following procedure can be f ollowed to determine if the thermal design of the system is adequate. The junc- tion temperature of the SC573 can be determined in k n ow n o p e ra t i n g co n d i t i o n s u s i n g t h e fo l l ow i n g equation: TJ = TA +(PD x θJA) where TJ = Junction Temperature (°C) TA = Ambient Temperature (°C) θJA = Thermal Resistance Junction to Ambient (°C/W ) PD = Power Dissipation (W )

Final Rev2.1 Applications Information (continued) Example A SC573LH is used to provide an output voltage of 3.3V at 150mA. The input voltage is 4.2V, and the ambient temperature of the system is 60°C. = 0.135W and This calculation shows that the junction temperature is about 95°C and is well below the allowed maximum junction temperature of 125°C for this power dissipation. Layout Considerations The diagram in Figure 3 below illustrates proper layout of a circuit. The layout considerations are listed below:

  • Attach pin 2 (GND) of the device to a copper pad with vias connected to the GND plane. This enables better heat transfer from the device to the PCB.
  • Place the input and output capacitors close to the device for optimal transient response and device behavior. Extra copper trace length between the device input and output to the capacitor soldering pad introduces parasitic inductance.
  • Connect all ground connections of the input and output capacitors directly to the ground plane whenever possible to minimize ground potential differences on the PCB. Shown in the evaluation board layout below, the SC573 ground pins, input and output capacitors are all connected to the ground plane through vias. Figure 3 — SC573 Layout Example

Final Rev2.1 Outline Drawing — SC70-5

Final Rev2.1 Land Pattern — SC70-5 DIMENSIONS INCHES Y Z DIM G P X C MILLIMETERS DIMENSIONS INCHES Y Z DIM G P X C MILLIMETERS NOTES: .033 .106 .039 (.073) .026 .016 1.00 (1.85) 0.65 0.40 0.85 2.70 X G Z Y P (C) CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.

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