SC560xEVB

SC560_08 SEMTECH | Alldatasheet

Document overview

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Technical content

Features

Input voltage range — 2.5V to 5.5V Output voltage ranges — 1.2V to 5.0V (each LDO) Maximum output current — 300mA (both LDOs) Dropout at 200mA load — 200mV max. Quiescent supply current — 100μA (both LDOs enabled) Shutdown current — 100nA (typ) Output noise < 50μV RMS (SC560A and fi xed output versions) PSRR < -65dB at 1kHz (SC560A and fi xed output versions) Over-temperature protection Short-circuit protection Under-voltage lockout Power good monitor for output A (SC560C and fi xed output versions) Independent enable/disable for LDOB (SC560B and fi xed output versions) MLPQ-UT8, 1.5mm x 1.5mm x 0.6mm package

Applications

Palmtop computers and handheld instruments TFT/LCD applications Wireless handsets Digital cordless phones and PCS phones Personal communicators Wireless LAN

Description

The SC560 is a family of dual output, ultra-low dropout linear voltage regulators designed for use in battery powered wireless applications. The SC560A, SC560B, and SC560C provide adjustable output voltages that can be set using two external resistors. Fixed output voltages are also available (see ordering information for available combinations). Fixed output devices provide the power- good monitor, independent enable pins, and a bypass pin for low-noise operation All members of the SC560 family require an input voltage level between 2.5V and 5.5V. Output voltages for the adjustable versions can vary between 1.2V and 5.0V. Fixed output voltage options are also chosen from this range. The SC560A provides superior low-noise performance by using an external bypass capacitor connected to pin 7 to fi lter the bandgap reference. The SC560B uses pin 7 as a separate enable pin for the second regulator output so the two outputs can be controlled independently. The SC560C uses this pin to provide a PGOOD output to hold a processor in reset when the voltage on OUTA is not in regulation. All other versions provide all three functions with fi xed output voltages (no feedback pins are provided). The device also provides protection circuitry such as current limiting, under-voltage lockout, and thermal protection to prevent device failures. Stability is maintained by using 1μF capacitors on the output pins. The MLPQ-UT8 package and 0402 ceramic capacitors minimize the required PCB area. CIN 2.2μF OUTA OUTB VIN ENB EN OUTB EN OUTA GND ENB PGOOD BYP VIN SC560D COUTA 1μF COUTB 1μF CBYP 22nF PGOOD Typical Application Circuit March 28, 2008

Ordering Information

SC560xULTRT(1)(2)(3) MLPQ-UT8 1.5×1.5 SC560xEVB(3) Evaluation Board Notes: (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Available in lead-free package only. Device is WEEE and RoHS compliant. (3) The device variant is denoted by the x. TOP VIEW yw Pinout and Voltage Options Device Pin Options Output Voltage Options Part No. CodePin 4 Pin7 Pin 8 V LDOA VLDOB SC560A FBA BYP FBB ADJ ADJ 0A SC560B FBA ENB FBB ADJ ADJ 0B SC560C FBA PGOOD FBB ADJ ADJ 0C SC560D ENB BYP PGOOD 2.8V 1.8V 0D SC560E ENB BYP PGOOD 2.85V 2.85V 0K SC560F ENB BYP PGOOD 2.5V 1.8V 0L SC560G ENB BYP PGOOD 2.8V 1.5V 0U SC560H ENB BYP PGOOD 3.3V 3.3V 0S MLPQ-UT-8; 1.5x1.5, 8 LEAD θJA = 157°C/W 0n = Part No. Code See Pinout and Voltage Options Table for details yw = Datecode

Exceeding the above specifi cations may result in permanent damage to the device or device malfunction. Operation outside of the parameters specifi ed in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114-B. (2) Calculated from package in still air, mounted to 3” x 4.5” , 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. Absolute Maximum Ratings Recommended Operating Conditions Thermal Information Thermal Resistance, Junction to Ambient(2) (°C/W) . . . 157 Unless otherwise noted VIN = 3.6V, CIN = 2.2μF, COUTA = COUTB = 1μF, VEN = VENB = VIN, TA = -40 to +85°C. Typical values are at TA = 25°C. All specifi cations apply to both LDOs unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units Input Supply Voltage Range V IN 2.5 5.5 V Output Voltage V OUTx 1.2 5.0 V Output Voltage Accuracy ΔV OUTx VIN = 2.5V to 5.5V, IOUTx = 0 to 300mA -3 3 % Maximum Output Current I MAX 300 mA Dropout Voltage(1) VD IOUTx = 200mA, VOUTx = 2.5V to 5.0V 100 200 mV Shutdown Current I SD TA = 25°C 0.1 1 μA Quiescent Current I Q IOUTA = IOUTB = 0mA, TA = 25°C 100 μA Load Regulation ΔV LOAD IOUTx = 1mA to IMAX 20 mV Line Regulation ΔV LINE IOUTx = 1mA -6 6 mV Feedback Regulation Voltage(2) VFB 0.985 1 1.015 V Current Limit I LIM 350 850 mA

Electrical Characteristics

Parameter Symbol Conditions Min Typ Max Units Noise(3) eN VIN = 3.7V, IOUTx = 50mA , 10Hz < f < 100kHz, CBYP = 22nF 50 μV RMS VIN = 3.7V, IOUTx = 50mA , 10Hz < f < 100kHz 300 μV RMS Power Supply Rejection Ratio (3) PSRR VIN = 3.7V, IOUTx = 50mA, f = 1kHz, CBYP = 22nF 65 dB VIN = 3.7V, IOUTx = 50mA, f = 1kHz 40 PGOOD Delay(4) tDELAY 160 200 240 ms PGOOD Threshold(4) VTH-PGOOD Percentage of nominal output, VOUTA falling 82 87 92 % Start-Up Time t SU From OFF to 87% VOUTx, IOUTx = 50mA, CBYP = 22nF(2) 1m s Power Up Delay Between LDOA and LDOB(5) tDELAY Delay between VOUTA and VOUTB start-ups 128 μs Under Voltage Lockout V UVLO VIN Rising 2.15 2.25 2.35 V UVLO Hysteresis V UVLO-HYS 100 mV Over Temperature Protection Threshold TOT Temperature Rising 160 °C Over Temperature Hysteresis T OT-HYS 20 °C Digital Inputs Logic Input High Threshold V IH VIN = 5.5V 1.25 V Logic Input Low Threshold V IL VIN = 2.5V 0.4 V Logic Input High Current I IH VIN = 5.5V 1 μA Logic Input Low Current I IL VIN = 5.5V 1 μA Digital Outputs PGOOD Output voltage Low V OL ISINK = 500μA,VIN=3.7V 7 20 mV Electrical Characteristics (continued) Notes: (1) Dropout voltage is defi ned as VIN - VOUTx , when VOUTx is 100mV below the value of VOUTx at VIN = VOUTx + 0.5V. (2) SC560A, SC560B and SC560C only (3) Except SC560B and fi xed output versions (4) Except SC560A and SC560B (5) SC560A and SC560C only

Load Regulation — LDOA 0 50 100 150 200 250 Output Current (mA) Output Voltage Variation (mV) VOUTA = 3.3V, VIN = 3.6V TA=85°C TA=25°C TA=-40°C Line Regulation — LDOA -0.5 0.5 1.5 Input Voltage (V) Output Voltage Variation (mV) VOUTA = 3.3V, IOUTA = 1mA TA=85°C TA=25°C TA=-40°C Line Regulation — LDOB -0.5 0.5 1.5 2.5 Input Voltage (V) Output Voltage Variation (mV) VOUTB = 2.8V, IOUTB = 1mA TA=25°C TA=-40°C TA=85°C Dropout Voltage LDOB 100 150 200 250 300 350 400 Input Voltage (V) VIN - VOUT (mV) VOUTB = 2.8V, IOUTB = 200mA TA=85°C TA=25°C TA=-40°C Dropout Voltage LDOA 100 150 200 250 300 Input Voltage (V) VIN - VOUT (mV) VOUTA = 3.3V, IOUTA = 200mA TA=85°C TA=-40°CTA=25°C Load Regulation — LDOB 0 50 100 150 200 250 Output Current (mA) Output Voltage Variation (mV) VOUTB = 2.8V, VIN = 3.6V TA=85°C TA=25°C TA=-40°C

Typical Characteristics (continued) PSRR vs. Frequency (Both LDOs) -70 -60 -50 -40 -30 -20 -10 10 100 1000 10000 Frequency (Hz) PSRR (dB) VOUT = 2.8V, IO = 50mA Output Noise vs. Load Current (Both LDOs) 0 50 100 150 200 250 Output Current (mA) Output Voltage Noise (μV) T=85°C T=25°C T=-40°C VOUT = 2.8V, VIN=3.7V, CBYP=22nF PSRR vs. Frequency (Both LDOs) -90 -80 -70 -60 -50 -40 -30 -20 -10 10 100 1000 10000 Frequency (Hz) PSRR (dB) VOUT = 2.8V, Io=50mA, CBYP=22nF Output Noise vs. Load Current (Both LDOs) 100 150 200 250 300 350 400 450 0 50 100 150 200 250 Output Current (mA) VOUT = 2.8V, VIN = 3.7V, no CBYP TA=85°C TA=25°C TA=-40°C Output Voltage Noise (μV) Load Transient Response Rising Edge (Both LDOs) VIN = 3.6V, VOUT = 2.8V IOUT=10mA to 200ma (100mA/div) VOUT (10mV/div) Load Transient Response Falling Edge (Both LDOs) VIN = 3.6V, VOUT = 2.8V IOUT=10mA to 200ma (100mA/div)) VOUT (10mV/div)

Pin Confi gurations and Descriptions Pin # Pin Name Pin Function SC560A SC560B SC560C SC560 Fixed Output 1 1 1 1 OUTB Output for LDOB 2 2 2 2 VIN Input supply voltage terminal 3 3 3 3 OUTA Output for LDOA

444 F B A Feedback sense pin for LDOA — Connect this pin to an

external resistor divider to set V OUTA 5 5 5 5 GND Analog and digital ground 666 6 E N Logic input — active HIGH enables both LDOs for the SC560A and SC560C, or LDOA for all other variants. 7 7 BYP LDO bypass output — Bypass with a 22nF capacitor 7 4 ENB Logic input — active HIGH enables LDOB for SC560B and SC560D 7 8 PGOOD Power Good output — monitors the level of LDOA, switches low when the output drops out of regulation.

888 F B B Feedback sense pin for LDOB — Connect this pin to an external

resistor divider to set VOUTB

Block Diagrams (continued) VREF UVLO O/T Power- ON Logic LDOB LDOA EN GND VIN PGOOD OUTA OUTB BYP ENB SC560 – Fixed Output Versions PGOOD Logic VIN VIN VIN VREF UVLO O/T Power- ON Logic LDOB LDOA EN GND VIN PGOOD OUTA OUTB FBB FBA SC560C PGOOD Logic VIN VIN VIN

Applications Information (continued) The values of the resistors in the voltage divider network can be calculated using the equation: REFOUT R RRVV where V REF = 1V. The value of R2 should be 100kΩ or less to ensure noise performance and stability. Values signifi cantly less than 100kΩ will impact the quiescent current. Protection Features The SC560 family provides the following protection features to ensure that no damage is incurred in the event of a fault condition: Under-Voltage Lockout Over-Temperature Protection Short-Circuit Protection Under-Voltage Lockout The Under-Voltage Lockout (UVLO) circuit protects the device from operating in an unknown state if the input voltage supply is too low. When the V IN drops below the UVLO threshold, the LDOs are disabled and PGOOD is held low (SC560C and fi xed output variants only). When V IN is increased above the hysteresis level, the LDOs are re-enabled into their previous states, provided EN has remained high. When powering up with V IN below the UVLO threshold, the LDOs remain disabled and PGOOD is held low (SC560C and fi xed output variants only). Over-Temperature Protection An internal Over-Temperature (OT) protection circuit is provided that monitors the internal junction temperature. When the temperature exceeds the OT threshold as defi ned in the Electrical Characteristics section, the OT protection disables both LDO outputs and holds the PGOOD signal low. When the junction temperature drops below the hysteresis level, the LDOs are re-enabled into their previous states and PGOOD transitions high after a 200ms delay, provided EN has remained high (SC560C and fi xed output variants only). Short-Circuit Protection Each output has short-circuit protection. If the output current exceeds the current limit, the output voltage will drop and the output current will be limited until the load current returns to a specifi ed level. If a short-circuit occurs on the output of LDOA, the output of LDOB will also be disabled until the fault is removed and the load current returns to a specifi ed level. Component Selection A capacitance of 1μF or larger on each output is recommended to ensure stability. Ceramic capacitors of type X5R or X7R should be used because of their low ESR and stable temperature coeffi cients. It is also recommended that the input be bypassed with a 2.2μF, low ESR X5R or X7R capacitor to minimize noise and improve transient response. Note: Tantalum and Y5V capacitors are not recommended. The BYP pin on the SC560D and the fi xed output versions must have a minimum of 22nF connected to ground to meet all noise-sensitive requirements. Increasing the capacitance to 100nF will further improve PSRR and output noise.

While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. The diagram below illustrates proper layout of a circuit using the SC560A. Attach the part to a large copper footprint, to enable better heat transfer from the device on PCBs where there are internal power and ground planes. Place the input, output, and bypass capacitors close to the device for optimal transient response and device behavior. Applications Information (continued) Connect all ground connections directly to the ground plane whenever possible to minimize ground potential diff erences on the PCB. Ensure that the feedback resistors are placed as close as possible to the feedback pins. U1 = SC560A

.059 BSC 1.50 BSC NOTES: .004 .000 .018 (.006) 0.10 .024 .002 0.00 0.45 0.05 0.60 (0.1524) .004 0.10

1.50 BSC

0.40 BSC.016 BSC .014 0.35 .059 BSC COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.2. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).1. INCHES DIMENSIONS NOM e bbb aaa DIM N L E MIN D A MILLIMETERS MAXMINMAX NOM PIN 1 INDICATOR (LASER MARK) DA E B aaa C C SEATING PLANE e bxN LxN bbb C A B N 0.20 0.25 0.17 0.400.300.160.12 A Outline Drawing — MLPQ-UT8

Power Management Products Division

200 Flynn Road, Camarillo, CA 93012

Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com Contact Information SC560 Land Pattern — MLPQ-UT8 INCHES DIMENSIONS P Z X Y C G DIM MILLIMETERS R .004 0.10 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). Y X G Z (G) (Z)2X (C) R P .030 .087 (.057) .028 0.75 2.20 (1.45) 0.70 0.20 0.40.016 .008 THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: