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Technical content
Features
Input Voltage — 4.5V to 27V Output Voltage — Up to 50V Step-up (Boost) Controller Ultra-Fast Transient Response (<00μs) Programmable Switching Frequency Linear Current Sinks
2 Strings, up to 240mA/String
Current Matching ±% Current Accuracy ±2% PWM Dimming Direct PWM Dimming, 000: at KHz Input Dimming Frequency 00Hz-30kHz 5-Bits Analog Dimming I2C Interface Fault Status — Open/Short LED, UVLO, OTP Protection Features Open/Shorted LED(s) and adjustable OVP Over-Temperature and UVLO Shutdown Protection 4mm X 4mm 20-pin QFN Package
Applications
UltrabooksTM, All-in-One PCs, Monitors, Automotive - Display Backlighting Backlighting for Mid-Size Displays
Description
The SC504A is a 2-channel, highly integrated, high-effi - ciency step-up (boost) HB LED driver designed to reduce the thickness of mid-size LCD displays. It features a wide input voltage range (4.5V to 27V), direct PWM dimming, analog dimming, a flexible output configuration, an I 2C interface, and numerous protection features. The SC50 4A exhibits 2% to 4% higher efficiency when using the same size inductors as existing LED drivers. But, unlike existing devices, it can also operate with inductors that are up to 0x smaller without sacrificing efficiency. This part can also use very low-profile inductors (as small as 2.2µH, mm height), which allows LED drivers to be built directly into the LCD panel to enable ultra-thin displays. The boost controller, with programmable switching frequency from 200kHz to 2.2MHz, maximizes efficiency by dynamically minimizing the output voltage while maintaining LED string current accuracy. It provides excellent line and load response with no external com - pensation components. An external resistor adjusts the current from 40-240mA per string. U V LO E -P A DIS E T F S E T S C P SC 5014 AR 3 R 6 F LT C 3 R E F F LT V C C P G N D R 11 R 10 R 1 R 2 O V P IO 2 R 9 R 8 V IN =4.5 to 27 V U p to 240 m A/S tring IO 1 IO 1 IO 2 C 5 R 5 P W M IP W M I S D A S C LF or I 2C E NE N Q 1 R 4 N D R V C S D 1 V O U T up to 50 V V C C = 4.5 to 5.5V Typical Application Circuit
Ordering Information
SC504AMLTRT()(2) MLPQ-20 4×4 SC504AEVB Evaluation Board Notes: () Available in tape and reel only. A reel contains 3,000 devices. (2) Lead-free packaging only. Device is WEEE and RoHS compliant, and halogen free. A G N D O V P15 IO 114 IO 212 IO 211 E N C S P G N D V C C U V LO 1 S C P 2 R E F 3 F S E T 4 N C 5 P W M I IS E T FLT S D A S C L N D R V IO 1 5014 A yyw w xxxxx xxxxx nnnn = Part Number yyww = Date code xxxxx = Semtech Lot No. xxxxx = Semtech Lot No.
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: () Tested according to JEDEC standard JESD22-A4-B. (2) Calculated from package in still air, mounted to 3 x 4.5in, 4-layer FR4 PCB with thermal vias under the exposed pad per JESD5 standards. Absolute Maximum Ratings (refer to PGND) DRVN, OVP , CS, EN, UVLO, SCP , REF, FLT (V) . . -0.3 to +6.0 Recommended Operating Conditions Thermal Information Thermal Resistance, Junction to Ambient(2) (°C/W) . . . . 32 Unless noted otherwise, TA = 25°C for typical, -40°C < TA = TJ < 85°C for min and max. VCC = 5V, RISET = 25.5KΩ, RFSET = 00KΩ. Parameter Symbol Conditions Min Typ Max Units Input Supply VCC Supply Voltage VCC 4.5 5.5 V VCC Under-Voltage Lockout Threshold VCC-UVLO(TH) VCC Voltage Rising 4.2 4.4 V VCC Under-Voltage Lockout Hysteresis VCC-UVLO(HYS) VCC Voltage Falling 80 mV VCC Quiescent Supply Current ICC(Q) EN = 5V, Switching, No Load 2 mA VCC Supply Current in Shutdown ICC(SD) EN = 0V µA VUVLO Under-Voltage Lockout Threshold VUVLO(TH) UVLO Pin Voltage Rising .8 .23 .28 V IUVLO Under-Voltage Lockout Hysteresis IUVLO(HYS) UVLO Pin Voltage Falling 7 0 3 µA VREF Bandgap Voltage VREF .20 .23 .26 V External FET Gate Drive DRVN High Level VDRVN(H) 00mA from DRVN to GND VCC -0.5 VCC -0.2 V DRVN Low Level VDRVN(L) -00mA from DRVN to VCC 0.2 0.5 V DRVN On-Resistance RDRVN DRVN High or Low 2 5 Ω DRVN Sink / Source Current IDRVN DRVN Forced to 2.5V A Boost Converter CS Current Limit Threshold VCS(ILIM) 0.36 0.40 0.44 V Soft-Start Time () tSS From EN to End of Soft-Start 4.4 ms
Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Units Boost Oscillator Frequency FSW RFSET = 00kΩ 0.85 .5 MHz Boost Oscillator Frequency FOSC RFSET Varies 0.2 2.2 MHz Maximum Duty Cycle DMAX 88 92 % Control Signals: EN, PWMI, SDA, SCL High Voltage Threshold VIH VCC = 4.5V to 5.5V 2. V Low Voltage Threshold VIL VCC = 4.5V to 5.5V 0.8 V SDA Output Low VSDA(L) -6mA from VCC to SDA 0.3 V Pin Leakage Current ILEAK VEN = 0V, VPWMI = VISET = VFSET = VSDA = VSCL = 5.0V - µA PWM Dimming Input PWMI Input Dimming Frequency FPWMI 00 30k Hz Over-Voltage Protection OVP Trip Threshold Voltage VOVP(TRIG) OVP Rising . .2 .3 V OVP Hysteresis VOVP(HYS) OVP Falling 0 mV OVP Leakage Current IOVP(LEAK) OVP = 5V 0. µA Current Sink (IO ) IOx Dimming Minimum Pulse Width TPWM(MIN) FPWM(LED) = 00Hz - 30kHz 300 ns ISET pin Voltage VISET .23 V Regulation Voltage VIOn(REG) Voltage of Regulating String 0.9 V Current Sink Disable Threshold VIOn(DIS) Checked at Power-up 0.6 V Current Sink Rise/Fall Time () tRISE/FALL Rising Edge from 0% to 90% of IO(n) 25 ns LED Current Accuracy IOn(ACC%) PWMI = 00%, TA=+25 °C 96 200 204 mA LED Current Matching (2) IOn(MATCH) PWMI = 00%, TA=+25 °C ±.0 % IOn Off Leakage Current IOn(LEAK) PWMI = 0V, EN = 0V, VIO = 25V 0. µA Electrical Characteristics (continued)
Electrical Characteristics (continued) Parameter Symbol Conditions Min Typ Max Units Fault Protection LED Short-Circuit Protection Threshold VIOn(SCP) R4 and R5 (3) 7xVSCP 20xVSCP 23xVSCP V LED Open-Circuit Protection Threshold VIO_OCP 0.2 V LED Short-Circuit Fault Delay tSCP(DELAY) VOVP Set to .5V, FLT Goes Low µs FLT Pin Leakage Current IFLT(LEAK) VEN = 0V, VFLT = 5.0V - µA FLT Output Low VFLT(LOW) -5mA from FLT to VCC 0.3 V Over-Temperature Protection Thermal Shutdown Temperature TOTP 50 °C Thermal Shutdown Hysteresis TOTP-H 0 °C I2C Control Interface: SDA, SCL Timing Specifications SCL Clock Frequency FSCL 400 kHz SCL Clock Low Period tLOW(SCL) .3 µs SCL Clock High Period tHIGH(SCL) 0.6 µs Hold Time Start Condition tHD(START) 0.6 µs SDA Setup Time tSU(SDA) 00 ns SDA Hold Time tHD(SDA) 0 0.9 µs Setup Time Stop Condition tSU(STOP) 0.6 µs Bus Free Time Between Stop & Start tBF .3 µs Notes: () Ensured by design and characterization, not production tested. (2) LED current matching for 2 channels is defined as the largest of the two numbers, i.e., (MAX-AVG)/AVG and (AVG-MIN)/AVG; where MAX is the maximum LED channel current, MIN is the minimum LED channel current and AVG is the average of the 2 LED channel currents. (3) Refer to the application circuit on page 20, Figure 2.
PWM Dimming Linearity(30KHz) ˄˅˃ ˄ˋ˃ ˅ˇ˃ ˜ˢʻ̀˔ʼ ˗̈̇̌ʻʸʼ ˖˛˄ ˖˛˅ CH1 CH2 PWM Dimming Linearity(100Hz) ˄˅˃ ˄ˋ˃ ˅ˇ˃ ˜ˢʻ̀˔ʼ ˗̈̇̌ʻʸʼ ˖˛˄ ˖˛˅ CH1 CH2 ˉˈˉˈ ˉˈˉˈ ˊ˃ˊ˃ ˊ˃ˊ˃ ˊˈˊˈ ˊˈˊˈ ˋ˃ˋ˃ ˋ˃ˋ˃ ˋˈˋˈ ˋˈˋˈ ˌ˃ˌ˃ ˌ˃ˌ˃ ˌˈˌˈ ˌˈˌˈ Backlight Efficiency vs. LED string Current 240mA/CH 120mA/CH Typical Characteristics VIN(V) Backlight Efficiency vs. Input Voltage Backlight Efficiency vs. Input Voltage VIN(V) Backlight Efficiency vs. LED String Current Backlight Efficiency vs. LED String Current LED PWM Dimming Duty Cycle (%) PWM Dimming Linearity PWM Dimming Linearity Efficiency(%)Efficiency(%) Efficiency(%) Iout (mA)Iout (mA) LED PWM Dimming Duty Cycle (%) Efficiency(%) ˋ˃ˋ˃ ˋ˃ˋ˃ ˋˈˋˈ ˋˈˋˈ ˌ˃ˌ˃ ˌ˃ˌ˃ ˌˈˌˈ ˌˈˌˈ ˅ˇ˃̀˔ Backlight Efficiency vs. Input Voltage 240mA/CH 120mA/CH ˋ˃ˋ˃ ˋ˃ˋ˃ ˋˈˋˈ ˋˈˋˈ ˌ˃ˌ˃ ˌ˃ˌ˃ ˌˈˌˈ ˌˈˌˈ ˊ˦ˇˣˊ˦ˇˣˊ˦ˇˣˊ˦ˇˣ Backlight Efficiency vs. Input Voltage 10S4P 7S4P ˉˈˉˈ ˉˈˉˈ ˊ˃ˊ˃ ˊ˃ˊ˃ ˊˈˊˈ ˊˈˊˈ ˋ˃ˋ˃ ˋ˃ˋ˃ ˋˈˋˈ ˋˈˋˈ ˌ˃ˌ˃ ˌ˃ˌ˃ ˌˈˌˈ ˌˈˌˈ Backlight Efficiency vs. LED string Current 240mA/CH 120mA/CH VIN=6V VIN=12V 240mA/CH, 10S2P , 100Hz Dimming 240mA/CH, 10S2P , 30KHz Dimming 10S2P 240mA/CH LED PWM Dimming Duty Cycle (%) LED PWM Dimming Duty Cycle (%)
ILED(mA) DEC IO3+4 Current Accuracy vs. Temperature ˅ˆˇ˅ˆˇ ˅ˆˇ˅ˆˇ ˅ˆˉ˅ˆˉ ˅ˆˉ˅ˆˉ ˅ˆˋ˅ˆˋ ˅ˆˋ˅ˆˋ ˅ˇˇ˅ˇˇ ˅ˇˇ˅ˇˇ ˅ˇˉ˅ˇˉ ˅ˇˉ˅ˇˉ ˅ˇˋ˅ˇˋ ˅ˇˋ˅ˇˋ ˜ˢˆʾˇ˜ˢˆʾˇ˜ˢˆʾˇ˜ˢˆʾˇ ˃˃ ˃˃ Switching Frequency vs. RFSET LED String Current vs. RISET ˃˃ ˃˃ ˈ˃ˈ˃ ˈ˃ˈ˃ LED String Current Matching vs. Temperature ˃ˁˇ˃ˁˇ ˃ˁˇ˃ˁˇ ˃ˁˋ˃ˁˋ ˃ˁˋ˃ˁˋ ˄ˁˉ˄ˁˉ ˄ˁˉ˄ˁˉ LED String Current Matching vs. Temperature LED String Current vs. RISET RFSET(KΩ) Switching Frequency vs. RFSET IDAC Register Value (in decimal format) LED String Current vs. Analog Dimming Control Register (IDAC) Value LED String Current Matching (%) Boost Switching Frequency (KHz) LED String Current (mA) Typical Characteristics (continued) VCC=5V, 240mA/CH RISET(KΩ) LED String Current (mA) LED String Current Accuracy vs Temperature Temperature (°C) LED String Current Accuracy (mA) VCC=5V, 240mA/CH 0.01 0.10 1.00 10.00 100.00 IO(mA) Duty(%) PWM Direct (100Hz, 30KHz) 100Hz 30KHz 100Hz 30KHz LED PWM Dimming Duty Cycle(%) PWM Dimming Linearity Output Current (mA) 240mA/CH, 10S2P
Testing condition: VIN=12V,VCC=5V, LEDs=10S4P@100mA, 1MHz, 25кк кк VIN V_IO1 IOUT VOUT Start-up into Short circuit Protection VIN /FLT IOUT VOUT Testing condition: VIN=12V,VCC=5V, LEDs=10S4P@100mA, 1MHz, 25кк кк , two LEDs short circuit Unused String VIN /FLT IOUT VOUT Testing condition: VIN=12V,VCC=5V, LEDs=10S4P@100mA, 1MHz, 25кк кк ,IO1&IO2 short to GND Start-up into LEDs Open-circuit Protection VIN /FLT IOUT VOUT Testing condition: VIN=12V,VCC=5V, LEDs=10S4P@100mA, 1MHz, 25кк кк ,IO1&IO2 open Time (5ms/div) LED Open Circuit Protection LED Short Circuit Protection Start Up by Vin Two LEDs short Circuit in one string Typical Characteristics (continued) VIN 8V/div. /FLT 5V/div. VOUT 10V/div. IOUT 200mA/div. Time (5ms/div) VIN 8V/div. IOUT 100mA/div. VOUT 10V/div. /FLT 5V/div. Unused String Time (5ms/div) Time (5ms/div) 10S2P , 240mA/CH Load Transient Response Load Transient Response Time (100us/div) Time (100ms/div) Starting with one LED string open-circuit Starting with one unused LED string VIN 8V/div. /FLT 5V/div. VOUT 10V/div. IOUT 200mA/div. PWM(10KHz)=0.5% to 99%, VIN=12V, 200mA/CH X 2 Load Transient Response Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA/CH, 1MHz, PWMI=10KHz, Duty=0.5% to 99% V_IO1 SDA IOUT VOUT VIO1 5V/div. PWMI 6V/div. VOUT 5V/div. IOUT 200mA/div. PWM(10KHz)=99% to 0.3%, VIN=12V, 200mA/CH X 2 VIN 5V/div. IOUT 200mA/div. VOUT 10V/div. VIO1 5V/div. Load Transient Response Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA/CH, 1MHz, PWMI=10KHz, Duty=99% to 0.3% V_IO1 SDA IOUT VOUT PWMI 6V/div. IOUT 200mA/div. VOUT 1V/div. VIO1 5V/div.
Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA/CH, 1MHz, PWMI=30KHz, Duty=4% V_IO1 /FLT IOUT VOUT LED Dimming Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA/CH, 1MHz, PWMI=100Hz, Duty=0.04% V_IO1 /FLT IOUT VOUT Analog Dimming Transient via I2C Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA/CH, 1MHz, 100% to 9.68% V_IO1 SDA IOUT VOUT Analog Dimming Transient via I2C Testing condition: VIN=12V, 25кк кк, LEDs=10S4P@100mA, 1MHz, 0% to 100% V_IO1 SDA IOUT VOUT Time (5ms/div) PWM Dimming Analog Dimming Transient via I2C Analog Dimming Transient via I2C 0% to 100% dimming, 200mA/CH Typical Characteristics (continued) VIO1 5V/div. PWM 6V/div. VOUT 1V/div. IOUT 200mA/div. Time (10us/div) VIO1 3V/div. IOUT 200mA/div. VOUT 1V/div. PWM 6V/div. PWM Dimming Time (100us/div) Time (100us/div) 100% to 9.68% dimming, 200mA/CH Line Transient Response Line Transient Response Time (500us/div) Time (20ms/div) 0.04% dimming@100Hz, VIN=12V, 10S2P , 200mA/CH 4% dimming@30KHz, VIN=12V, 10S2P , 200mA/CH VIO1 1V/div. SDA 6V/div. VOUT 10V/div. IOUT 200mA/div. 7VIN to 18VIN, 200Hz and 100% dimming duty, 200mA/CH Line Transient Response V_IO1 IOUT VIN Vout Testing condition: Vin fluctuation (7V to 18V), PWM dimming Freq.=200Hz, PWM dimming duty=100%; VIN rising time ≈10us, 25кк кк; VIO1 1V/div. IOUT 200mA/div. VOUT 1V/div. VIN 5V/div. 7VIN to 18VIN, 200Hz and 0.5% dimming duty, 200mA/CH SDA 6V/div. IOUT 200mA/div. VOUT 10V/div. VIO1 1V/div. Line Transient Response V_IO1 PWMI VIN Vout Testing condition: Vin fluctuation (7V to 18V), PWM dimming Freq.=200Hz, PWM dimming duty=0.5%; VIN rising time 㻃㻃 㻃㻃10us, 25㷄㷄 㷄㷄; PWM 5V/div. VIN 5V/div. VOUT 1V/div. VIO1 1V/div.
Pin # Pin Name Pin Function UVLO Input under-voltage lockout pin — Device is disabled when this pin is less than .23V (nominal). Add a resistor divider from this pin to the input voltage and AGND, respectively.
2 SCP
Short-circuit LED protection programming pin — Shorted LED protection disables the individual channel when the current sink voltage exceeds the programmed voltage threshold. Adding a resistor divider from this pin to REF and PGND programs the shorted-LED protection up to 20x the VSCP voltage. Pulling the pin high to VCC disables the SCP feature on all channels. 3 REF .23V reference voltage output pin — Connect a µF ceramic bypass capacitor from this pin to ground. 4 FSET Step-up (boost) frequency set pin — Connect a resistor from this pin to ground to set the frequency from 200kHz to 2.2MHz. 5 NC No connect. This can be left floating or connected to GND. 6 SCL I2C serial clock input — This pin must be connected to ground if not used. 7 SDA I2C serial data input — This pin must be connected to ground if not used. 8 ISET LED current programming pin — Connect an external resistor to ground to program the current in the LED strings. For more details please refer to LED String Peak Current Programming on page 3.
9 FLT
Logic low fault status pin — Open-drain output is latched low when fault condition is detected: Open/Short LED, Shorted String, OVP or OTP . Fault status can be reset by removing fault condition(s) and toggling the EN, VCC or UVLO pins. This pin can be left floating if not used. 0 PWMI LED string PWM dimming control input. ~4 IO2 ~ IO Regulated current sink LED channel 2 to channel respectively . Connect the related IO pin to the cathode of the bottom LED in string 2 to string respectively. Connect the related IO pin to ground to disable the related LED string during power on. 5 OVP Over-voltage feedback pin — Over-voltage activated when pin voltage exceeds .2V. Use a resistor divider tied to the output and GND to set the OVP level. 6 CS Step-up (boost) switch current sense pin — Connect a resistor from this pin to ground for current sense - utilized in peak current mode control loop and over-current sense circuitry. 7 PGND Power ground — Tie this pin to the power ground plane close to input and output decoupling capacitors. 8 NDRV Gate drive for the external step-up (boost) N-Channel MOSFET. 9 VCC Input bias voltage supply for the IC — Accepts 4.5-5.5V inputs. Add a µF or larger ceramic bypass capacitor from this pin to ground. 20 EN Logic high enable pin — Pull logic high to enable the device or pull low to disable and maintain low shutdown current. - PAD AGND thermal pad for heatsinking purposes — It should be connected to ground plane for proper circuit operation.
S C_R E F I2C Interface and LE D C ontrol Logic C ontrol Logic F LT O C/S C D etection S C_R E F IO 2 C O M P O S C C LIM + +- P W M C O M P S lope C om p P G N D D C D C B G ILIM O V P
The SC50 4A contains a high frequency, current-mode, internally compensated boost controller with 2 constant current sinks for driving LED strings. The LED current for both strings is programmed by an external resistor. The boost converter operates to maintain minimal required output voltage for regulating the LED current to the pro - grammed value. A typical backlight application uses 3 to 4 LEDs per each string, with current driven up to 240mA. The unique control loop of the SC50 4A allows fast tran- sient response in dealing with line and load disturbances. The SC504A, operating with an external power MOSFET, regulates the boost converter output voltage based on the instantaneous requirement of the 2 string current sources. This provides power to the entire lighting subsys- tem with increased efficiency and reduced component count. It supports PWM dimming frequencies from 00Hz to 30kHz and the supply current is reduced to 2mA typical when both LED strings are off. Start-Up When the EN pin is pulled up high (>2. V), the device is enabled and the UVLO and VCC pin voltages are checked. The VCC voltage has fixed under-voltage rising and falling trip points. If the VCC pin is higher than 4.2V and the UVLO pin voltage is greater than .23V, the SC504A goes into a start-up sequence. The UVLO pin voltage can be used to program the input power source voltage VIN turn-on threshold and its hysteresis (refer to the detailed applica - tion circuit on page 20, Figure 2) as shown by the follow - ing equations: VIN_TurnOn [V] = .23 X (R + R2) / R VIN_Hysteresis [V] = 0-5 X R2 [Ω] In the next phase, the SC50 4A checks each IO pin to determine if the respective LED string is enabled. Each IO pin is pulled up with a 00µA current source. If any IO pin is connected to ground, it will be detected as an unused string, and will be turned off. This unused string checking procedure typically takes ms. After this, the SC50 4A enters into a soft-start sequence. The soft-start function helps to prevent excess inrush current through the input rail during start-up. In the SC504A, the soft-start is implemented by slowly ramping up the reference voltage fed to the error amplifier. This closed loop start-up method allows the output voltage to ramp up without any overshoot. The duration of the soft-start in the SC50 4A is controlled by an internal timing circuit, which is used during start-up and is based on the boost converter switching frequency. For example, with switching frequency at MHz, it is 8ms typical and becomes 4ms typical when the switching frequency is 2MHz. If the PWM voltage goes low while the SC504A is in soft- start operation, the SC504A switches to standby mode, where the external power MOSFET and the LED curr ent sources will be turned off immediately. The internal soft- start timer is turned off and the soft-start value is saved. When the PWM voltage goes high again, the soft-start resumes from the previously saved value. Each LED current source tries to regulate the LED current to its set point. The control loop will regulate the output voltage such that all the IO pin voltages are at least 0.9V typical. Shutdown When the EN pin is pulled down below 0.8V, the device enters into shutdown mode. In this mode, all the internal circuitry is turned off and the supply current is less than µA (max). In the scenario where the EN pin voltage is high, but VCC voltage falls below the respective UVLO threshold, the SC504A goes into a suspend mode. In this mode, all the internal circuitry except the reference and the oscillator are turned off. Thermal Shutdown (TSD) If the thermal shutdown temperature of typical 50°C is reached, the boost converter and all IO current sources are turned off. The FLT pin is forced low in this condition. When the temperature falls below the TSD trip point by 0°C, the SC50 4A will restart following the start-up sequence as described before. The FLT pin is latched and will stay low, it is reset by cycling the EN, VCC or UVLO. Applications Information
Applications Information (continued) Boost Converter Operation The SC504A includes a boost controller with program - mable switching frequency. It applies a current-mode control method with an integrated compensation loop as shown in the diagram below. The clock (see block diagram on page) from the oscillator sets the latch and turns on the external power MOSFET, which serves as the main power switch. The current flowing through this switch is sensed by the current sense resistor in series with the switch. The sensed switch current is summed with the slope-compensated ramp and fed into the modulating input of the PWM comparator. When the modulating ramp intersects the error amplifier output (COMP), the latch is reset and the power MOSFET is turned off. The sense resistor also sets the peak current limit of the power MOSFET, IOCP using the following equation: IOCP[A] = 0.4 / RCS [Ω] E A M in. V oltage D etection B oost O scillator C ontrol Logic C O M P O S C + +- P W M C O M P S lope C om p D C V IN =4.5V to 27 V IO C 5 Q 1 R 4 D 1 LS C S N D R V The current-mode control system contains two loops. For the inner current loop, the error amplifier (EA) output (COMP) controls the peak inductor current. In the outer loop, the EA regulates the output voltage for driving the LED strings. Boost Converter Switching Frequency Selection The resistor between FSET and GND sets the boost con - verter switching frequency (200kHz to 2.2MHz) using the following equation: fSW [kHz] = 05/ RFSET [kΩ] A higher switching frequency allows the use of low-profile height inductors for space-constrained and cost-sensitive applications. Over-Voltage Protection (OVP) The SC504A features programmable output over-voltage protection to prevent damage to the IC and output capaci- tor in the event of a LED string open-circuit. The boost con- verter output voltage is sensed at the OVP pin through the resistor voltage divider. The OVP trip threshold (refer to detailed application circuit on page 20, Figure 2) can be cal- culated using the following equation: OVP Trip Voltage [V] = .2 X (R + R2) / R2 When the OVP pin voltage exceeds .2V, the boost con - verter turns off and the FLT pin is pulled low. When the OVP pin voltage falls below the OVP threshold (falling), the boost converter restarts and the FLT pin is released. There is 0mV hysteresis between the OVP pin threshold (falling) and the OVP pin threshold (rising). This results in an output voltage hysteresis expressed as: Output OVP Hysteresis [mV] = 0 X (R + R2) / R2 LED Current Sink The SC504A provides 2 current sinks and each can sink up to 240mA current. It incorporates LED string short- circuit protection (trip-level programmable; can be dis - abled) and LED string open-circuit protection. LED String Peak Current Programming LED string peak current (at 00% dimming) can be set by selecting resistor RISET, connected between ISET and GND. The relationship between R ISET resistance and single LED string peak current is calculated using the following equation: ILED [mA] = 2 X (036 X .23) / RISET [kΩ] The string current can be programmed up to 240mA. LED Connection Two strings of LEDs can be connected to pin IO and pin IO2. Pins IO,2 showed stay connected. Unused Strings The SC504A may be operated with less than 2 strings. In this mode of operation, the unused IO pin should be con- nected to ground. During start-up, these unused strings are detected and disabled while other active strings work normally, and FLT does not get pulled low.
LED Short-Circuit Protection (SCP) The SC504A features a programmable LED short-circuit protection (SCP). This allows the part to be customized based on the LED forward voltage (VF) mismatches between the LED strings. If one or more LEDs are detected as short- circuited, the corresponding string will be latched off. The voltages on both IO pins are monitored to check if any IO pin exceeds the SCP trip point. The IO voltage for LED string(s) with faulty short-circuit LED(s) will be higher than other normal IO pin voltage. This LED short-circuit protec- tion trip level (see detailed application circuit on page 20, Figure 2) is expressed by the following equation: VSCP_Trip [V] = 20 X (.23 X R4) / (R4 + R5) If any IO pin voltage exceeds the trip voltage, the IO current sink will be latched off and the FL T will go low. This latch can be reset by cycling UVLO, VCC or EN. Other LED string is unaffected and continue in normal operation. This protec- tion will be disabled if SCP is tied to VCC. There is a typical 0μs SCP detection time in PWM dimming applications. If the PWM dimming on-time is less than the SCP detection time, the SCP cannot be enabled. In many applications, LED strings are connected to the IO pins through a mechanical connector, which cannot support an electrical connection at specific times. This connection might cause noise on the IO pins. If this noise is large enough, it may trigger a false SCP mode. Under such condition, a ceramic decoupling capacitor (00pF ~ 8.2nF) between IO pin to ground can help prevent the SC504A from entering the protection mode by false trigger. Or, simply disable this feature by connecting SCP pin to VCC pin. LED Open-Circuit Protection If any LED string becomes open, the respective IO pin voltage will be pulled to ground. Consequently, the inter- nal COMP node (output of error amplifier) is driven high, which causes the boost output voltage to increase. The output voltage will be eventually clamped to a voltage set by the OVP resistor divider. Under this condition, the faulty string is latched off and the FLT pin is pulled low. The boost voltage gets regulated to the voltage required to set all non-faulty IO pins above 0.9V (typ). The other string remain in normal operation. The FLT and the faulty LED Applications Information (continued) current sink latch-off can be reset by cycling UVLO, VCC or EN. LED Analog Dimming Control The LED current in SC504A can be dimmed via the 5-bit analog dimming register (register address: 0x02). The LED current can be adjusted in 32 steps from 0mA to maximum value, which is determined by the RISET resistor. The SC504A has a unique DAC architecture which allows it to have excellent LED current accuracy and string-to- string matching over the entire DAC range. The analog dimming method can be used in conjunction with PWM dimming to increase the dimming resolution. The fast loop response of the SC50 4A allows the LED current to transition to a new value within 60µs or so. Please refer to the graphs in the typical characteristics section. LED PWM Dimming Control The PWM input needs to be held high for normal opera - tion. PWM dimming can be achieved by cycling the PWM input at a given frequency where a “low” on the PWM input turns off both IO current sinks and a “high” turns on all IO current sinks. The PWM pin can be toggled by exter- nal circuitry to allow PWM dimming. In a typical applica- tion, a microcontroller sets a register or counter that varies the pulse width on a GPIO pin. The SC504A allows dimming over a wide frequency range ( 00Hz-30kHz) in order to allow compatibility with a wide range of devices. This includes the newest dimming strategies that avoid the audio band by using high frequency PWM dimming. In this manner, a wide range of illumination can be gener- ated while keeping the instantaneous LED current at its peak value for high efficiency and color temperature. The SC504A provides a 000: dimming range at kHz PWM frequency. The LED current sinks turn on/off very rapidly (<25ns, typical). This allows a wide dimming ratio. An additional advantage of PWM dimming is that it avoids in- rush currents when filling the boost output capacitor. Simply apply the PWM signal to the device at 0% duty for a millisecond or two, and in-rush current is reduced. This dimming time will vary based on the number of LEDs and the size of the output capacitor. This can be easily deter - mined during testing and programmed into the microcon- troller firmware.
Table 1 — Fault Protection Descriptions Type of Fault User Disable? Fault Criteria Action on Fault Recovery Device FL T pin (latching / non-latching Condition(s) FL T pin Input Under-voltage at VIN (UVLO) No VIN < ( + R2/R) x .23 (rising) No Startup Not Active VUVLO > .23V (rising) High No VIN < ( + R2/R) × .23V - IUVLO × R (falling) Shutdown Not Active VUVLO > .23V (rising) High Input Under-volt- age at VCC (UVLO) No VCC < 4.2V (rising) No Startup Not Active VCC > 4.2V (rising) High No VCC < 4.0V (falling) Shutdown Not Active VCC > 4.2V (rising) High Over-voltage Protection (OVP) No VOVP > .23V (rising) Regulate to OVP threshold: IO(n) = “on” Low (non-latching) VOVP < .22V (falling) High on re- moval of fault condition Over-current Protection (OCP) No VCS > 0.4V Limit Q FET drain current < 0.4V/R9 (typ) () High VCS > 0.4V High Shorted LED(s) Yes, tie SCP to VCC VIO(n) > 20 x VSCP Device on: IO(n) = “off” Other IO(All) = “on” Low (latching) Replace Shorted LED(s) and Toggle EN, VCC or UVLO High VIO(All) > 20 x VSCP Device latch-off; IO(All) = “off” Low (latching) Replace Shorted LED(s) and Toggle EN, VCC or UVLO High Open LED(s) No VIO(n) < 0.V and OVP event Device on: IO(n) = “off” Other IO(All) = “on” Low (latching) Replace Open LED(s) and Toggle EN, VCC or UVLO High VIO(All) < 0.V and OVP event Device latch-off; IO(All) = “off” Low (latching) Replace Open LED(s) and Toggle EN, VCC or UVLO High Unused Strings No VIO(All) < 0.V (start up) Device on: IO(n) = “off” Other IO(All) = “on” High Over-Tempera- ture Protection (OTP) No TJ > 50ºC (typ) Device off; IO(All) = “off” Low (latching) Satisfy THYS > 0ºC; Device On; IO(All) = “on”; Toggle EN, VCC or UVLO High Note: Refer to the application circuit example for R and R2 on page 20, Figure 2.
Applications Information (continued) Fault Protection The SC50 4A provides fault detection for low supply voltage, LED related faults, boost converter over-voltage and thermal shutdown. The open drain output pin ( FLT) indicates a system fault. The nature of the fault can be read from the fault status resistor (register address: 0x00) via I2C interface. Refer to Table for a description of the Fault Protection Modes. Other Possible Configurations Depending on different application requirements, the SC504A can also be easily configured to other topolo - gies, such as the SEPIC configuration shown in Figure 4, page 2. Li-Ion Powered Display Configuration If a Li-Ion powered display application is required, V CC is needed to power with 5V. However, V IN can be set lower from 3V to 4.2V for example. An advantage of this type of configuration is that it provides higher efficiency. Please use Figure 3 on page 20 for reference. High Output Voltage Configuration If a high output voltage application is required, an addi - tional external cascode MOSFET can be added on each IO pin to meet such requirement, please refer to Figure 5 on page 2 for reference. In this case, the upper limit on the output voltage is mainly determined by the rating of the external MOSFET, heat dissipation, etc. PCB Layout Considerations The placements of the power components outside the SC504A should follow the layout guidelines of a general boost converter. The Detailed Application Circuit is used as an example. Capacitor (C2) should be placed as close as possible to the VCC and AGND to achieve the best performance. Capacitor (C) is the input power filtering capacitor for the boost. It needs to be tied to PGND. The converter power train inductor (L ) is the boost converter input inductor. Use wide and short traces connecting these components. The output rectifying diode (D) uses a Schottky diode for fast reverse recovery. Transistor (Q) is the external switch. Resistor (R9) is the switch current sensing resis- tor. To minimize switching noise for the boost con - verter, the output capacitor (C6) should be placed such that the loop formed by Q , D, C6 and R9, is minimized. The output of the boost converter is used to power up the LEDs. Use wide and short trace con - necting Pin NDRV and the gate of Q. The GNDs for R9 and C6 should be PGND. These components should be close to the SC504A. Resistor (R8) is the output current adjusting resistor for IO through IO2 and should return to AGND. Place it next to the IC. Resistor (R6) is the switching frequency adjusting resistor and should return to AGND. Place it next to the IC. The decoupling capacitor (C3) for Pin REF should return to AGND. Place it next to the IC. Resistors (R4, R5) form a divider to set the SCP level, R4 should return to AGND. Place it next to the IC. Resistors (R2, R) form a divider to set the UVLO level for UVLO pin. R should return to AGND. Place it next to the IC. R and R 0 form a divider to set the OVP level for VOUT, R0 should return to AGND. Place it next to the IC. All the traces for components with AGND connection should avoid being routed close to the noisy areas. An exposed pad is located at the bottom of the SC504A for heat dissipation and analog ground. A copper area underneath the pad is used for better heat dissipation. On the bottom layer of the PCB another copper area, connected through vias to the top layer, is used for better thermal performance. The pad at the bottom of the SC50 4A should be con - nected to AGND. AGND should be connected to PGND at a single point for better noise immunity.
state operation, transient response, and its loop stability. current can be calculated using the following equation. trade-off between the DCR and size of the inductor. Table 2. Recommended Inductors
V RIPPLE – Peak to peak output ripple. 6x 4.7µF capacitors are recommended. average current will be sufficient for most designs. Table 3. Recommended Rectifier Diodes are preferred for achieving better efficiency.
Components Selection (continued) Current Sensing Resistor Selection The switch current is sensed via the current sensing resis- tor, RCS. The sensed voltage at this pin is used to set the peak switch current limit and also used for steady state regulation of the inductor current. The current limit com- parator has a trip voltage of 0.4V (typical). R CS value is chosen to set the peak inductor and switch current using the following equation. I 2 SW(Peak) = 0.4/RCS The power dissipation in R CS can be calculated using the following equations. PR_CS = IRMS 2 x RCS IRMS = D x [IO/(1-D)]2 I O = Output DC Current, D = Duty Cycle For the typical application circuit shown in the detailed application circuit (page 20, Figure 2), the power dissipa - tion on the sensing resistor is shown by the following equations. Assuming VIN = 6V and VOUT = 3.5V, thus D = 8%, For this example, a 0.08 Ω % thick-film chip resistor rated at W can be used.
Figure 2— Application Circuit Example, 20 LED @ 200mA VIN (12-19V) SC 5014A VCC EN UVLO SCP REF FSET SCL SDA ISET PWM IO2 IO2 IO1 IO1 OVP CS PGND NDRV C6Q1 C12 SDA R15 SCL PWM R12 VCC (5V) GND R11 Vout up to 70V
20 WLEDs per channel
2.2µF 10 kΩ PGND 10 µF/25 V x3P C S 2.2µF/100 V x6P C S 1µF 75 kΩ 50 m Ω 787 kΩ 10 kΩ 25 .5kΩ 20 kΩ 10 kΩ R 5, 40 .2kΩ 250 kΩ 10kΩ AON6482 D F LS1100 PAD VIN 3.3µH RCS Figure 3— Li-Ion Powered Display Application Circuit Example, 10 LED @ 40mA VIN (3-4.2V) SC 5014A VCC EN UVLO SCP REF FSET SCL SDA ISET PWM IO2 IO2 IO1 IO1 OVP CS PGND NDRV C6Q1 C12 SDA R15 SCL PWM R12 VCC (5V) GND R11 Vout
5 WLEDs per stringl
2.2µF/10 V 10 kΩ PGND 10 µF/6.3V x2P C S 1µF 13 kΩ 100 m Ω 249 kΩ 10 kΩ 127 kΩ 20 kΩ 10 kΩ R 5, 60 .4kΩ 100 kΩ 10kΩ Si2318 B 140 PAD RCS
(6-27V) SC 5014A VCC EN UVLO SCP REF FSET SCL SDA ISET PWM IO2 IO2 IO1 IO1 OVP CS PGND NDRV C12 SDA R15 SCL PWM R12 VCC (5V) GND R11 Vout FLTFLT 2.2µF PGND 1µF 20 kΩ 10 kΩ R 5 PAD RCS Figure 4— SEPIC Configuration VIN (12-19V) SC 5014A VCC EN UVLO SCP REF FSET SCL SDA ISET PWM IO2 IO2 IO1 IO1 OVP CS PGND NDRV C6Q1 C12 SDA R15 SCL PWM R12 VCC (5V) GND R11 Vout up to 70V 2.2µF 10 kΩ PGND 10 µF/25 V x3P C S 2.2µF/100 V x6P C S 1µF 75 kΩ 50 m Ω 787 kΩ 10 kΩ 25 .5kΩ 20 kΩ 10 kΩ R 5, 40 .2kΩ 250 kΩ 10kΩ AON6482 D F LS1100 PAD VIN 3.3µH RCS Figure 5— Cascode Configuration drives 40 LEDs@200mA
acknowledges and the master terminates the transfer with the stop condition [P]. (2) Combined Format — Read After the start condition [S], the slave address is sent, fol - lowed by an eighth bit indicating a write. The SC504A I2C then acknowledges that it is being addressed, and the master responds with an 8-bit data byte consisting of the register address. The slave acknowledges and the master sends the repeated start condition [Sr]. Once again, the slave address is sent, followed by an eighth bit indicating a read. The slave responds with an acknowledge and the 8-bit data from the previously addressed register; the master then sends a non-acknowledge (NACK). Finally, the master terminates the transfer with the stop condition [P]. (3) Stop Separated Reads Stop-separated reads can also be used. This format allows a master to set up the register address pointer for a read and return to that slave at a later time to read the data. In this format the slave address followed by a write command are sent after a start [S] condition. The SC50 4A then acknowledges it is being addressed, and the master responds with the 8-bit register address. The master sends a stop or restart condition and may then address another slave. After performing other tasks, the master can send a start or restart condition to the SC50 4A with a read command. The device acknowledges this request and returns the data from the register location that had previously been set up. Serial Interface The I2C General Specification The SC50 4A is a read-write slave-mode I 2C device and complies with the NXP B.V. I2C standard Version 2., dated January 2000. The SC504A has user-accessible internal 8-bit registers. The I 2C interface has been designed for program flexibility, supporting direct format for write operation. Read operations are supported on both com - bined format and stop separated format. While there is no auto increment/decrement capability in the SC50 4A I2C logic, a tight software loop can be designed to randomly access the next register independent of which register you begin accessing. The start and stop commands frame the data-packet and the repeat start condition is allowed if necessary. Limitations to the I2C Specifications The SC504A only recognizes 7-bit addressing. This means that 0-bit addressing and CBUS communication are not compatible. The device can operate in either standard mode (00kbit/s) or fast mode (400kbit/s). Slave Address Assignment The 7-bit slave address is 0 0 x. The eighth bit is the data direction bit. 0x5F is used for read operation and 0x5E is used for write operation. Supported Formats The supported formats are described in the following subsections. (1) Direct Format — Write The simplest format for an I2C write is direct format. After the start condition [S], the slave address is sent, followed by an eighth bit indicating a write. The SC50 4A I2C then acknowledges that it is being addressed, and the master responds with an 8-bit data byte consisting of the register address. The slave acknowledges and the master sends the appropriate 8-bit data byte. Once again, the slave
S la ve A d d re ss R e g iste r A d d re ss D a taS W A A A P S – Start C ondition W – W rite = ‘0’ A – Acknow ledge (sent by slave ) P – Stop condition Slave Address – 7-bit R egister address – 8-bit D ata – 8-bit I2C Stop Separated Format Read S la ve A d d re ss R e g iste r A d d re ss S la ve A d d re ss B D a ta N A C KS W A A S /S r R A PP S la ve A d d re ssS R e g iste r A d d re ss S e tu p A cce ss M a ste r A d d re sse s o th e r S la ve s R e g iste r R e a d A cce ss S – Start C ondition W – W rite = ‘0’ R – R ead = ‘1’ A – Acknow ledge (sent by slave ) N AK – N on-Acknow ledge (sent by m aster ) Sr – R epeated Start condition P – Stop condition Slave Address – 7-bit R egister address – 8-bit D ata – 8-bit I2C Combined Format Read S la ve A d d re ss R e g iste r A d d re ss S la ve A d d re ss D a ta N A C KS W A A S r R A P S – Start C ondition W – W rite = ‘0’ R – R ead = ‘1’ A – Acknow ledge (sent by slave ) N AK – N on-Acknow ledge (sent by m aster ) Sr – R epeated Start condition P – Stop condition Slave Address – 7-bit R egister address – 8-bit D ata – 8-bit
Definition of Registers and Bits Fault Status Register Bit Field Definition Read / Write Description 0x00 [7] CLF W Clear latching flags bit. (Set = to clear OTP , LED_OPEN, LED_SHORT and mask OVP for 32 to 64μs) 0x00 [5] LED_SHORT R One or more LED strings faulted shorted 0x00 [4] LED_OPEN R One or more LED strings faulted open 0x00 [2] OTP R Thermal shutdown ( = thermal OTP fault) 0x00 [] OVP R Output over-voltage fault ( = OVP ) 0x00 [0] FAULT R OR of all fault conditions (0= no fault, = fault condition) Analog Dimming Control Register Bit Field Definition Read / Write Description 0x02 [4:0] IDAC [4:0] R / W 5-bit analog dimming register — The LED current can adjusted in 32 steps from 0mA to max value determined by RISET. Register Map Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset Value Description 0x00 CLF LED_ SHORT LED_ OPEN OTP OVP FAULT 0x00 Fault Status 0x02 IDAC4 IDAC3 IDAC2 IDAC IDAC0 0xF Analog Dimming Control
e D /2 .001 M A X .002 .039 N O M 0.80 0.02 (0.20) 0.90 C O N T R O LLIN G D IM E N S IO N S A R E IN M ILLIM E T E R S (A N G LE S IN D E G R E E S ). C O P LA N A R IT Y A P P LIE S T O T H E E X P O S E D P A D A S W E LL A S T H E T E R M IN A LS . N O TE S : N P IN 1 IN D IC A TO R 4.103.90 4.00 4.103.90.157 .154 .161 .154 .161 aaa C A C (LA S E R M A R K ) D E B A 1 A A 2 S E A TIN G P LA N E LxN E /2 IN C H E S .020 B S C b .007 bbb aaa N D 1 E L e D .012 .100 D IM A 1 A 2 A M IN .000 .031 0.50 2.80 0.30 2.55 .004 .004 .016 .157 .106 .020 .110 0.10 0.10 0.40 4.00 2.70
0.50 B S C
0.05 1.00 D IM E N S IO N S M IN 0.00 N O M (.008) .035 Outline Drawing — MLPQ-20 4x4
Land Pattern — MLPQ-20 4x4 D IM E N S IO N S K H G Z X P (C ) C O M P A N Y 'S M A N U F A C T U R IN G G U ID E LIN E S A R E M E T. 4.80.189ZY F A ILU R E T O D O S O M A Y C O M P R O M IS E TH E TH E R M A L A N D /O R T H E R M A L V IA S IN T H E LA N D P A T T E R N O F TH E E X P O S E D P A D S H A LL B E C O N N E C T E D T O A S Y S TE M G R O U N D P LA N E . F U N C T IO N A L P E R F O R M A N C E O F TH E D E V IC E . T H IS LA N D P A T T E R N IS F O R R E F E R E N C E P U R P O S E S O N LY . C O N S U LT Y O U R M A N U F A C T U R IN G G R O U P TO E N S U R E Y O U R N O T E S : D IM X Y H K P C G M ILLIM E T E R SIN C H E S (3.95) .010 .033 .122 .020 .106 .106 (.156) 0.25 0.85 2.70 0.50 2.70 3.10
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