SC2677B_09 SEMTECH | Alldatasheet
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Features
Revision: Dec. 04, 2009 The SC2677B is a versatile 2 phase, synchronous, voltage mode PWM controller that can be used in two distinct ways. First, the SC2677B is ideal for applications where point of use output power exceeds any single input power budget. Alternatively, the SC2677B can be configured as a dual switcher. The SC2677B features a precise temperature compensated voltage reference, cycle-by-cycle peak cur- rent limit, under voltage lockout over current protection, and internal level-shifted high-side gate drive circuitry. In current sharing configuration, the SC2677B can pro- duce a single output voltage from two separate input volt- age sources (which can be different in voltage levels) while maintaining current sharing between the two channels. Current sharing is programmable to allow each input sup- ply to be loaded differently per application requirements. In dual switcher configuration, two feedback paths are pro- vided for independent control of the separate outputs. The device will provide a regulated output from flexibly config- ured inputs, such as 3.3V, 5V, 12V etc. The phasing be- tween the two switchers is adjustable to minimize the in- put and output ripple. 300kHz to 1MHz externally programmable frequency operation Soft Start and Enable function Power Good output provided Cycle-by-cycle peak current limit Latch off for over current protection Phase-shifted switchers minimize ripple High efficiency operation, >90% Programmable output(s) as low as 0.5V Industrial temperature range TSSOP-24 package TSSOP-24 EDP package Bias voltage as low as 4.5V Adjustable phase shift between channels Two Phase, Current Sharing Controller Flexible, same or separate VIN Programmable current sharing Thermal distribution via multi-phase output Graphics cards Peripheral add-in card Dual-Phase power supply Power supplies requiring two outputs CS1+ CS2+ C62 CS1+ R20 C39 R49 C63 PWRGD Vout2 R48 R21 C25 C38 CS2- CS2- 1 2 C36 C23 C19 CS1- 1 2 U1 SC2677B 12 13 2 23 VREF FREQ VCC +IN2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC GND PWRGD SS/ ENA PHASI NG -IN1 COMP1 BST1 DH1 DL1 CS2+ CS2- CS1- CS1+ C26 R18 R19 C57 CS1- R50 Vin R10 C28 ENABLE C33 Vout1 CS2+ R13 R14 C43 C59 R51 Dual Independent outputs Typical Application Schematic
Description
Applications
2 www.semtech.com SC2677B Dual Synchronous Voltage Mode Controller with Current Sharing Circuitry VP1 C25 C39 C26 PWRGD R14 R22 C38 Vin3 CS1- D C63 C59 CS2+ C43 Vin3 R24 R19 VP1 C23 R13 C19 C28 CS2- CS1+ VP2 CS1+ 1 2 C36 U1 SC2677B 12 13 2 23 VREF FREQ VCC +I N2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC GND PWRGD SS/ ENA PHASI NG -IN1 COMP1 BST1 DH1 DL1 CS2+ CS2- CS1- CS1+ CS2- R26 CS2+ R50 C37 C35 R10 Vin1 R51 R49 C33 VP2 ENABLE VOUT 1 2 Vout C62 C57 R21 CS1- Vin2 Vin3 R48 VOUT C57 CS2- R48 R21 R26 CS1+ C43 R50 Vout Vin C63 VOUT R10 PWRGD C35 C33 VP2 C19 ENABLE C37 R19 VOUT VP2 1 2 C59 CS1- C38 C26 CS2+ U1 SC2677B 12 13 2 23 VREF FREQ VCC +IN2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC GND PWRGD SS/ ENA PHASI NG -IN1 COMP1 BST1 DH1 DL1 CS2+ CS2- CS1- CS1+ C25 C39 C36 CS1- R24 C23 R22 R51 C28 R49 CS1+ C62 CS2+ D 1 2 VP1 R14 VP1 CS2- R13 Dual Input, Single output, Current share Mode Single Input/output, Current share Mode Typical Application Schematic
3© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B retemaraPr etemaraP retemaraP retemaraPr etemaraPs noitidnoCs noitidnoC snoitidnoC snoitidnoCs noitidnoCn iMniM niM niMniMp yTpyT pyT pyTpyTx aMxaM xaM xaMxaMs tinUs tinU stinU stinUs tinU egatloVtuptuOV TUO V= BF 594.00 05.05 05.0V V TUO V= ,BF 521ot04- oC2 94.00 05.08 05.0V egatloVylppuSV CC 5.45 1V tnerruCylppuSV CC 0.5=0 1A m OLVUV CC dlohserhTpupmaR4 8.2V siseretsyHOLVUV CC 001V m ecnerefeR 5.0V noitalugeRdaoLecnerefeRV FER Au001~Au01ecruos2 .0% noitalugeReniLecnerefeRV 5< V CC <V 517 .0% noitalugeReniLtuptuOV 5< V NI <V 517 .0% )reifilpmArorrE()mG(niaG Au001ecruosnipPMOC4 5 5 .6V /Am )reifilpmArorrEevalS(egatloVtesffOtupnI 3-1 -0 V m )reifilpmArorrE(tnerruCxaMk niS,ecruoS0 040 64A μ tnerruCsaiBtupnI2 NI-,2NI+,1NI-2 A μ Unless Specified: VCC = 4.75 to 5.25V, GND = PGND = 0V, FB = VO, TJ = 25°C, VBSTC = VBST = 12V retemaraPr etemaraP retemaraP retemaraPr etemaraPl obmySl obmyS lobmyS lobmySl obmySs timiLs timiL stimiL stimiLs timiLs tinUs tinU stinU stinUs tinU V CC DNGotV IN 51ot3.0-V DNGotDNGP 1±V DNGot2TSB,1TSB 03ot3.0-V DNGotCTSB 02ot3.0-V DNGot2NI-/+,1NI- 7V DNGot2PMOC,1PMOC 7V DNGot2HD,1HD )6( 03ot3.0-V DNGot2LD,1LD 3.0+CTSBot3.0-V Sn05(kaep3-) )1( V -2SC,+2SC,-1SC,+1SC 7V DNGotDGRWP V CC 3.0+V GNISAHP 7V DNGotANE/SS 7ot3.0-V esaCotnoitcnuJecnatsiseRlamrehT 42-POSST PDE42-POSST θ CJ 71 5.5 W/C° tneibmAotnoitcnuJecnatsiseRlamrehT 42-POSST PDE42-POSST θ AJ 09 W/C° egnaRerutarepmeTtneibmAgnitarepOT A 58ot04-C ° egnaRerutarepmeTnoitcnuJgnitarepOT J 521ot04-C ° egnaRerutarepmeTegarotST GTS 051+ot56-C ° ces01)gniredloS(erutarepmeTdaeLT DAEL 003C ° Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Electrical Characteristics
4© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B retemaraPr etemaraP retemaraP retemaraPr etemaraPs noitidnoCs noitidnoC snoitidnoC snoitidnoCs noitidnoCn iMniM niM niMniMp yTpyT pyT pyTpyTx aMxaM xaM xaMxaMs tinUs tinU stinU stinUs tinU dlohserhTffognihctaLegatloVrednU 060 70 8% egnaRycneuqerFrotallicsO 0030 001z Hk ycneuqerFrotallicsOR TES mhok5=0 540 050 55z Hk elcyCytuDxaMrotallicsOF CSO zHk005=6 80 9% 1HDdna2HDfognisahPV GNISAHP V585.0=0 81° tnerruCkniSHDV 5.3=DNGP-HD7 .1A tnerruCkniSHDV 5.2=DNGP-HD5 8.0A tnerruCecruoSHDV 57.3=HD-HTSB7 .1A tnerruCecruoSHDV 3=HD-HTSB5 8.0A tnerruCkniSLDV 5.3=GNGP-LD7 .1A tnerruCkniSLDV 5.2=DNGP-LD5 8.0A tnerruCecruoSLDV 57.3=LD-LTSB7 .1A tnerruCecruoSLDV 3=LD-LTSB5 8.0A emiTnomuminiMHD0 ot04- oC0 03s n emiTdaeD5 etoN0 55 80 21s n tnerruCegrahCtratStfoS )2( 05A μ elbanEtratStfoSe lcycytud%00 04V m dnEtratStfoSe lcycytud%0015 28V m dlohserhTnoitisnarTtratStfoS )2( edomsuonorhcnyS2 2.1V dlohserhTpirTPCO 823 37 3V m emiTyaleDPCO wolHDotnoitcetedPCOmorF0 02S n )reifilpmAesneStnerruC(tesffOtupnI 3-/+V m tnerruCsaiBtupnI -2SC,+2SC,-1SC,+1SC0 01A n dlohserhTdooGrewoPV TUO pugnipmar% 38% 88% 39V TUO nwoDlluPdooGrewoPA m2=tnerruCkniS4 .0V Notes:Notes:Notes:Notes:Notes: (1) Measured from 50% to 50% pulse amplitude. (2) The soft start pin sources 50 μA to an external capacitor. The converter operates in synchronous mode above the soft start transition threshold and in asynchronous mode below it. (4) This device is ESD sensitive. Use of standard ESD handling precautions is required. (5) 120ns maximum at 70°C. Unless Specified: VCC = 4.75 to 5.25V, GND = PGND = 0V, FB = VO, TJ = 25°C, VBSTC = VBST = 12V (6) Under pulsing condition, the negative voltage can be -5V for no more than 40ns measured from 50% falling to 50% rising. Electrical Characteristics (Cont.)
5© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B EXPEXPEXPEXPEXPANDED PIN DESCRIPTIONANDED PIN DESCRIPTIONANDED PIN DESCRIPTIONANDED PIN DESCRIPTIONANDED PIN DESCRIPTION Pin 1Pin 1Pin 1Pin 1Pin 1 , 2, 2, 2, 2, 24:4:4:4:4: (CS2+, CS1+) Current sense amplifier (for OCP protection) non-inverting inputs. Pin 2, 23:Pin 2, 23:Pin 2, 23:Pin 2, 23:Pin 2, 23: (CS2-, CS1-) Current sense amplifier (for OCP protection) inverting inputs. Pin 3:Pin 3:Pin 3:Pin 3:Pin 3: (VREF) Internal 0.5V reference. Connected to the + input of the master channel error amplifier. Pin 4: Pin 4: Pin 4: Pin 4: Pin 4: (FREQ) External frequency adjustment. Connect a resistor to AGND to set the switching frequency. Please see more information in Application section. Pin 5: Pin 5: Pin 5: Pin 5: Pin 5: (VCC) Bias pin for the controller. Connect a ceramic decoupling capacitor from this pin to AGND with minimum trace length. Pin 6: Pin 6: Pin 6: Pin 6: Pin 6: (+IN2) “+” input of the slave error amplifier. Pin 7, 18: Pin 7, 18: Pin 7, 18: Pin 7, 18: Pin 7, 18: (-IN2, -IN1) “-” inputs of the error amplifiers. Pin 8, 1Pin 8, 1Pin 8, 1Pin 8, 1Pin 8, 1 77777::::: (COMP2, COMP1) Compensation pins of the error amplifiers. Pin 9, 1Pin 9, 1Pin 9, 1Pin 9, 1Pin 9, 1 6: 6: 6: 6: 6: (BST2, BST1) Supply pins for the high side drivers. Usually connected to bootstrap circuit. Pin 1Pin 1Pin 1Pin 1Pin 1 0, 10, 10, 10, 10, 1 5:5: 5:5:5: (DH2, DH1) Gate drive pins for the top MOSFETs. Requires a small series resistor. Pin 1Pin 1Pin 1Pin 1Pin 1 11111, 1, 1, 1, 1, 14:4:4:4:4: (DL2, DL1) Gate drive pins for the bottom MOSFETs. Requires a small series resistor. Pin 12:Pin 12:Pin 12:Pin 12:Pin 12: (PGND) Power GND. Return of the high side and low side gate drivers. Pin 1Pin 1Pin 1Pin 1Pin 13:3:3:3:3: (BSTC) Supply pin for bottom MOSFET gate drivers. Pin 19: Pin 19: Pin 19: Pin 19: Pin 19: (PHASING) This pin controls the phase shift between master and slave for optimum noise immunity. Use a resistive divider from the FREQ pin (pin 2) to AGND, and connect the tap of the resistive divider to pin 17. Please see more information in Application section. Pin 20:Pin 20:Pin 20:Pin 20:Pin 20: (SS/ENA) Soft start pin. Connect a ceramic capacitor from this pin to AGND, and there is an internal current source charg- ing up this capacitor during soft start. The PWM opera- tion can be disabled if this pin is pulled low. Pin 2Pin 2Pin 2Pin 2Pin 21:1:1:1:1: (PWRGD) Power good signal. This is an open collector output. It is pulled low internally if output voltage is outside the power good window. Pin 22:Pin 22:Pin 22:Pin 22:Pin 22: (GND) Analog GND. Return of the analog signals and bias of the chip. eciveDe civeD eciveD eciveDe civeD )1()1( )1( )1()1( egakcaPe gakcaP egakcaP egakcaPe gakcaP TRTSTIB7762CS )2()2( )2( )2()2( 42-POSST TRTETB7762CS )2()2( )2( )2()2( PDE42-POSST 1-BVEB7762CSd raoBnoitaulavEerahStnerruC 2-BVEB7762CSd raoBnoitaulavElennahClauD Notes:Notes:Notes:Notes:Notes: (1) Only available in tape and reel packaging. A reel con- tains 2500 devices. (2) Lead free package. Device is fully WEEE and RoHS compliant. Top View (TSSOP-24 Pin) Pin Configuration Ordering Information Pin Descriptions
6© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Notes:Notes:Notes:Notes:Notes: (1) Channel 1 is the Master and Channel 2 is the Slave in current sharing configuration. (2) For dual output operation, tie +IN2 to VREF and the two PWM channels are independent. 1.25V 50uA Block Diagram
7© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Main Loop(s)Main Loop(s)Main Loop(s)Main Loop(s)Main Loop(s) The SC2677B is a dual, voltage mode synchronous Buck controller. The two separate channels are identical and share only IC supply pins (Vcc and GND), output driver ground (PGND) and pre-driver supply voltage (BSTC). They also share a common oscillator generating a sawtooth waveform for channel 1 and an dephased sawtooth for channel 2. Channel 2 has both inputs of the error ampli- fier uncommitted and available externally. This allows the SC2677B to operate in two distinct modes. a) Two independent channels with either common or different input voltages and different output voltages. The two channels each have their own volt- age feedback path from their own output. In this mode, positive input of the error amplifier 2 is con- nected externally to Vref. If the application uses a common input voltage, the sawtooth phase shift be- tween the channels provides some measure of input ripple current cancellation. b) Two channels operating in current sharing mode with common output voltage and either common in- put voltage or different input voltages. In this mode, channel 1 operates as a voltage mode Buck controller, as before, but error amplifier 2 monitors and ampli- fies the difference in voltage across the output cur- rent sense resistors of channel 1 and channel 2 (Mas- ter and Slave) and adjusts the Slave duty cycle to match output currents. To controller also works well for using the output choke winding resistance as cur- rent sensing element (please refer the application schematic for details). The amount of the current of the slave channel vs the master channel can be pro- grammed according to the application. This feature is especially useful when two input sources are used and each source has its power budget. The offset of the current sharing error amplifier is trimmed whthin the range of -2mV to 0mV. The po- larity being such that the slave is OFF if the master has no current. Power GoodPower GoodPower GoodPower GoodPower Good The controller provides a power good signal. This is an open collector output, which is pulled low if the output voltage is outside of the power good window. SofSofSofSofSof t Start Start Start Start Star t/Enablet/Enablet/Enablet/Enablet/Enable The Soft Start/Enable (SS/ENA) pin serves several functions. If held below the Enable threshold, both chan- nels are inhibited. DH1 and DH2 will be low, turning off the top FETs. Between the Soft Start Enable threshold and the Soft Start End threshold, the duty cycle is allowed to increase. At the Soft Start End threshold, maximum duty cycle is reached. In practical applications the error amplifier will be controlling the duty cycle before the Soft Start End threshold is reached. To avoid boost problems during start-up in current share mode, both channels start up in asynchronous mode, and the bottom FET body diode is used for circulating current during the top FET off time. When the SS/ENA pin reaches the Soft Start Transition threshold, the channels begin operating in synchronous mode for improved efficiency. The soft start pin sources approximately 50uA and soft start timing can be set by selection of an appropriate soft start capacitor value. FFFFFreqreqreqreqreq uency Seuency Seuency Seuency Seuency Se t and Phasingt and Phasingt and Phasingt and Phasingt and Phasing The switching frequency can be programmed by connect- ing a resistor from the FREQ pin to AGND. The PHASING pin controls the phase shift between the master sawtooth and slave sawtooth which allows the adjustment of the phase shift for maximum noise immunity by controlling the timing between master and slave transition. A resis- tive divider is used from the FREQ pin to AGND and the divided voltage is fed to the PHASING pin as depicted. U1 SC2677B 12 13 2 23 VREF FREQ VCC +IN2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC GND PWRGD SS/ENA PHASING -IN1 COMP1 BST1 DH1 DL1 CS2+ CS2- CS1- CS1+ R13 R19
Application Information
8© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Over Current ProtectionOver Current ProtectionOver Current ProtectionOver Current ProtectionOver Current Protection Current sense amplifiers sense the inductor DCR, and com- pare with an internal OCP reference. As over current being detected, the current sense amplifier will trip the peak current limit on cycle-by-cycle basis. If the over current condition sustains, and the output voltage drops below 75% of its nominal voltage level, the PWM will be disabled and the power supply be latched off with short amount of delay. The latch can be reset by power cycling. (R13+R19) vs.Oscillator Frequency 300 400 500 600 700 800 900 1000 4 6 8 1 01 21 41 61 82 0 (R13+R19) (kohm) Oscillator Frequency (kHz) Vphasing vs Phase Shift 100 120 140 160 180 Vphasing (V) Phase (deg) Controller Power DissipationController Power DissipationController Power DissipationController Power DissipationController Power Dissipation Controller power dissipation is generated by following parameter; switching frequency, total gate charge of all selected MOSFETs and supply voltage. P = Vin * (ICC + QGT* FSW) Q GT = QG * N Where Vin : Supply voltage for controller and driving MOSFET. Layout GuidelinesLayout GuidelinesLayout GuidelinesLayout GuidelinesLayout Guidelines Power and signal traces must be kept separated for noise considerations. Feedback, current sense traces and ana- log ground should not cross any traces or planes carrying high switching currents, such as in the input loop or the phase node. The input loop, consisting of the input capacitors and both MOSFETs must be kept as small as possible. Since all of the high switching currents occur in the input loop, the enclosed loop area must be kept small to minimize induc- tance and radiated and conducted noise emissions. An example is shown below to demonstrate the procedure introduced above. Vin =12V Fsw =250KHz N =4(number of MOSFET) Then Q GT = 108nC Q G = 27nC (per MOSFET) It’s recommended that the below figure be performed to ensure SC2677B under safe operation area. ICC : Supply current for controller. QGT : Total gate charge of all selected MOSFETs. QG : Total gate charge of per selected MOSFETs. FSW : Switching frequency. N : Number of MOSFET. QGT limitation (with loading) 100 140 180 220 260 300 340 380 420 460 500 540 580 620 150 200 250 300 350 400 450 500 Fsw(KHz) QGT(nC ) 5Vin 8.5Vin 12Vin SOA SOA SOA Application Information(Cont.)
9© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Designing for minimum trace length is not the only factor for best design, often a optimum layout can be achieved by keeping the wide trace and using proper layer stacking to minimize the stray inductance. It is important to keep the gate traces short, the IC must be close to the power switches. It is recommended to use at least 25 mil width or wider trace when. A good place- ment can help if the controller is placed in the middle of the two PWM channels. Grounding requirements are always important in a buck converter layout, especially at high power. Power ground (PGND) should be returned to the bottom MOSFET source to provide the best gate current return path. Analog ground (AGND) should be used for the anaglog returns such as chip decoupling, frequency setiing, reference voltage (or soft starting cap), and the compensation. This AGND shape should be single point connected to the PGND shape near the ground side of the output capacitors. This will provide noise free analog ground for operation stablity, and also provide best possible remote sensing for the feedback voltage. In case two output rails need to be regulated, the AGND shape should single point connected to the geometric cen- ter of the PGND for the two point of loads. The single ponit tie is a must to prevent the power current from flow- ing on the AGND shape, so that the analog circuitry in the controller has an electrically quiet reference and to pro- vide the greatest noise free operation. Keep in mind that the AGND pin is never allowed to have bigger than 1V voltage difference vs the PGND pin. This usually achiev- able by using a ground plane for PGND in PCB layout. Using ground plane for PGND can reduce the physical sepa- ration between the two grounds, such that even the fast current transitions in the PGND plane can not generate voltage spikes exceeding the 1V level, therefore prevent- ing unstable and erratic behavior from happening. The feedback divider must be close to the IC and be re- turned to analog ground. Current sense traces must be run parallel and close to each other and to analog ground. Application Information(Cont.) The IC must have a ceramic decoupling capacitor across its supply pins, mounted as close to the device as possible. The small ceramic, noise-filtering capacitors on the cur- rent sense lines should also be placed as close to the IC as possible.
10© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Dual Independent outputs 2N3906 1N4148 R20 R10 1.00K C571800uF C23 1uF SC2677B 12 13 24CS2+ CS2- VREF FREQ VCC +IN2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC DL1 DH1 BST1 COMP1 -IN1 PHASING SS/ENA PWRGD GND CS1- CS1+ DCR=8.83mohm C59 1uF 4.7uF C60 1nF D2D1N4148 Enable/Disable Circuit(option) 8.8uH C404.7uF C431000uF R35 1.0 PWRGD C39 1uF C24 0.1uF M3IPD13N03LA C191800uF M7IPD13N03LA CS2+ C474.7uF R21 4.53K Enable D1 D1N4148 Vout1VP1 R52 4.7uH 1N4148 R55 4.7k C34 47pF C28 1uF R50 7.32K C63 220nF DCR=6.35mohm C36 0.1uF CS2- R14 12.4K R12 300 R13 4.42k S_Enable CS2+ C33 47nF Delay Output Circuit(option) +12V CS2- C62 220nF R19 6.19K CS1+ 1N4148 CS1- R53 10.0K 7.5K CS1- IP D13N03LA 9.09K R49 33.2K 1uF C26 100nF 1.0 3.3V@2A R11 10.0K 4.7uF C41000uF R51 13K +12V C464.7uF 2N3904 R31 2.2 C10 4.7uF C50 1uF 5V@2A VP2 R54 R18 5.6K CS1+ C25 1uF 2N3904 C38 1uF C21 1nF C27Option IPD13N03LA Vout2 R36 0R0 R48 4.02K Evaluation Schematic
11© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B metIe cnerefeRy titnauQn oitpircseDt raP 17 4C,64C,04C,01C,9C,1C6 R 7X,paCcimareCV61F u7.4 23 4C,4C2 . paCcitylortcelEmunimulAV61V 61/Fu0001 37 5C,91C2 . paCcitylortcelEmunimulAV61V 61/Fu0081 40 5C,95C,93C,83C,82C,52C,32C,6C8 R 7X,paCcimareCV61F u1 50 6C,12C2 R 7X,paCcimareCV61F n1 66 3C,42C2 R 7X,paCcimareCV61F u1.0 76 2C1 R 7X,paCcimareCV61F n001 83 3C1 R 7X,paCcimareCV61F n74 94 3C1 R 7X,paCcimareCV61F p74 013 6C,26C2 R 7X,paCcimareCV61F n022 111 L1 r otcudnIm hom4/Hu8.8 212 L1 r otcudnIm hom4/Hu7.4
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715 3R,1R2 % 5MSm ho1 815 R1 % 5MSK 5.7 918 R1 % 5MSK 90.9 021 1R,9R2 % 5MSK 01 120 1R1 % 5MSK 1 222 1R1 % 5MSm ho003 323 1R1 % 5MSK 24.4 424 1R1 % 5MSK 4.21 528 1R1 % 5MSK 6.5 629 1R1 % 5MSK 91.6 720 2R1 % 5MSK 1 821 2R1 % 5MSK 35.4 921 3R1 % 5MSm ho2.2 036 3R1 % 5MSm ho0 138 4R1 % 5MSK 20.4 239 4R1 % 5MSK 2.33 330 5R1 % 5MSK 23.7 431 5R1 % 5MSK 31 532 5R1 % 5MSK 2 633 5R1 % 5MSK 8 734 5R1 % 5MSK 3 835 5R1 % 5MSK 7.4
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Evaluation Board - Bill of materials
12© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Test condition:12Vin,5Vout@0A, 3.3Vout@0A Vcc 5Vout 3.3Vout PWRGD Vcc 5Vout 3.3Vout PWRGD Test condition:12Vin,5Vout@short circuit, 3.3Vout@ 0A Test condition:12Vin,5Vout@2A, 3.3Vout@2A Vcc 5Vout 3.3Vout PWRGD Test condition:12Vin,5Vout@2A,3.3Vout@short Vcc 5Vout 3.3Vout PWRGD Test condition:12Vin,5Vout@2A, 3.3Vout@2A DH1 DL1 DH2 DL2 Performance (Dual output)
13© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Load Current vs. Vcs1+ to Vout1 01234567 Load Current (A) Vcs1+ to Vout1 (mV) 3.3V OCP 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 0123456 Load Current (A) Vout2 (V) Load Current vs.Vcs2+ to Vout2 0123456 Load Current (A) Vcs2+ to Vout2 (mV) 5V OCP 0.0 1.0 2.0 3.0 4.0 5.0 6.0 01234567 Load C urrent (A ) Vout1 (V) Overall System Efficiency Loading (A) Efficiency (%) Io 1 +Io 2 Performance (Dual output)
14© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B C39 1uF C201800uF CS1+ C41800uF M7IPD06N03LA C10 4.7uF R22 2.32K DCR=4mohm CS1+ PWRGD C561800uF R51 5.76K C28 1uF Enable/Disable Circuit (option) C59 1uF 10.0K VP1 +12V +3.3V D1N4148 Vout1 2uH CS2- 4.7uF VP2 (1) R24 4.87K R48 R13 4.64k 2N3904 CS1- C24 0.1uF C33 33nF CS2+ IPD09N03LA 7.5K C60 1nF CS2- C25 1uF Enable C63 220nF C40 4.7uF C62 220nF (1) C191800uF SC2677B 12 13 24CS2+ CS2- VREF FREQ VCC +IN2 -IN2 COMP2 BST2 DH2 DL2 PGND BSTC DL1 DH1 BST1 COMP1 -IN1 PHASING SS/ENA PWRGD GND CS1- CS1+ D1N4148 R19 5.9K R35 1.0 R36 0R0 1.4V@20A R12 300 1uF Vout CS2+ C571800uF C474.7uF Note (1) : Current Scale. Master channel current weighting factor is around 0.68 * Io, Slaver is around 0.32 * Io 2N3904 VP1 1N4148 +5V 1N4148 R14 8.06K 2uH R21 2.1K DCR=4mohm IP D09N03LA C21 1nF CS1- C35 220nFC36 0.1uF C37220nF R11 10.0K IPD06N03LA R31 2.2 1N4148 1.78K R26 4.3K C464.7uF R10 1.00K C431800uF +12V 4.7uF C23 1uF C38 1uF Vout 1.0 R50 6.34K C26 47nF VP2 Single output, Current share Mode Evaluation Schematic (Cont.)
15© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B metIe cnerefeRy titnauQn oitpircseDt raP 17 4C,64C,04C,01C,9C,1C6 R 7X,paCcimareCV61F u7.4 27 5C,65C,34C,02C,91C,4C6 . paCcitylortcelEmunimulAV61V 61/Fu0081 39 5C,93C,83C,82C,52C,32C,6C7 R 7X,paCcimareCV61F u1 46 3C,42C2 R 7X,paCcimareCV61F u1.0 56 2C1 R 7X,paCcimareCV61F n74 63 3C1 R 7X,paCcimareCV61F n33 73 6C,26C,73C,53C4 R 7X,paCcimareCV61F n022
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315 3R,1R2 % 5MSm ho1 415 R1 % 5MSK 5.7 518 R1 % 5MSK 87.1 611 1R,9R2 % 5MSK 01 710 1R1 % 5MSK 1 812 1R1 % 5MSm ho003 913 1R1 % 5MSK 46.4 024 1R1 % 5MSK 60.8 129 1R1 % 5MSK 9.5 221 2R1 % 5MSK 1.2 322 2R1 % 5MSK 23.2 424 2R1 % 5MSK 78.4 526 2R1 % 5MSK 3.4 621 3R1 % 5MSm ho2.2 726 3R1 % 5MSm ho0 828 4R1 % 5MSK 3 920 5R1 % 5MSK 43.6 031 5R1 % 5MSK 67.5
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Single output, Current share Mode Evaluation Board - Bill of materials
16© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Vout DL1 SS/EN Test condition: 3.3Vin/5Vin, Io=0A DH1 Test condition: Io=20A Vout PWRGD Io Test condition: 3.3Vin/5Vin, Io=20A Test condition: 3.3Vin/5Vin, short circuit Vout PWRGD Io Test condition: Io=0 - 20A, T1=T2=3ms, RT=FT=2.5A/us Vout IL2 IL1 Io Test condition: 3.3Vin/5Vin, Io=20A Vout PWRGD Io Test condition:3.3Vin/5Vin, 1.4Vout@20A DH1 DL1 Vout Performance (Single output)
17© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Test condition:3.3Vin/5Vin, 1.4Vout@20A DH2 DL2 Vout OCP 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 5 10 15 20 25 30 Load Current (A) Vout (V) Vo (V) Load C urrent vs.V cs+ to Vout (mV) 0 5 10 15 20 25 30 Load Current (A) Vcs1+ to Vout1 (mV) V cs1+ to Vout1 V cs2+ to Vout2 3.3V and 5V Input Current 02468 1 0 1 2 1 4 1 6 1 8 2 0 Load Current (A) Input Current (A) Iin3.3 A Iin5 A Regualation Characteristic 1.4030 1.4035 1.4040 1.4045 1.4050 1.4055 1.4060 0 5 10 15 20 Load Current (A) Vout (V) Vout V Overall System Efficiency 0 2 4 6 8 10 12 14 16 18 20 Load Current (A ) Efficiency (%) Io Performance (Single output)
18© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Contact Information Semtech Corporation Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804 Outline Drawing - TSSOP-24 Land Pattern - TSSOP-24 L (L1) c GAGE PLANE SEE DETAIL DETAIL AA 0.25 .026 BSC .252 BSC .004 .169 .303 .173 .307 .007 - 0.10
0.65 BSC
6.40 BSC
4.40 7.80 .177 .311 4.30 7.70 .012 0.19 4.50 7.90 0.30 bxN 2X N/2 TIPS SEATING aaa C E/2 INDICATOR PIN 1 1 32 N REFERENCE JEDEC STD MO-153, VARIATION AD.4. INCHES b N ccc aaa bbb E L e D c DIM A MIN MAX MILLIMETERS MIN DIMENSIONS NOM MAX NOM E AA2 bbb C A-B D ccc C DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3. OR GATE BURRS. DATUMS AND TO BE DETERMINED AT DATUM PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). -B- NOTES: 2. -A- -H- SIDE VIEW (.039) .004 .008 .024 .018 .003 .031 .002 8 0 0.20 0.10 - 8 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 (1.0) 0.60 0.75 0.20 - 1.20 1.05 0.15 A B C De e/2 HPLANE D THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: (.222) (5.65) ZG Y P (C) 4.10.161 0.65.026 0.40.016 1.55.061 7.20.283 X INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS
19© 2009 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2677B Contact Information Semtech Corporation Power Management Products Division Phone: (805)498-2111 FAX (805)498-3804 Outline Drawing - TSSOP-24 EDP Land Pattern - TSSOP-24 EDP L (L1) c GAGE PLANE SEE DETAIL DETAIL A A 0.25 .026 BSC .252 BSC .004 .169 .303 .173 .307 .007 - 0.10 4.40 7.80 .177 .311 4.30 7.70 .012 0.19 4.50 7.90 0.30 bxN 2X N/2 TIPS SEATING aaa C E/2 INDICATOR PIN 1 1 32 N AA2 bbb C A-B D ccc C DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3. OR GATE BURRS. DATUMS AND TO BE DETERMINED AT DATUM PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). -B- OTES: 2. -A- -H- SIDE VIEW (.039) .004 .008 .024 .018 .003 .031 .002 8 0 0.20 0.10 - 8 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 (1.0) 0.60 0.75 0.20 - 1.20 1.05 0.15A B C De e/2 H PLANE D REFERENCE JEDEC STD MO-153, VARIATION AD.4. INCHES b N ccc aaa bbb E L e D c DIM A MIN MAX MILLIMETERS MIN DIMENSIONS NOM MAX NOM E H F VIEW BOTTOM H (.222) (5.65) ZG Y P (C) 4.10.161 0.65.026 0.40.016 1.55.061 7.20.283 X THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS F H .225 .126 5.72 3.20H F