SC2621A

SC2621A SEMTECH | Alldatasheet

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Technical content

Features

Applications

February 21, 2007 Typical Application Circuit

Description

The SC2621A provides the control and protection fea- tures necessary for a synchronous buck converter and a linear regulator in high performance graphic card appli- cations. The SC2621A is designed to directly drive the top and bottom MOSFETs of the buck converter. It uses an inter- nal 8.2V supply as the gate drive voltage for minimum driver power loss and MOSFET switching loss. It allows the converter to operate with 4V to 25V power rail and as low as 0.5V output. The SC2621A is capable to drive a N-type MOSFET in a linear regulator with as low as 0.5V output. The SC2621A features soft-start, supply power under voltage lockout, and hiccup mode over current protec- tion. The SC2621A monitors the output current by using the Rdson of the bottom MOSFET in the buck converter that eliminates the need for a current sensing resistor. The SC2621A is offered in SOIC-14 package. /g1174V to 25V power rails /g117Internal LDO for optimum gate drive voltage /g1171.5A gate drive current /g117Adaptive non-overlapping gate drives provide shoot-through protection for MOSFETs /g117Programmable output voltages /g117Internal soft start for both outputs /g117Power rail under voltage lockout /g117Hiccup mode short circuit protection /g117SOIC-14 package, fully RoHS and WEEE compliant /g117Graphics processor power supplies on PCI-Express platform /g117Embedded, low cost, high efficiency converters /g117Point of load power supplies 12V IN 1.5V OUT SC2621A BST OCS CO MP FB DRV DL GND DH LDOG PN LDFB GND NC VC C 2.5V OUT 3.3V IN 1 2

2 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Absolute Maximum Ratings

Electrical Characteristics

Unless specified: VCC = 5V to 16V; V FB = VO; VBST - VPN = 5V to 8.2V; T A = -25°C to 85°C Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of th e parameters specified in the Electrical Characteristics section is not implied. retemaraPl obmySs noitidnoCn iMp yTx aMs tinU lareneG egatloVylppuSCCVV CC 46 1V tnerruCtnecseiuQCCVI CCVQ VCC V,V21= BST V- PN V2.8= 57 A m tuokcoLegatloVrednUCCVV U CCV V TSYH Vm001=4 V egatloVylppuSNPotTSBV NP_TSB 40 1V tnerruCtnecseiuQTSBI TSBQ VCC V,V21= BST V- PN V2.8= 3A m ODLlanretnI tuptuOODLV VRD V<V6.8 CC V61<2 .8V egatloVtuoporDV PORD V<V4 CC V6.8<4 .0V retemaraPl obmySm umixaMs tinU egatloVylppuStupnIV CC 81V DNGotTSBV TSB 04V NPotTSBV NP_TSB 01V DNGotNPV NP 03ot1-V t(esluPevitageNDNGotNP eslup )sn02<V ESLUP_NP 5-V DNGotLDV LD ot1-0 1+V t(esluPevitageNDNGotLD eslup )sn02<V ESLUP_LD 3-V NPotHDV NP_HD ot1-0 1+V t(esluPevitageNNPotHD eslup )sn02<V ESLUP_HD 3-V DNGotVRDV VRD 01V egnaRerutarepmeTtneibmAgnitarepOT A 58ot52-C ° erutarepmeTnoitcnuJgnitarepOT J 521ot52-C ° tneibmAotnoitcnuJecnatsiseRlamrehT θ AJ 001W /C° esaCotnoitcnuJecnatsiseRlamrehT θ CJ 23W /C° s01)gniredloS(erutarepmeTdaeLT DAEL 003C ° erutarepmeTegarotST GTS 051ot56-C °

3 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Notes: (1) This device is ESD sensitive. Use of standard ESD handling precautions is required. (2) Guaranteed by design, not tested in production. Unless specified: VCC = 5V to 16V; V FB = VO; VBST - VPN = 5V to 8.2V; T A = -25°C to 85°C retemaraPl obmySs noitidnoCn iMp yTx aMs tinU noitceSraeniL egatloVecnerefeRV LO V=BFDL LO T, A V,C°52= CC V21=5 94.00 05.05 05.0V niaG )2( A LLO GODLotBFDL0 7B d noitalugeRdaoLI O V,A1ot0= IN V,V3.3= CC V21=4 .0% noitalugeReniLV IN V,V4.3otV2.3= CC V21=4 .0% noitcejeRylppuSCCVV IN V,V3.3= CC V41otV01=4 .0% tnerruCgnicruoSetaG V5.6=ETAGV1 A m tnerruCgnikniSetaG V5.6=ETAGV1 A m tnerruCsaiBtupnIBFDL V5.0=BFDL2 .0-0 .1-A u emiTtratStfoSV IN V,V3.3= CC T,V21= A C°52=5 .1s m noitceSgnihctiwS egatloVecnerefeRV FER TA V,C°52= CC V21=5 94.00 05.05 05.0V noitalugeRdaoLI O A4ot2.0=4 .0% noitalugeReniLV CC V41otV01=4 .0% ycneuqerFgnitarepOF S 0040 545 25z Hk edutilpmApmaR )2( Vm 8.0V elcyCytuDmumixaM )2( D XAM 79% emiT-nOmuminiM )2( T NIM_NO 521s n emiTgnillaF/gnisiRHD t HD_CRS CtagniwSV6 L Fn3.3= V TSB V- NP V2.8= sn t HD_KNIS 72 emiTgnillaF/gnisiRLD t LD_CRS CtagniwSV6 L Fn3.3= V VRD V2.8= sn t LD_KNIS 24 emiTgnippalrevonoNLD,HD 03s n emiTtratStfoST A V,C°52= CC V21=5 .1s m reifilpmArorrEegatloV egatloVtesffOtupnI )2( 2V m tnerruCtesffOtupnI )2( 04A n niaGpooLnepO )2( 08B d htdiwdnaBniaGytinU )2( 01z HM tnerruCecruoStuptuO 9.0A m tnerruCkniStuptuO 9.0A m etaRwelS )2( daoLFp005=LCroF2 .1s u/V

4 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Pin Configuration Ordering Information Pin Descriptions Note: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2). Lead free products. This product is fully WEEE and RoHS compliant. srebmuNtraPe gakcaP TRTSA1262CS )2()1( 41-OS BVEA1262CS 41-OSe maNniPn oitcnuFniP 1T SB. saibevirdetagpotroftupnitsooB 2S CO tnioppirtehtmargorpotdnuorgotnipsihtmorfrotsiseratcennoC.gnittestimiltnerruC .tnerrucdaolfo 3P MOC. noitasnepmocroftuptuoreifilpmarorrE 4B F .retrevnockcubsuonorhcysfokcabdeefegatloV 5G ODL .etagTEFSOM-NlanretxeehtotnipsihttcennoC.evirdetagODLlanretxE 6B FDL .tuptuorotalugerraenilehtotnipsihttcennoC.kcabdeefODLlanretxE 7D NG. dnuorgpihC 8C CV. ylppusrewoptupnipihC 9C N. noitcennocoN 01V RD rofdnuorgotnipsihtmorfrotisapaccimarecFu1atcennoC.tuptuoODLlanretnI .srevirdetaggnidulcni,saibpihcrofdesusiegatlovsihT.gnilpuoced 11L D .TEFSOMmottobrofevirdetaG 21D NG. dnuorgpihC 31N P. niardTEFSOM-NmottobotnipsihttcennoC.edonesahP 41H D. TEFSOMpotrofevirdetaG DH BST SOIC-14 TOP VIEW PN OCS GND COMP DL FB DRV LDOG NC LDFB VCC GND

5 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Block Diagram 8.2V

6 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A THEORTHEORTHEORTHEORTHEOR Y OF OPERAY OF OPERAY OF OPERAY OF OPERAY OF OPERA TIONTIONTIONTIONTION The SC2621A integrates a high-speed, voltage mode PWM controller with a linear controller into a single pack- age. It is designed to control two independent output voltages for high performance graphic card applications. As shown in the block diagram of the SC2621A, the volt- age-mode PWM controller consists of an error amplifier, a 450kHz ramp generator, a PWM comparator, a RS latch circuit, and two MOSFET drivers. The buck converter out- put voltage is fed back to the error amplifier negative input and is regulated to a reference voltage level. The error amplifier output is compared with the ramp to gen- erate a PWM wave, which is amplified and used to drive the MOSFETs in the buck converter. The PWM wave at the phase node with the amplitude of Vin is filtered out to get a DC output. The linear controller is an error ampli- fier. It provides the gate drive and output voltage control for a linear regulator. Both PWM controller and linear con- troller work with soft-start and fault monitoring circuitry to meet application requirement. UVLO, Start-up and ShutdownUVLO, Start-up and ShutdownUVLO, Start-up and ShutdownUVLO, Start-up and ShutdownUVLO, Start-up and Shutdown To initiate the SC2621A, a supply voltage is applied to Vcc pin. The top gate (DH) and bottom gate (DL) are held low until Vcc voltage exceed UVLO (Under Voltage Lock Out) threshold, typically 4.0V. Then the internal Soft-Start (SS) capacitor begins to charge, the top gate remains low, and the bottom gate is pulled high to turn on the bottom MOSFET. When the SS voltage at the capacitor reaches 0.4V, the linear controller is enabled and the LDO output is turned on. Meanwhile, the top and bottom gates of PWM controller begin to switch. The switching regulator output is slowly ramping up for a soft turn-on. If the supply voltages at Vcc pin falls below UVLO thresh- old during a normal operation, the SS capacitor begins to discharge. When the SS voltage reaches 0.4V, the PWM controller controls the switching regulator output to ramp down slowly for a soft turn-off. Meanwhile, the linear controller is disabled and LDO output is turned off. Hiccup Mode Short Circuit ProtectionHiccup Mode Short Circuit ProtectionHiccup Mode Short Circuit ProtectionHiccup Mode Short Circuit ProtectionHiccup Mode Short Circuit Protection The SC2621A uses low-side MOSFET R dson sensing for over current protection. In every switching cycle, after the bottom MOSFET is on for 150ns, the SC2621A de- tects the phase node voltage and compares it with an internal setting voltage. If the phase node is lower than the setting voltage, an overcurrent condition occurs. The SC2621A will discharge the internal SS capacitor and shutdown both outputs. After waiting for around 5 milli- seconds, the SC2621A begins to charge SS capacitor again and initiates a fresh startup. The startup and shut- down cycle will repeat until the short circuit is removed. This is called a hiccup mode short circuit protection. To program a load trip point for short circuit protection, it is recommended to connect a 3.3k resistor from the OCS pin to the ground, and a resistor R set from the OCS pin to the DRV pin, as shown in Fig. 1. SC2621A GND OCS DRV VC C10 3.3k Rs et 12V SC2621A GND OCS DRV VC C10 3.3k Rs et 12V Fig. 1. Programming load trip point 150 175 200 225 250 275 300 325 350 0 100 200 300 400 500 600 Rset (k-ohm) Vpn (mV) 150 175 200 225 250 275 300 325 350 0 100 200 300 400 500 600 Rset (k-ohm) Vpn (mV) Fig. 2. Pull up resistor (R set) vs. trip voltage Vpn The resistor Rset can be found in Fig. 2 for a given phase node voltage Vpn at the load trip point. This voltage is the product of the inductor peak current at the load trip point and the R dson of the low-side MOSFET: on_dspeakpn RIV /g180/g61 The soft start time of the SC2621A is fixed at around Applications Information

7 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A 1.5ms. Therefore, the maximum soft start current is de- termined by the output inductance and output capaci- tance. The values of output inductor and output bulk capacitors have to be properly selected so that the soft start peak current does not exceed the load trip point of the short circuit protection. Internal LDO for Gate DriveInternal LDO for Gate DriveInternal LDO for Gate DriveInternal LDO for Gate DriveInternal LDO for Gate Drive An internal LDO is designed in the SC2621A to lower the 12V supply voltage for gate drive. An 1uF external ce- ramic capacitor connected in between DRV pin to the ground is needed to support the LDO. The LDO output is connected to low gate drive internally, and has to be connected to high gate drive through an external boot- strap circuit. The LDO output voltage is set at 8.2V. The manufacture data and bench tested results show that, for low R dson MOSFETs run at applied load current, the optimum gate drive voltage is around 8.2V, where the total power losses of power MOSFETs are minimized. COMPONENT SELECTIONCOMPONENT SELECTIONCOMPONENT SELECTIONCOMPONENT SELECTIONCOMPONENT SELECTION General design guideline of switching power supplies can be applied to the component selection for the SC2621A. InductInductInductInductInduct or and MOSFETor and MOSFETor and MOSFETor and MOSFETor and MOSFET sssss The selection of inductor and MOSFETs should meet ther- mal requirement because they are power loss dominant components. Pick an inductor with as high inductance as possible without adding extra cost and size. The higher inductance, the lower ripple current, the smaller core loss and the higher efficiency will be. However, too high in- ductance slows down output transient response. It is rec- ommended to choose the inductance that gives the in- ductor ripple current to be approximate 20% of maxi- mum load current. So choose inductor value from: )1(5 IN O O oscO V VVfIL /g45/g215/g215/g215/g61 The MOSFETs are selected from their Rdson, gate charge, and package. The SC2621A provides 1.5A gate drive cur- rent. To drive a 50nC gate charge MOSFET gives 50nC/ 1.5A=33ns switching time. The switching time ts contrib- utes to the top MOSFET switching loss: OSCSINOS ftVIP /g215/g215/g215/g61 There is no significant switching loss for the bottom MOSFET because of its zero voltage switching. The con- duction losses of the top and bottom MOSFETs are given by: DRIP dsonOTOPC /g215/g215/g612 )1(2 _ DRIP dsonOBOTC /g45/g215/g215/g61 If the requirement of total power losses for each MOSFET is given, the above equations can be used to calculate the values of R dson and gate charge can be calculated using above equations, then the devices can be deter- mined accordingly. The solution should ensure the MOSFET is within its maximum junction temperature at highest ambient temperature. Output CapacitorOutput CapacitorOutput CapacitorOutput CapacitorOutput Capacitor The output capacitors should be selected to meet both output ripple and transient response criteria. The output capacitor ESR causes output ripple V RIPPLE during the inductor ripple current flowing in. To meet output ripple criteria, the ESR value should be: )1( IN O O RIPPLEOSC ESR V VV VfLR /g45/g215 /g215/g215/g60 The output capacitor ESR also causes output voltage tran- sient V T during a transient load current I T flowing in. To meet output transient criteria, the ESR value should be: T T ESR I VR /g60 To meet both criteria, the smaller one of above two ESRs is required. The output capacitor value also contributes to load tran- sient response. Based on a worst case where the induc- tor energy 100% dumps to the output capacitor during the load transient, the capacitance then can be calcu- lated by: T T V ILC /g215/g62 Applications Information (Cont.)

8 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) Input CapacitorInput CapacitorInput CapacitorInput CapacitorInput Capacitor The input capacitor should be chosen to handle the RMS ripple current of a synchronous buck converter. This value is given by: 22 )()1( INoINRMS IIDIDI /g45/g215/g43/g215/g45/g61 where Io is the load current, I IN is the input average cur- rent, and D is the duty cycle. Choosing low ESR input capacitors will help maximize ripple rating for a given size. MOSFET for Linear RegulatorMOSFET for Linear RegulatorMOSFET for Linear RegulatorMOSFET for Linear RegulatorMOSFET for Linear Regulator The MOSFET in linear regulator operates in linear region with really high power loss. A device with a suitable pack- age has to be selected to handle the loss. To prevent too high load current during short circuit, the R dson of the MOSFET should not be selected too low. A good choice is to select a MOSFET so that it is almost fully turned on at maximum load current. For example, in a LDO design with 3.3V in and 1.5V/2A out, a MOSFET with 600 to 800m- ohm R dson can be chosen. Bootstrap CircuitBootstrap CircuitBootstrap CircuitBootstrap CircuitBootstrap Circuit The SC2621A uses an external bootstrap circuit to pro- vide a voltage at BST pin for the top MOSFET drive. This voltage, referring to the Phase Node, is held up by a bootstrap capacitor. Typically, it is recommended to use a 1uF ceramic capacitor with 16V rating and a commonly available diode IN4148 for the bootstrap circuit. Filters for Supply PowerFilters for Supply PowerFilters for Supply PowerFilters for Supply PowerFilters for Supply Power For each pin of DRV and Vcc, it is recommended to use a 1uF/16V ceramic capacitor for decoupling. In addition, place a small resistor (10 ohm) in between Vcc pin and the supply power for noise reduction. CONTROL LOOP DESIGNCONTROL LOOP DESIGNCONTROL LOOP DESIGNCONTROL LOOP DESIGNCONTROL LOOP DESIGN The goal of compensation is to shape the frequency re- sponse charateristics of the buck converter to achieve a better DC accuracy and a faster transient response for the output voltage, while maintaining the loop stability. The block diagram in Fig. 3 represents the control loop of a buck converter designed with the SC2621A. The control loop consists of a compensator, a PWM modula- tor, and a LC filter. The LC filter and PWM modulator represent the small signal model of the buck converter operating at fixed switching frequency. The transfer function of the model is given by: LCsRsL CsR V V V V ESR m IN C O /g43/g43 /g43/g215/g61 where VIN is the power rail voltage, Vm is the amplitude of the 500kHz ramp, and R is the equivalent load. L Vo Co SC26 21 A AN D M OSFETS FB OUT COMP PWM MODULAT OR REF + EA Resr Zf Zs Vc Fig. 3. Block diagram of the control loop The model is a second order system with a finite DC gain, a complex pole pair at Fo, and an ESR zero at Fz, as shown in Fig. 4. The locations of the poles and zero are determined by: LC FO 1/g61 CRF ESR Z 1/g61 The compensator in Fig. 3 includes an error amplifier and impedance networks Zf and Zs. It is implemented by the circuit in Fig. 5. The compensator provides an integrator, double poles and double zeros. As shown in Fig. 4, the integrator is used to boost the gain at low frequency. Two zeros are introduced to compensate excessive phase lag at the loop gain crossover due to the integrator (-90deg) and complex pole pair (-180deg). Two high fre- quency poles are designed to compensate the ESR zero and attenuate high frequency noise.

9 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) 100 1K 10K 100K 1M -60 -30 Fo Fz Fz1 Fz2 Fp1 Fp2 Fc GAIN (dB) FREQUENCY (Hz) COMPE NSATOR GAIN CONVERTER GAIN LOOP GAIN 100 1K 10K 100K 1M -60 -30 Fo Fz Fz1 Fz2 Fp1 Fp2 Fc GAIN (dB) FREQUENCY (Hz) COMPE NSATOR GAIN CONVERTER GAIN LOOP GAIN Fig. 4. Bode plots for control loop design Rb ot Vo VREF 0.5V R2 R3 Rt op + 3 Vc Fig. 5. Compensation network The top resistor R top of the voltage divider in Fig. 5 can be chosen from 1k to 5k. Then the bottom resistor R bot is found from: top O bot RVV VR /g215/g45/g61 5.0 5.0 where 0.5V is the internal reference voltage of the SC2621A. The other components of the compensator can be cal- culated using following design procedure: (1). Plot the converter gain, including LC filter and PWM modulator. (2). Select the open loop crossover frequency Fc located at 10% to 20% of the switching frequency. At Fc, find the required DC gain. (3). Use the first compensator pole Fp1 to cancel the ESR zero Fz. (4). Have the second compensator pole Fp2 at half the switching frequency to attenuate the switching ripple and high frequency noise. (5). Place the first compensator zero Fz1 at or below 50% of the power stage resonant frequency Fo. (6). Place the second compensator zero Fz2 at or below the power stage resonant frequency Fo. A MathCAD program is available upon request for the calculation of the compensation parameters. LALALALALAYYYYYOUT GUIDELINESOUT GUIDELINESOUT GUIDELINESOUT GUIDELINESOUT GUIDELINES The switching regulator is a high di/dt power circuit. Its Printed Circuit Board (PCB) layout is critical. A good lay- out can achieve an optimum circuit performance while minimizing the component stress, resulting in better sys- tem reliability. During PCB layout, the SC2621A control- ler, MOSFETs, inductor, and power decoupling capacitors have to be considered as a unit. The following guidelines are typically recommended for using the SC2621A controller. (1). Place a 4.7uF to 10uF ceramic capacitor close to the drain of top MOSFET for the high frequency and high current decoupling. The loop formed by the capacitor, the top and bottom MOSFETs must be as small as pos- sible. Keep the input bulk capacitors close to the drain of the top MOSFETs. (2). Place the SC2621A over a quiet ground plane to avoid pulsing current noise. Keep the ground return of the gate drive short. (3). Connect bypass capacitors as close as possible to the decoupling pins (DRV and Vcc) to the ground pin GND. The trace length of the decoupling capasitor on DRV pin should be no more than 0.2” (5mm). (4). Locate the components of the bootstrap circuit close to the SC2621A.

10 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) T T T T T ypical Application Schematics fypical Application Schematics fypical Application Schematics fypical Application Schematics fypical Application Schematics f or PCI-Express with 12V Inor PCI-Express with 12V Inor PCI-Express with 12V Inor PCI-Express with 12V Inor PCI-Express with 12V In putputputputput Bill of Materials (12V Input)Bill of Materials (12V Input)Bill of Materials (12V Input)Bill of Materials (12V Input)Bill of Materials (12V Input) R12 SC2621A BST OC S COMP FB DRV DL GN D DH LD OG PN LD FB NC NC VC C 301 + C4 1800uF R10 14. 7k R15 11. 5k IPD 05N 03 2R 2 2.2nF C12 2.2nF 1R 0C11 1uF R13 7.32k 2.5V/2A + C7 1800uF 1.2uH 1 2 + C10 1800uF IPD 05N 03 C15 680pF 499k C5 1uF 560uF 1.5V/15A 10uF C13 1uF SPD14N 06 R11 10uF 12V C14 10nF 3.3V D1N4148 3.3k Item Quantity Reference Part Vendor 1 1 C1 10uF/16V Vishay 2 1 C9 10uF/6.3V Vishay 3 1 C4 1800uF/16V Rubycon, MBZ 4 2 C7,C10 1800uF/6.3V Rubycon, MBZ 5 3 C5,C11,C13 1uF Vishay 6 1 C6 2.2nF Vishay 7 1 C8 560uF Sanyo 81 C 1 2 2 . 2 n F V i s h a y

91 C 1 4 1 0 n F V i s h a y

12 1 L1 1.2uH Cooper Electr. Tech 13 2 Q3,Q1 IPD05N03 Infineon 14 1 Q2 SPD14N06 Infineon 15 1 R1 2R2 Vishay 16 1 R3 3.3k Vishay 17 1 R4 499k Vishay 18 1 R6 301 Vishay 19 1 R9 1R0 Vishay 20 1 R10 14.7k Vishay 21 1 R11 8k Vishay 22 1 R12 2k Vishay 23 1 R13 7.32k Vishay 24 1 R15 11.5k Vishay 25 1 U1 SC2621A SEMTECH

11 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) PPPPPererererer ffffformance Charactormance Charactormance Charactormance Charactormance Charact eristics (12V Ineristics (12V Ineristics (12V Ineristics (12V Ineristics (12V In put)put)put)put)put) Load Characteristics (Output vs Load Current) Gate Waveforms (Io=15A) Transient Response Short Circuit Protection Start upEfficiency (%) vs Load Current DH (10V/DIV) DL (10V/DIV) PN (10V/DIV) X=50ns/DIV 13579 1 1 1 3 1 5 Load Current (A) 13579 1 1 1 3 1 5 Load Current (A) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 5 10 15 20 Load Current(A) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 5 10 15 20 Load Current(A) 1.5V Output (1V/DIV) 12V Input (5V/DIV) 2.5V Output (2V/DIV) 3.3V Input (2V/DIV) X=5ms/DIV Step Load Current (10A/DIV) 1.5V Output Response (100mV/DIV) X=20us/DIV 1.5V OUT (1V/DIV) Output Current (10A/DIV) Output Short X=5ms/DIV

12 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) T T T T T ypical Application Schematics with 25V Inypical Application Schematics with 25V Inypical Application Schematics with 25V Inypical Application Schematics with 25V Inypical Application Schematics with 25V In putputputputput Bill of Materials (25V Input)Bill of Materials (25V Input)Bill of Materials (25V Input)Bill of Materials (25V Input)Bill of Materials (25V Input) Item Quantity Reference Part Vendor 1 1 C1 10uF/35V Murata 2 1 C9 10uF/6.3V Vishay 3 1 C4 1500uF/35V Rubycon 4 1 C10 1500uF/6.3V Rubycon, MBZ 5 3 C5,C11,C13 1uF Vishay 6 1 C6,C12 2.2nF Vishay 7 1 C8 560uF Sanyo 8 1 C14 4.7nF Vishay 9 1 C15 1nF Vishay 10 1 D1 D1N4148 Any 11 1 D2 BZX84B16LT1 ON Semi 12 1 L1 2.2uH Cooper Electr. Tech 13 2 Q3,Q1 IRLR7821 IR 14 1 Q2 SPD14N06 Infineon 15 1 R1 732 Vishay 16 1 R3 3.3k Vishay 17 1 R4 499k Vishay 18 1 R6 301 Vishay 19 1 R9 1R0 Vishay 20 1 R10,R15 22k Vishay 21 1 R11 11.3k Vishay 22 1 R12 2k Vishay 23 1 R13 2.43k Vishay 24 1 U1 SC2621A SEMTECH C15 1nF 732 C14 4.7nF R10 22k 560uF R12 2k 0 R4 499k D1N4148 10uF Vin=25V IRLR7821 1uF SPD14N 06 R11 11. 3k Note: Zener diode D2 is required when Vin is 18V or higher. BZ X84B16LT 1 1R 0 3.3V/1A IRLR7821 2.2nF C13 1uF + C4 1800uF + C10 1800uF 2.2uH 1 2 R15 22k SC2621A BST OC S COMP FB DRV DL GN D DH LD OG PN LD FB NC NC VC C 5V /10A C12 2.2nF C11 1uF0 R13 2.43k 301 10uF 3.3k

13 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Applications Information (Cont.) PPPPPererererer ffffformance Charactormance Charactormance Charactormance Charactormance Charact eristics (25V Ineristics (25V Ineristics (25V Ineristics (25V Ineristics (25V In put)put)put)put)put) Gate Waveforms (Io=10A) Transient Response Start upEfficiency (%) vs Load Current 123456789 1 0 Load Current (A) 123456789 1 0 Load Current (A) DH (10V/DIV) DL (10V/DIV) PN (10V/DIV) X=100ns/DIV DH (10V/DIV) DL (10V/DIV) PN (10V/DIV) X=100ns/DIV 5V Output (2V/DIV) 25V Input (10V/DIV) 3.3V Output (1V/DIV) X=5ms/DIV Step Load Current (10A/DIV) 5V Output Response (200mV/DIV) X=20us/DIV

14 2007 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2621A Land Pattern - SO-14 Outline Drawing - SO-14 SEE DETAIL DETAIL AA .050 BSC .236 BSC .010 .150 .337 .154 .341 .012 - 0.25

1.27 BSC

6.00 BSC

3.90 8.65 .157 .344 3.80 8.55 .020 0.31 4.00 8.75 0.51 bxN 2X N/2 TIPS SEATING aaa C E/22X A D bbb C A-B D ccc C (.041) .004 .008 .028 .016 .007 .049 .004 .053 8° 0° 0.20 0.10 - 8° 0.40 0.17 1.25 0.10 .041 .010 .069 .065 .010 1.35 (1.04) 0.72 1.04 0.25 - 1.75 1.65 0.25 c L (L1) 01 0.25 GAGE PLANE h hPLANE N A e D C H B 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. -B- CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DATUMS AND TO BE DETERMINED AT DATUM PLANE NOTES: 2. -A- -H- SIDE VIEW REFERENCE JEDEC STD MS-012, VARIATION AB.4. ccc aaa bbb N DIM D DIMENSIONS MILLIMETERS MIN e L h E b c INCHES NOMMIN A MAX MAX NOM E ZG Y P (C) X THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: REFERENCE IPC-SM-782A, RLP NO. 302A.2. .291 .087 .024 .118 (.205) INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS .050 (5.20) 7.40 2.20 0.60 3.00 1.27 Semtech Corporation Power Management Products Division

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