SC2620 SEMTECH | Alldatasheet

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2 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Absolute Maximum Ratings

Electrical Characteristics

Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. retemaraPl obmySx aMs tinU egatloVtupnIV NI 23ot3.0-V niPtsooBV TSB 24V WSevobAniPtsooBV TSB V- WS 42V egatloVniP1DOOGPV 1DOOGP V NI V sniPSSV SS 3V sniPBFV BF Vot3.0- NI V egatloVWS V WS Vot6.0- NI V egnaRerutarepmeTtneibmAgnitarepOT A 58ot04-C ° tneibmAotnoitcnuJecnatsiseRlamrehT θ AJ 13W /C° esaCotnoitcnuJecnatsiseRlamrehT θ CJ 9.3W /C° erutarepmeTnoitcnuJmumixaMT J 051C ° egnaRerutarepmeTegarotST GTS 051+ot56-C ° ces01)gniredloS(erutarepmeTdaeLT DAEL 003C ° )ledoMydoBnamuH(gnitaRDSE) 1etoN(D SE0 051V retemaraP snoitidnoC niMp yTx aMs tinU egnaRegatloVtupnI 8.20 3V V NI egatloVtratS 54.22 6.28 7.2V V NI siseretsyHtratS 57V m tnerruCtnecseiuQn epO1DOOGP,gnihctiwstoN5 .35 A m tnerruCnwodtuhSV 1SS V= 2SS nepO1DOOGP,0=0 40 6A µ egatloVkcabdeeF 089.00 00.10 20.1V noitalugeReniLegatloVkcabdeeFV NI V03otV3=5 00.0V /% tnerruCsaiBtupnIniPBFV BF V,V1= PMOC V5.1=5 1-0 3-A n ecnatcudnocsnarTreifilpmArorrE 082µ Ω 1- niaGpool-nepOreifilpmArorrE 35B d tnerruCecruoSPMOCV BF V,V8.0= PMOC V5.1=0 2A µ Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1kΩ , VIN = 5V, VBOOST = 8V Note 1: This device is ESD sensitive. Standard ESD handling precaution is required.

3 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1kΩ , VIN = 5V, VBOOST = 8V retemaraP snoitidnoC niMp yTx aMs tinU tnerruCkniSPMOCV BF V,V2.1= PMOC V5.1=0 2A µ niaGtnerruChctiwSotniPPMOC 8V /A dlohserhTgnihctiwSPMOC 7.01 .13 .1V egatloVmumixaMPMOCV BF V9.0=4 .2V ycneuqerFgnihctiwSlennahC 2.14 .16 .1z HM elcyCytuDmumixaM) 3etoN(0 80 9% timiLtnerruChctiwS) 4dna2setoN(3 .22 .3A egatloVnoitarutaShctiwSI WS A2-=3 .0V tnerruCegakaeLhctiwS 01A µ egatloVtsooBmuminiMI WS )2etoN(A2-=8 .15 .2V tnerruCniPtsooB I WS A5.0-=0 2A m I WS A2-=0 6A m tixEotegatloVtratS-tfoSmuminiM nwodtuhS 2SSotdeiT1SS2 .04 .07 .0V tnerruCgnigrahCtrats-tfoS V SS V0=2 A µ V SS V5.1=8 .1A µ tnerruCgnigrahcsiDtrats-tfoSV SS V5.1=8 .0A µ otegatloVtrats-tfoSmuminiM ffotuhSdaolrevOelbanE V SS gnisiR2 V dlohserhTdaolrevOBFV SS V,V3.2= BF gnillaF7 .0V tratseRotegatloVtrats-tfoS ffotuhSdaolrevOretfAgnihctiwS V SS gnillaF7 .01 3 .1V 1BFwoleBdlohserhTdooGrewoPV 1BF gnisiR0 80 010 21V m egatloVwoLtuptuOdooGrewoPV 1BF I,V8.0= 1DOOGP Aµ052=2 .04 .0V tnerruCegakaeLniPdooGrewoP V 1DOOGP V5= 1.01A µ erutarepmeTnwodtuhSlamrehT 551C ° siseretsyHnwodtuhSlamrehT 01C ° The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be achieved by lowering the operating frequency. Note 2: Guaranteed by design, not 100% tested in production. Note 3: Note 4: Switch current limit does not vary with duty cycle.

4 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Pin Configuration Ordering Information Underside metal must be soldered to ground. Pin # Pin Name Pin Function 1, 8 FB1, FB2 The inverting inputs of the error amplifiers. Each FB pin is tied to a resistive divider between its output and ground to set the channel output voltage. 2, 7 BOOST1, BOOST2 Supply pins to the power transistor drivers. Tie to external diode-capacitor charge pumps to generate drive voltages higher than VIN in order to fully enhance the internal NPN power switches. 3, 6 SW1, SW2 Emitters of the internal power NPN transistors. Each SW pin is connected to the corresponding inductor, freewheeling diode and bootstrap capacitor. 4, 5 PVIN1, PVIN2 Collectors of the internal power transistors and the power supplies to the corresponding current sensing circuits. Pins 4 and 5 are not internally connected. They must be joined on the PCB and closely bypassed to the power ground plane. 9, 16 COMP1, COMP2 Outputs of the internal error amplifiers. The voltages at these pins control the peak switch currents. RC networks at these pins stabilize the control loops. Pulling either pin below 0.7V stops the corresponding switching regulator. 10, 14 SS1, SS2 A capacitor from either SS pin to ground provides soft-start and overload hiccup functions for that channel. Pulling either SS pin below 0.8V with an open drain or collector transistor shuts off the corresponding regulator. To completely shut off the SC2620 to low-current state, pull both SS pins to ground. Soft-start is recommended for all applications. 11 GND Analog ground. Connect to the PCB power ground plane at a single point. 12 VIN Power supply to the analog control section of the SC2620. Connect to the PVIN pins through an optional RC filter. 13 ROSC An external resistor between this pin and the analog ground sets the channel switching frequency.

15 PGOOD1

Open collector output of Channel 1 power good comparator. Tie to an external pull-up resistor from the input or the output of the converter. PGOOD1 output becomes valid as soon as VIN rises above 1 VBE during power-up. PGOOD1 is actively pulled low until FB1 voltage rises to within 10% of its final regulation voltage. Underside Metal The exposed pad at the bottom of the package is electrically connected to the ground pin of the SC2620. It also serves as a thermal contact to the circuit board. It is to be soldered to the analog ground plane of the PC board. Pin Descriptions Part Number Package SC2620SETRT(1)(2) SOIC-16 EDP SC2620EVB Evaluation Board Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. FB1 BOOST1 TOP VIEW (16 Pin SOIC-EDP) COMP1 SW1 PGOOD1 PVIN1 SS1 GND SS2 ROSC VIN COMP2 SW2 FB2 BOOST2 PVIN2

13 GND 11

Figure 2. SC2620 Block Diagram (Channel 1) Figure 3. Details of the Soft-Start and Overload Hiccup Control Circuit

6 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Typical Characteristics Feedback Voltage vs Tem perature 0.97 0.98 0.99 1.00 1.01 1.02 -50 -25 0 25 50 75 100 125 Temperature (°C) VFB (V) VIN = 5V Switch Saturation Voltage vs Switch Current 100 200 300 400 Switch Current (A) VCESAT (mV) 25°C 125°C -40°C SS Shutdown Threshold vs Tem perature 0.20 0.25 0.30 0.35 0.40 - 5 0- 2 5 0 2 5 5 0 7 51 0 0 1 2 5 Temperature (°C) SS Threshold (V) VSS1 = VSS2 Boost Pin Current vs Switch Current Switch Current (A) Boost Pin Current (mA) 125°C -40°C VIN = 5V VBST = 8V Frequency Setting Resistor vs Channel Frequency 100 1000 0.0 0.5 1.0 1.5 Frequency (MHz) ROSC (kΩ ) VIN = 5V Normalized Channel Frequency vs Temperature 0.90 0.95 1.00 1.05 1.10 -50 -25 0 25 50 75 100 125 Temperature (°C) Normalized Frequency 600kHz 1.4MHz Switch Current Limit vs Tem perature 2.6 2.8 3.0 3.2 3.4 3.6 -50 -25 0 25 50 75 100 125 Temperature (°C) Current Limit (A) VIN Shutdown Current vs V IN 100 150 200 0 5 10 15 20 25 30 VIN (V) VIN Current (PA) TA = 25°C VSS1 = VSS2 = 0 VIN Quiescent Current vs VIN 0 5 10 15 20 25 30 VIN (V) VIN Current (mA) TA = 25°C

7 © 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Typical Characteristics FB Overload Threshold vs Temperature 0.5 0.6 0.7 0.8 0.9 1.0 -50 -25 0 25 50 75 100 125 Temperature (°C) FB Threshold (V) Soft-Start Pin Current vs Soft-Start Voltage -120 -100 -80 -60 -40 -20 V SS (V) ISS (µA) ISS of the Other Channel (VSS = 0) ISS of the Swept Channel T = 25°C VIN =5V Efficiency vs Load Current 0 0.5 1 1.5 2 Load Current (A) Efficiency (%) VOUT1 = 3.3V VOUT2 = 1.2V Figure 1(a), VIN=12V VIN Supply Current vs Soft-Start Voltage VSS (V) IIN (mA) VSS1 = VSS2 TA = 25°C VIN = 5V VCOMP1 = 0 VCOMP2 = 0 PGOOD1 Threshold to VFB Difference Voltage vs Tem perature -100 -98 -96 -94 -92 -90 - 5 0 - 2 50 2 55 07 5 1 0 0 1 2 5 Temperature (°C) Voltage (mV )

8 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Operation The SC2620 is a 30V 2-channel constant-frequency peak current-mode step-down switching regulator with integrated 2.3A power transistors. Both regulators in the SC2620 operate from a common input power supply and share the same voltage reference and the master oscillator. Turn-on of the power transistors is phase-shifted by 180 °. The two regulator cores are otherwise completely identical, independent and are capable of producing two separate outputs from the same input. The channel frequency can be programmed with an external resistor from the ROSC pin to ground. This allows the designer to set the switching frequency according to the input to the output voltage conversion ratio. Peak current-mode control is utilized for the SC2620. The double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop, easing loop compensation. Fast transient response can be achieved with a simple Type-2 compensation network. Switch collector current is sensed with an integrated 6.3mΩ sense resistor. The sensed current is summed with slope- compensating ramp before it is compared with the transconductance error amplifier output. The PWM comparator tripping point determines the switch turn-on pulse width (Figure 2). The current-limit comparator ILIM turns off the power switch when the sensed-signal exceeds the 20mV current-limit threshold. ILIM therefore provides cycle-by-cycle limit. Current-limit does not vary with duty- cycle. An external charge pump (formed by the capacitor C 2 and the diode D 3 in Figure 1(a)) generates a voltage higher than the input rail at the BOOST pin. The bootstrapped voltage generated becomes the supply voltage for the power transistor driver. Driving the base of the power transistor above the input power supply rail minimizes the power transistor turn-on voltage and maximizes efficiency. The SS pin is a multiple-function pin. An external capacitor connected from the SS pin to ground together with the internal 1.8µA and 2.6µA current sources set the soft- start and overload shutoff times of the regulator (Figure 3). The SS pin can also be used to shut off the corresponding regulator. When either SS pin is pulled below 0.8V, that regulator is turned off. If both SS pins are pulled below 0.2V, then the SC2620 undergoes overall shutdown. The current drawn from the input power supply reduces to 40µA. When either SS pin is released, the corresponding soft-start capacitor is charged with a 2µA current source (not shown in Figure 3). As either SS voltage exceeds 0.3V, the internal bias circuit of the SC2620 is enabled. The SC2620 draws 3.5mA from V IN. An internal fast charge circuit quickly charges the soft-start capacitor to 1V. At this juncture, the fast charge circuit turns off and the 1.8µA current source slowly charges the soft-start capacitor. The output of the error amplifier is forced to track the slow soft-start ramp at the SS pin. When the COMP voltage exceeds 1.1V, the switching regulator starts to switch. During soft-start, the current limit of the converter is gradually increased until the converter output comes into regulation. Hiccup overload protection is utilized in the SC2620. Overload shutdown is disabled during soft-start (V SS < 2V). In Figure 3 the reset input of the overload latch will remain high if the SS voltage is below 2V. Once the soft-start capacitor is charged above 2V, the overload shutdown latch is enabled. As the load draws more current from the regulator, the current-limit comparator will limit the peak inductor current. This is cycle-by-cycle current limiting. Further increase in load current will cause the output voltage to decrease. If the output voltage falls below 70% of its set point, then the overload latch will be set and the soft-start capacitor will be discharged with a net current of 0.8µA. The switching regulator is shut off until the soft- start capacitor is discharged below 1V. At this moment, the overload latch is reset. The soft-start capacitor is recharged and the converter again undergoes soft-start. The regulator will go through soft-start, overload shutdown and restart until it is no longer overloaded. The power good comparator indicates that the channel 1 regulator output has risen to within 10% of its set value. The open collector output of the power good comparator will be actively pulled low if its feedback voltage is below 0.9V.

10 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT that the minimum on time is about 105ns at room temperature (Figure 5). The power switch in the SC2620 is either not turned on at all or for at least T ON(MIN). If the required switch on time (=f D ) is shorter than the minimum on time, the regulator will either skip cycles or it will jitter. Example: Determine the maximum operating frequency of a dual 24V to 1.2V and 24V to 3.3V switching regulator using the SC2620. Assuming that V D = 0.45V, VCESAT = 0.25V and VIN = 26.4V (10% high line), the corresponding duty ratios, D1 and D2, of the 1.2V and 3.3V converters can be calculated using (2). 062.025.045.04.26 45.02.1D1 =−+ 14.025.045.04.26 45.03.3D2 =−+ To allow for transient headroom, the minimum operating switch on time should be at least 30% higher than the worst-case minimum on time exhibited in Figure 5. Designing for a switch on time of 150ns at V4.26VIN = , the maximum operating frequency of the 24V to 1.2V and 3.3V converter is kHz410ns150 D1 = . Minimum Off Time Limitation The PWM latch in Figure 2 is reset every period by the clock. The clock also turns off the power transistor to refresh the bootstrap capacitor. This minimum off time limits the attainable duty cycle of the regulator at a given switching frequency. The measured minimum off time is 120ns. For a step-down converter, D increases with increasing IN OUT V V ratio. If the required duty cycle is higher than the attainable maximum, then the output voltage will not be able to reach its set value in continuous-conduction mode. Applications Information Example: Determine the maximum operating frequency of a dual 5V to 1.5V and 5V to 4V switching regulator using the SC2620. Assuming that V D = 0.45V, V CESAT = 0.25V and V IN = 4.5V (10% low line), the duty ratios 1D and 2D of the 1.5V and 4V converters can be calculated using (2). 42.025.045.05.4 45.05.1D1 =−+ 95.025.045.05.4 45.04D2 =−+ += . The maximum operating channel frequency of the dual 1.5V and the 4V converter is therefore kHz410ns120 D1 2 =− . Transient headroom requires that channel frequency be lower than 410kHz. Inductor Selection The inductor ripple current ∆IL for a non-synchronous step- down converter in continuous-conduction mode is fL)VVV( )VVV)(VV( fL )D1)(VV(I CESATDIN CESATOUTINDOUTDOUT L −−+=−+=∆ (3) where f is the switching frequency and L is the inductance. In current-mode control, the slope of the modulating (sensed switch current) ramp should be steep enough to lessen jittery tendency but not so steep that large flux swing decreases efficiency. Inductor ripple current ∆I L between 25-40% of the peak inductor current limit is a good compromise. Inductors so chosen are optimized in size and DCR. Setting A69.0)3.2(3.0IL ==∆ , V45.0VD = and V25.0VCESAT = in (3),

11 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT f)69.0)(2.0V( )25.0VV)(45.0V(L IN OUTInOUT −−+= (4) where L is in µH and f is in MHz. Equation (3) shows that for a given ,VOUT LI∆ increases as D decreases. If INV varies over a wide range, then choose L based on the nominal input voltage. Always verify converter operation at the input voltage extremes. The peak current limits of both SC2620 power transistors are internally set at 3.2A. The peak current limits are duty- cycle invariant and are guaranteed higher than 2.3A. The maximum load current is therefore conservatively: IA3.22 III LL LM)MAX(OUT ∆−=∆−= (5) If LML I3.0I ⋅=∆ , then LM LM LM L LM)MAX(OUT I85.02 I3.0I2 III ⋅=−=∆−= . The saturation current of the inductor should be 20-30% higher than the peak current limit (2.3A). Low-cost powder iron cores are not suitable for high-frequency switching power supplies due to their high core losses. Inductors with ferrite cores should be used. Power Line Input Capacitor A buck converter draws pulse current with peak-to-peak amplitude equal to its output current I OUT from its input supply. An input capacitor placed between the supply and the buck converter filters the AC current and keeps the current drawn from the supply to a DC constant. The input capacitance C IN should be high enough to filter the pulse input current. Its equivalent series resistance (ESR) should be low so that power dissipated in the capacitor does not result in significant temperature rise and degrade reliability. For a single channel buck converter, the RMS ripple current in the input capacitor is )D1(DII OUTRMS )CIN( −= . (6) Applications Information Power dissipated in the input capacitor is )ESR(I2 RMS )CIN( ⋅ . Equation (6) has a maximum value of 2 IOUT ( at 2 1D = ), corresponding to the worst-case power dissipation ESRI2 OUT ⋅ in CIN. A dual-channel step-down converter with interleaved switching reduces the RMS ripple current in the input capacitor to a fraction of that of a single-phase buck converter. If both power transistors in the SC2620 were to switch on in phase, the current drawn by the SC2620 would consist of current pulses with amplitude equal to the sum of the channel output currents. If each channel were delivering I OUT and operating at 50% duty cycle, then the input current would switch from zero to 2IOUT. The RMS ripple current in the input capacitor would then be I OUT. Power dissipated in C IN would be ESRI2 OUT ⋅ , 4 times that of a single-channel converter. The SC2620 produces the highest RMS ripple current in CIN when only one channel is running and delivering the maximum output current (2A). The input capacitor therefore should have a RMS ripple current rating of at least 1A. Multi-layer ceramic capacitors, which have very low ESR (a few mΩ ) and can easily handle high RMS ripple current, are the ideal choice for input filtering. A single 4.7 µF or 10µF X5R ceramic capacitor is adequate. For high voltage applications, a small ceramic (1µF or 2.2µF) can be placed in parallel with a low ESR electrolytic capacitor to satisfy both the ESR and bulk capacitance requirements. Output Capacitor The output ripple voltage ∆V OUT of a buck converter can be expressed as  +∆=∆ OUT LOUT fC8 1ESRIV (7) where COUT is the output capacitance. Inductor ripple current ∆ IL increases as D decreases (Equation (3)). The output ripple voltage is therefore the highest when V IN is at its maximum. The first term in (7) results from the ESR of the output capacitor while the

voltage drop across the diode is lower. circuit (the diode D BST and the capacitor C BST in Figure 7). and CBST) is connected to the BOOST pin of the SC2620. cycle, as does the bootstrapped voltage at the BOOST pin. to SW voltage required to fully saturate the power transistor. is equal to the charge replenished during the off interval. Figure 6. T ypical Minimum Bootstrap Voltage Re- quired to Maintain Saturation at I SW = 2A.

the output of the DC/DC converter. Figure 7. Methods of Bootstrapping the SC2620.

15 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Applications Information Since the inductor current charges C BST, the bootstrap circuit requires some minimum load current to get going. Figures 8(a) and 8(b) show the dependence of the minimum input voltage required to properly bootstrap a 5V and a 3.3V converters on the load current. Once started the bootstrap circuit is able to sustain itself down to zero load. Shutdown and Soft-Start Each regulating channel of the SC2620 has its own soft- start circuit. Pulling its soft-start pin below 0.8V with an open-collector NPN or an open-drain NMOS transistor turns off the corresponding regulator. The other regulator continues to operate. With one channel turned off, the internal bias circuit is kept alive. In the “Typical Characteristics”, the soft-start pin current is plotted against the soft-start voltage with V IN = 5V. When one of the soft- start pins is pulled low, 105µA flows out of that pin. Pulling both soft-start pins below 0.2V shuts off the internal bias circuit of the SC2620. The total V IN current decreases to 40µA. In shutdown either SS pin sources only 2µA. A fast charging circuit (enabled by the internal bias circuit), which charges the soft-start capacitor below 1V, causes the difference in the soft-start pin currents. If either SS pin is released in shutdown, the internal current source pulls up on the SS pin. When this SS voltage reaches 0.3V, the SC2620 turns on and the V IN quiescent current Figure 9(a). Normal Soft-start. Fast Charge Output must be at least 70% of its set voltage in this interval or the regulator will undergo shutdown and restart (hiccup). Hiccup Enabled 0.3V 2.4V Switc hing Starts V SS 0.7V V FB 0.3V

0 Switc hing Not Sw itch in g Switc hing Not Sw itch in g

0.7V V FB V SS V COMP Figure 9(b). Start-up Fails due to (i) Short Soft-start Duration or (ii) Output Overload or (iii) Output Short-circuited.

capacitor to 1V (slightly below the switching threshold). final voltage by more than 5%. Figure 10. Sequencing the Outputs by (a) Delaying Release of one Channel Relative to the Other and (b) Using PGOOD1 to Control Channel 2.

17 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Applications Information ground, then the COMP voltage will continue to rise to its 2.4V upper limit. The SC2620 will reach its cycle-by-cycle current limit sometime during the soft-start charging phase (see Figure 17(c)). As described previously, the switches in the SC2620 either do not turn on at all or for at least 105ns. With the output shorted, the error amplifier will command the regulator to operate at full duty cycle. The current limit comparator will turn off the switch if the switch current exceeds 3.2A. However, this happens only after the switch is turned on for 105ns. During switch off time, the inductor current ramps down at a slow rate determined by the forward voltage of the freewheeling diode and the resistance of the short. If the resulting reverse volt-second is insufficient to reset the inductor before the start of the next cycle, then the inductor current will keep increasing until the diode forward voltage becomes high enough to achieve volt-second balance. This makes the current limit comparator ineffective. Short circuit robustness will be enhanced if the switching frequency is set below 500kHz at high V IN (> 20V). This increases the off time and keeps the inductor current within bounds. The regulator is to be checked under realistic short circuit condition as the residual resistance of the short can significantly influence circuit behavior. Shortening the soft-start interval from the onset of switching to hiccup enable also makes short circuit operation more robust. A 22-47nF soft-start capacitor is found adequate for most applications. In Figure 17(c), Channel 2 undergoes repeated shutdown and restart (“hiccup”) with its output shorted. V SS appears as an asymmetrical triangular wave. The resistance of the short appears to be 17mΩ . Power Good Indicator The PGOOD1 pin (Pin 15) is the open-collector output of Channel 1 power good comparator. This slow comparator is incorporated with a small amount of hysteresis. The FB low-to-high trip voltage of the power good comparator is 90% of the final regulation voltage. A pull-up resistor from the PGOOD1 pin to the input supply or the regulator output sets the logic high level of the comparator. The power good comparator output becomes valid provided that V IN is above 0.9V. In shutdown the power good output is actively pulled low. A power good pull-up resistor tied to the input will therefore increase current drain during shutdown. Tying the power good pull-up resistor to the regulator output is preferred, as this will minimize the shutdown supply current. In shutdown there is no voltage at the switching regulator output or current in the PGOOD1 pull-up resistor. If the PGOOD1 output high level (= V OUT) is unacceptably low, then power good pull-up from the input or a separate power supply will be the only choice. Sequencing the Outputs As mentioned above, pulling either soft-start pin low with an external transistor shuts off the corresponding regulator (Figure 10). Releasing the soft-start pin enables that channel and allows it to start. Delaying the release of the soft-start pin of one channel with respect to the other is a straightforward way of sequencing the outputs. Figure 10(a) shows this method using two external transistors M 1 and M 2. M1 is turned off first, allowing channel 1 to start. Channel 2 is then enabled after time T D. PGOOD1 can also be used in conjunction with Channel 2 soft-start to delay start of that regulator. This method is depicted in Figure 10(b). SS2 is pulled low and channel 2 is kept off until channel 1 output rises to 90% of its set voltage. Loop Compensation Figure 11 shows a simplified equivalent circuit of a step- down converter. The power stage, which consists of the current-mode PWM comparator, the power switch, the freewheeling diode and the inductor, feeds the output network. The power stage can be modeled as a voltage- controlled current source, producing an output current proportional to its controlling input V COMP . Its transconductance GMP is 8Ω -1. With the current loop closed, the control-to-output transfer function COMP OUT v v has a dominant-pole p 2 located at a frequency slightly higher than that of the output filter pole. 1OUT1OUT OUT CR n CV nI −=−≈ω (8) where C 1 is the output capacitor, R OUT is the equivalent load resistance and n (depending on duty ratio, slope compensation, frequency and passive components) is usually between 1 and 2.

the equivalent load resistance (Figure 12). provided that 65 CC >> and 5O RR >> .

10 OUT1S

Figure 11. Simplified Control Loop Equivalent Circuit

19 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Applications Information This is also equal to  + 21 5MAOUTMP RR RRGRG . Therefore n10 RC RR RRGRG OUT1S 5MAOUTMP ω= + . Re-arranging, MAMP GnG10 C R R1R ω  += (11) ω z1 is shown to be less than ω p2 in Figure 12. Making 606 SC ω=ω=ω gives a first-order estimate of C5: R 60C ω≈ (12) Notice that R5 determines the mid-band loop gain of the converter. Increasing R5 increases the mid-band gain and the crossover frequency. However it reduces the phase margin. C 6 is a small ceramic capacitor to roll off the loop Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop Gain. Control-to-output transfer function is shown with two poles near half the switching frequency ω Figure 12. 2pω 1OUT CR n 5OCR 1pω 3pω 65CR 55CR 1Zω Cω ω Gain Sω OUTMPRG + 21 OMA RR RRG + 21 5MA RR RRG n RC OUT1Cω )j(T ω OUT COMP v v Control-to-Output Transfer Function

load transient responses in over half of the applications.

  1. Therefore checking the transient response of the

loop response. C11 will be more effective if 211 RRR >> . Figure 13. Load Transient Response of the Dual DC-DC Converter in Figure 1(a). I OUT1 and IOUT2 are switched

21 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Applications Information For the 1.2V channel: ×⋅⋅⋅ ×⋅×  += − k12.4 )108.2()8()1(10 1022105.3 k13 k61.21R 4 nF9.3 105.52k12.4 60C 58 = ×⋅π⋅ pF150 )1012.4()10550( 1C 339 ≈ ×⋅×⋅π Bench measurement shows that compensation components computed from our simplified linear model give very good load transient response for Channel 1 (Figure 13(a)). However, optimizing load transient for Channel 2 will require a set of compensation component values different from those calculated above. Loop compensation networks shown in Figure 1(a) are empirically optimized for load transients. Figures 13(a) and 13(b) show the corresponding load transient responses. Board Layout Considerations In a step-down switching regulator, the input bypass capacitor, the main power switch and the freewheeling diode carry discontinuous currents with high dt di (Figure 14). For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power switches are already integrated within the SC2620, connecting the anodes of both freewheeling diodes close to the negative terminal of the input bypass capacitor minimizes size of the switched current loop. The input bypass capacitors should be placed close to the PVIN pins. Shortening the traces of the SW and BOOST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes. The PVIN bypass capacitor C 15, the output filtering capacitors and the freewheeling diodes are to be grounded on the power ground plane (Figure 15). The feedback resistive dividers, the compensation networks, the soft- IN V OUT V L Z Fast Switching Current Paths in a Buck Regulator. Minimize the size of this loop to reduce parasitic trace inductance. Figure 14.

22 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Suggested PCB Layout for the SC2620.Figure 15. C15 R3 R4 C16 C10 R10 R1 R2 R20 GND GND AGND OUT2 OUT1 IN IN or OUT1 IN C15 R3 R4 C16 C10 R10 R1 R2 R20 GND GND AGND OUT2 OUT1 IN IN or OUT1 IN start capacitors and the VIN filtering capacitor C 16 are to be tied to the analog ground. The frequency-setting resistor R9 is placed next to the ROSC pin and is also connected to the analog ground. R20 is a 0Ω resistor that connects the analog ground to the power ground at a single point. Applications Information The exposed pad should be soldered to a large analog ground plane as the analog ground copper acts as a heat sink for the device. To ensure proper adhesion to the ground plane, avoid using vias directly under the device. In figure 15 two 12mil vias are placed at the edge of the underside pad.

23 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT C15 10µF SC2620 GND SS2 PVIN SW1 FB2 COMP2 9.76 k BOOST1 10µ F BOOST2 SW2 1.8µ H 0.1µF 1.8µ H 0.1µF SS1 PGOOD1 COMP1 FB1 22µ F 10BQ 01 5 10BQ 01 5 OUT1 1.2V /2A 24. 9 k 10. 7 k 2.15 k 22nF C10 22nF ROSC 15. 0 k 390pF 15. 8 k 390pF 1N4148 L1 & L2: Wurth 744 062 0 018 OUT2 3.3V /2A 1N4148 5V V IN 10pF 10. 7 k C3: Murat a GRM21 BR60J 22 6M C1 & C15: Murata GRM21BR6 0J106K VIN R10 C16 0.1µ F Figure 16(a). 1.2MHz 5V to 3.3V and 1.2V xDSL Power Supply. Channel 2 does not start until Channel 1 output voltage becomes regu- lated. Typical Application Circuits Efficiency 00 . 511 . 52 Load Current (A) Efficiency (%) VOUT1 = 3.3V VOUT2 = 1.2V VIN = 5V Figures 16(b) and 16(c). Load Transient Response. IOUT is switched between 0.3A and 2A. 40µs/div Upper Trace : OUT1 Voltage, AC Coupled, 0.5V/div Lower Trace : L1 Inductor Current, 0.5A/div (b) 40µs/div Upper Trace : OUT2 Voltage, AC Coupled, 0.2V/div Lower Trace : L2 Inductor Current, 0.5A/div (c) OUT2 OUT1

26 2006 Semtech Corp. www.semtech.com SC2620 POWER MANAGEMENT Outline Drawing - SOIC-16 EDP Land Pattern - SOIC-16 EDP Semtech Corporation Power Management Products Division

200 Flynn Road, Camarillo, CA 93012-8790

Phone: (805)498-2111 FAX (805)498-3804 Contact Information THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: REFERENCE IPC-SM-782A, RLP NO. 300A.2. INCHES DIMENSIONS Z P Y X DIM C F MILLIMETERS .094 2.40 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE. (C) P X G Y Z F D (.205) (5.20) 1.27.050 0.60.024 2.20.087 7.40.291 E SOLDER MASKTHERMAL VIA Ø 0.36mm D 2.90 .114 E .201 5.10 G .118 3.00 N e A 2X E/2 E1 E D ccc C 2X N/2 TIPS e/2 B F DIM c e h L E D b A ccc aaa bbb N DATUMS AND TO BE DETERMINED AT DATUM PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS PLANE GAUGE 0.25 SEE DETAIL REFERENCE JEDEC STD MS-012, VARIATION AC. OR GATE BURRS. NOTES: -A- -B- SIDE VIEW 0.10.004 -H- 01(L1) L DETAIL A A .008 .010 H c 0.20 0.25 MILLIMETERS MIN

6.00 BSC

1.27 BSC

.005 0.00.000 - .105 .028 (.041) .390 .154 .236 BSC .050 BSC .100 .010 .016 .049 .007 .012 .386 .150 .110 .020 .041 0.40 2.54 0.25 .065 .010 .020 .394 .157 9.80 3.80 1.25 0.17 0.31 INCHES DIMENSIONS NOMMIN .053 - MAX .069 1.35 0.13- (1.04) 0.72 2.67 1.04 2.79 0.50 9.90 3.90 10.00 4.00 1.65 0.25 0.51 MAXNOM - 1.75 PLANE SEATING C aaa C A bbb C A-B D D bxN EXPOSED PAD F H h h