SC2463 SEMTECH | Alldatasheet

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1 www.semtech.com SC2463 High Performance Quad Output Switching Regulator POWER MANAGEMENT Revision: May 16, 2007 Description Features

Applications

Typical Application Circuit ‹ Two synchronized converters for low noise ‹ Power up sequencing to prevent latch-up ‹ Out of phase operation for low input ripple ‹ Over current protection ‹ Wide input range, 4.5 to 30V ‹ Programmable frequency up to 700kHz ‹ Low shutdown current 100 uA ‹ Two synchronous bucks for high efficiency at high current ‹ Two programmable positive linear regulators ‹ Output voltage as low as 0.5V ‹ Small package TSSOP-28. This product is fully WEEE and RoHS compliant The SC2463 is a high performance controller for multi- output converters that can be configured for a wide vari- ety of applications. The SC2463 utilizes PWM synchro- nous buck topologies where efficiency is most important. It also provides two dedicated programmable positive linear regulators using external transistors. Each of the four outputs is adjustable down to 0.5V. The two PWM switchers are synchronized 180° out of phase reducing input ripple, allowing for fewer input capacitors. Power up sequencing prevents converter latch-up. The SC2463 can be synchronized to other converters to prevent beat frequencies. The wide range programmable operating frequency allows users to optimize a converter design. The PWM switchers sense the voltage across the low-side MOSFETs on-resistance to efficiently provide adjustable current-limit, eliminating costly current-sense resistors. A POK signal is issued when soft-start is com- plete on both PWM switchers and their outputs are within 10% of the set point. ‹ DSL applications with multiple input voltage requirements ‹ Mixed-Signal applications requiring 4 positive output voltages ‹ Cable modem power management ‹ Base station power management +2.5V R14 R16 R18 C12 C14 +3.3V R17 R11 C13 C20 C10 C15 +1.2V C18 C11 C19 C17 (as low as 0.5V) (as low as 0.5V) L1 +3.3V C16 +1.5VR9 +4.5-30V R10 GD1L 23 PH1 24 GD1H 25 EO2 12 BST1 26 POK8 SYNC7 AGND15 EO1 3 GD2L 20 FB1 2 BD44 FB2 13 PH2 19 GD2H 18 BST2 17 FB45 BDI 28ILIM214 VIN 27 PGND21 ILIM11 BD311 FB310 PVCC 22 AVCC 16 SS/SHDN6 OSC9 SC2463 R12 R15 R13

2 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Absolute Maximum Ratings

Electrical Characteristics

Note: (1) 1 x 1 inch 1 oz copper ground plane. Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of th e parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability. retemaraPl obmySm umixaMs tinU IDB,NIVV NI V, IDB 03ot3.0-V TtanoitapissiDrewoP A 52=C ° )1( dP3 .1W egnaRerutarepmeTtneibmAgnitarepOT A T<04- A 501<C ° egnaRerutarepmeTnoitcnuJgnitarepOT J T<04- J 051<C ° egnaRerutarepmeTegarotST GTS T<06- GTS 051<C ° esaCotnoitcnuJ,ecnatsiseRlamrehT )1( θ CJ 31W /C° tneibmAotnoitcnuJ,ecnatsiseRlamrehT )1( θ AJ 69W /C° .ceS01)gniredloS(erutarepmeTdaeLT REDLOS 062C ° erutarepmeTgniredloSwolfeRkaePT WOLFER 532C ° DNGPot2TSB,1TSB 53ot3.0-V DNGPot4DB,3DB,L2DG,L1DG,CCVA,CCVP 7ot3.0-V ,CSO,2MILI,1MILI,4BF,3BF,2BF,1BF,2OE,1OE DNGAotNDHS/SS,KOP,CNYS 7ot3.0-V 2HPotH2DG,1HPotH1DG 7ot3.0-V DNGAotDNGP 3.0-/+V 2TSBot2HP,1TSBot1HP 3.0ot6-V tnerrucknis/ecruoskaepL2DG,H2DG,L1DG,H1DG 1A Unless specified: V IN = 12V, PVCC = AVCC = 5V, fs = 600KHz, SS/SHDN = 5V, SYNC = 0V, TA = T J = -40°C to 105°C retemaraPs noitidnoCtseTn iMp yTx aMt inU rotalugeRIDBgnisuylppuSrewoP ItnerruCnwodtuhS YLPPUS V0=NDHS/SS0 010 02A µ tnerruCgnitarepOd aoloN0 14 1A m CCVAV 5.5>NIV6 .45 4 .5V CCVPV 5.5>NIV6 .45 4 .5V tuokcoLegatlovrednU dlohserhTtratS 09.30 2.45 4.4V siseretsyHOLVU 002V m

3 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Electrical Characteristics (Cont.) retemaraPs noitidnoCtseTn iMp yTx aMt inU rotarapmoCMWP tuptuOotyaleD 07S n rotsisnarTPNPhtiwrotalugeRraeniLevitisoP 4BFnoegatloVkcabdeeF 84.05 .02 5.0V tnerruCegakaeLtupnIkcabdeeF 051A n ecnatsiseR-nOTEFlanretnII KNIS Am5=0 40 8 Ω rotsisnarTNPNhtiwrotalugeRraeniLevitisoP 3BFnoegatloVkcabdeeF 84.05 .02 5.0V m tnerruCegakaeLtupnIkcabdeeF 051A n ecnatsiseR-nOTEFlanretnII ECRUOS Am5=0 70 41 Ω sreifilpmArorrEMWP 2BF,1BFnoegatloVkcabdeeFT J C°52=9 4.05 .01 5.0V 884.02 15.0 tnerruCsaiBtupnI 002A n niaGpooLnepO )1( 09B d htdiwdnaBniaGytinU 3z HM tnerruCkniStuptuO 2A m tnerruCecruoStuptuO 2A m etaRwelS 1S µ/V rotallicsO egnaRycneuqerF 0010 07z HK ycneuqerFR T K5.21=0 450 060 66z HK egatloVkaePpmaR 8.3V egatloVyellaVpmaR 57.0V htdiWesluPhgiHtupnICNYS 001S n emiTllaF/esiRCNYS 05S n egnaRycneuqerFCNYS CSOF CSOF %01+ zHk dlohserhTwoL/hgiHCNYS 5.1V Unless specified: V IN = 12V, PVCC = AVCC = 5V, fs = 600KHz, SS/SHDN = 5V, SYNC = 0V, TA = T J = -40°C to 105°C

4 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Electrical Characteristics (Cont.) retemaraPs noitidnoCtseTn iMp yTx aMs tinU elcyCytuD elcyCytuDmumixaM1MWP zHk007otzHk001=sf elcyCytuDmumixaM2MWP 08 emiTnOmuminiM2&1MWPz Hk007otzHk001=sf0 5S n timiLtnerruC egatloVteSMILI2&1HCT J C°52=8 .12 2 .2V tneiciffeoCerutarepmeT egatloVteSMILIfo 7.1C °/Vm nwoDtuhS/tratStfoS tnerruCegrahC 50 15 1A µ tnerruCegrahcsiD 1A m dlohserhTgnihctiwSelbasiD egatloV 54.05 .06 .0V dlohserhTrotalugeRIDBelbasiD egatloV 82.04 3.0V nwoDtuhSotwoLelbasiD 05S µ tuptuO )H(ecnatsiseR-nOevirDetaGI ECRUOS Am51=2 5 Ω )L(ecnatsiseR-nOevirDetaGI KNIS Am51=2 5 Ω )H(emiTesiRC TUO Fp0001=5 1S n )H(emiTllaFC TUO Fp0001=5 2S n )L(emiTesiRC TUO Fp0001=5 1S n )L(emiTllaFC TUO Fp0001=5 1S n dooGrewoP BFevobaleveLpirT2BF&1BF 01% siseretsyH 1% BFwolebleveLpirT2BF&1BF 01-% siseretsyH 1% leveLwoLtuptuOKORWPK 01=rotsiserpulluP4 .07 .0V egakaeLhgiHtuptuOKORWPK 01=rotsiserpulluP0 3A µ Unless specified: V IN = 12V, PVCC = AVCC = 5V, fs = 600KHz, SS/SHDN = 5V, SYNC = 0V, TA = T J = -40°C to 105°C

5 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Notes: (1) Guaranteed by design. (2) This device is ESD sensitive. Use of standard ESD handling precautions is required. Electrical Characteristics (Cont.) Unless specified: V IN = 12V, PVCC = AVCC = 5V, fs = 600KHz, SS/SHDN = 5V, SYNC = 0V, TA = T J = -40°C to 105°C retemaraPs noitidnoCtseTn iMp yTx aMs tinU noitcetorPlamrehT erutarepmeTnwodtuhSlamrehT 051C ° siseretsyHnwodtuhSlamrehT 51C °

6 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Pin Configuration Ordering Information rebmuNtraP )2( egakcaP )1( T(egnaR.pmeT J) TRTST3642CS8 2-POSSTC °501+otC°04- (28 Pin TSSOP) Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant Top View Marking Information nnnn = Part Number (Example: 1406) yyww = Date Code (Example: 0012) xxxxx = Semtech Lot No. (Example: P94A01) SC2463 TS yyww xxxxxx TOP

7 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Pin Descriptions #niPe maNniPn oitcnuFniP 11 MILI otnipsihtmorfrotsiseratcennoC.1rehctiwsMWPehtroftesniptimil-tnerrucelbatsujdA .DNGA 21 BF ottuptuomorfredivid-rotsiseraottcennoC.tupnikcabdeef1rehctiwsMWPedomegatloV Vx8.0dnaV5.0neewtebegatlovtuptuoehttsujdaotDNGAot1BF .NI tniopteskcabdeefehT .V5.0si 31 OE etasnepmocotkrowtennoitasnepmocatcennoC.nipnoitasnepmocpool1rehctiwsMWPehT .desuyllaususikrowtennoitasnepmoc3epyT.poollortnoceht 44 DB lennahc-NnafoniardehtotdetcennocyllanretnI.revirdrotsisnartPNPtuptuoniard-nepO evitisopamrofotrotsisnartssapPNPlanretxenafoesabehtotstcennocnipsihT.TEFSOM .rotalugerraenil 54 BF neewtebredivid-rotsiseraottcennoC.tupnikcabdeefrotalugerraenilevitisoprotsisnartPNP sitniopteskcabdeefehT.egatlovtuptuoehttsujdaotDNGAdnarotalugerraenilevitisopeht .V5.0 6N DHS/SS .srotalugerraenilevitisopdnasrehctiwsMWPehtrofnoitcnuftrats-tfosasedivorpnipehT roticapacehtsegrahcecruostnerrucpu-llupAu01detalugereht,V5.0sehcaernipehtnehW 2rehctiws,1rehctiwsfoegatlovecnereferreifilpmarorreehT.DNGAotnipsihtmorfdetcennoc ehtgniwollofylevitcepserV2otV7.0morfspmarsrotalugerraenilevitisopowtehtdna sinipNDHS/SSehtfI.delbasidsi3642CSeht,V5.0wolebnwoddellupsinipehtfI.ecneuqes ylppusehtdnadelbasidsi3642CSrofrotsisnartPNPsaibeht,V43.0wolebnwoddellup .Au001ylnositnerruc 7C NYS otrotsiserK01aseriuqernipsihT.srellortnoceromroowtezinorhcnysotdesuebnacnipehT .desutonsitinehwDNGA 8K OP woleb%01nahteromsiegatlovtuptuoehtnehwwolsiKOP.tuptuodoog-rewopniard-nepO .noitalugernisituptuoehtnehwecnadepmihgihsiKOP.tniopnoitalugerehtevobaro .CCVPdnanipehtneewtebrotsiseratcennoC 9C SO ehttesotDNGAdnanipehtneewtebrotsiseratcennoC.tupnielbatsujdaycneuqerfrotallicsO .ycneuqerfMWP 013 BF neewtebredivid-rotsiseraottcennoC.tupnikcabdeefrotalugerraenilevitisoprotsisnartNPN sitniopteskcabdeefehT.egatlovtuptuoehttsujdaotDNGAdnarotalugerraenilevitisopeht .V5.0 113 DB lennahc-PafoniardehtotdetcennocyllanretnI.revirdrotsisnartNPNtuptuoniard-nepO evitisopamrofotrotsisnartssapNPNlanretxenafoesabehtotstcennocnipsihT.TEFSOM .rotalugerraenil 212 OE etasnepmocotkrowtennoitasnepmocatcennoC.nipnoitasnepmocpool2rehctiwsMWPehT .desuyllaususikrowtennoitasnepmoc3epyT.poollortnoceht 312 BF ottuptuomorfredivid-rotsiseraottcennoC.tupnikcabdeef2rehctiwsMWPedomegatloV Vx8.0dnaV5.0neewtebegatlovtuptuoehttsujdaotDNGAot2BF .NI tniopteskcabdeefehT .V5.0si 412 MILI otnipsihtmorfrotsiseratcennoC.2rehctiwsMWPehtroftesniptimil-tnerrucelbatsujdA .DNGA 51D NGA .DNGPdnuorgtnerruchgihehtmorfyletarapesdetuorebtsumdnadnuorglangisllamssisihT ebdluohsroticapaccimarecA.nipsihtottcepserhtiwderusaemeraslevelegatlovllA .gnilpuocedesionrofnipsihtotthgirdetcennoc

8 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Pin Descriptions (Cont.) #niPe maNniPn oitcnuFniP 61C CVA yamCIehT.CIehtylppusotrotalugerraenillanretxeehtfotuptuoehtotdetcennocsinipsihT .tsolsitnerruc-nwodtuhs-woltubnipsihttaylppus)%01±(V5elgnisamorfyltceridderewopeb ecalp,roticapaccimarecFu1fomuminimahtiwDNGAotdelpuocedsyawlaebtsumnipehT .nipehtotesolcyrev 712 TSB noitcnujehtotnipsihttcennoC.2rehctiwsMWPforevirdTEFSOMreppuehtsrewopnipehT partstoobehtfoedonaehT.edoidpartstoobehtfoedohtacdnaroticapacpartstoobehtfo .CCVPehtotdetcennocsiedoid 81H 2DG .2HPdna2TSBneewtebsgniwstI.tuptuorevirdetagTEFSOMreppu2rehctiwS

912 HP rewoldnarotcudnituptuo,ecruoss'TEFSOMreppuehtfonoitcnujehtotdetcennocsinipehT

.niards'TEFSOM 02L 2DG .DNGPdnaCCVPneewtebsgniwstI.tuptuorevirdetagTEFSOMrewol2rehctiwS 12D NGP dluohstI.srehctiwsMWPhtobrofsrevirdetagrewolehtrofdnuorgrewopehtsedivorpnipehT tupniehtfolanimretevitagenehtdnasTEFSOMrewolehtfosecruosehtotdetcennoceb .sroticapac 22C CVP rewollanretniehtylppusotrotalugerraenillanretxeehtfotuptuoehtotdetcennocsinipsihT )%01±(V5elgnisamorfyltceridderewopebyamtI.srehctiwsMWPhtobrofsrevirdetag DNGPotdelpuocedsyawlaebtsumnipehT.tsolsitnerruc-nwodtuhs-woltubnipsihttaylppus .nipehtotesolcyrevecalp,roticapaccimarecFu01fomuminimahtiw 32L 1DG .DNGPdnaCCVPneewtebsgniwstI.tuptuorevirdetagTEFSOMrewol1rehctiwS

421 HP rewoldnarotcudnituptuo,ecruossTEFSOMreppuehtfonoitcnujehtotdetcennocsinipehT

.niardsTEFSOM 52H 1DG .1HPdna1TSBneewtebsgniwstI.tuptuorevirdetagTEFSOMreppu1rehctiwS 621 TSB noitcnujehtotnipsihttcennoC.1rehctiwsMWPforevirdTEFSOMreppuehtsrewopnipehT partstoobehtfoedonaehT.edoidpartstoobehtfoedohtacdnaroticapacpartstoobehtfo .CCVPehtotdetcennocsiedoid 72N IV ehtetalugerotTEFSOMlennahc-Nnaforotsiserpu-llupehtotdetcennocyllanretnisinipehT .CIehtrofsaib 82I DB lennahc-NnafoniardehtotdetcennocyllanretnI.revirdrotsisnartPNPssapsaiblanretxeehT .TEFSOM

9 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Block Diagram SS/SHDN

10 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Frequency Setting and SynchronizationFrequency Setting and SynchronizationFrequency Setting and SynchronizationFrequency Setting and SynchronizationFrequency Setting and Synchronization The internal oscillator free-running frequency of the SC2463 is set by an external resistor using the following formula: freq 10x12fs 10x9.7R When it is synchronized externally, the applied clock fre- quency should be equal or greater than the free-running frequency. Setting Current LimitSetting Current LimitSetting Current LimitSetting Current LimitSetting Current Limit SC2463 monitors the voltage drop in the lower MOSFETs Rdson voltage to sense an over current condition. This method of current sensing minimizes any unnecessary losses due to external sense resistance. The SC2463 utilizes an internal current source and an external resistor connected from the ILIM pins to the AGND pin to program a current limit level. This limit is programmable by choosing the resistor relative to the level required. The value of the resistor can be selected by the following formula: )Rdson*IIim/(2000limRi = Rilim should be between 10K and 100K. An internal comparator with a reference from the level set by the external resistor monitors the voltage drop across the lower MOSFET. Once the Vdson of the MOSFET exceeds this level, the low side gate is turned on and the upper MOSFET is turned off in the next switching cycle. Gate DrivesGate DrivesGate DrivesGate DrivesGate Drives The low side gate driver is supplied from PVCC and pro- vides a peak source/sink current of 1A. The high side gate drive is also capable of sourcing and sinking peak currents of 1A. The high side MOSFET gate drive can be provided by an external 12V supply that is connected from BST to GND. The actual gate to source voltage of the upper MOSFET will approximately equal 7V (12V-VCC). If the external 12V supply is not available, a classical bootstrap technique can be implemented from the PVCC supply. A bootstrap capacitor is connected from BST to Phase while PVCC is connected through a diode (Schottky or other fast low VF diode) to the BST. This will provide a gate to source voltage approximately equal to the VCC-Vdiode drop. Applications Information The SC2463 is designed to control and drive two N-Chan- nel MOSFET PWM synchronous buck switchers and two positive linear regulators. The two PWM switchers are synchronized 180° out of phase for low input ripple and noise. The switching frequency is programmable to opti- mize design. The SC2463 PWM switchers feature lossless current sensing and programmable over current limit. The two positive linear regulators output voltages are adjust- able. PPPPPooooowwwwwer Supplieser Supplieser Supplieser Supplieser Supplies Supplies VIN, PVCC and AVCC from the input source are used to power the SC2463. An external PNP transistor linear regulator supplies AVCC and PVCC. The AVCC sup- ply provides the bias for the oscillator, the switchers, the linear regulator controllers and the POK circuitry. PVCC is used to drive the low side MOSFET gate. In low shut- down current mode, the PNP transistor is turned off, dis- abling AVCC and PVCC. Soft-start, Sequencing and DisablingSoft-start, Sequencing and DisablingSoft-start, Sequencing and DisablingSoft-start, Sequencing and DisablingSoft-start, Sequencing and Disabling A 10 µA current source pulls up on the SS/SHDN pin. When the SS/SHDN pin reaches 0.5V, the first switcher is activated and the reference input of the error ampli- fier is ramped up with the soft-start voltage. When the SS/SHDN pin reaches 2V, the SS/SHDN pin is pulled down to approximately 0.7V and the second switcher begins to soft-start in an identical fashion to the first switcher. When the SS/SHDN pin reaches 2V for the second time, the SS/SHDN pin is pulled down to approxi- mately 0.7V again, and then the positive linear regula- tors ramp up with the SS/SHDN pin voltage. The SS/ SHDN pin is eventually pulled up to the supply AVCC. The soft-start time is controlled by the value of the capacitor connected to the SS/SHDN pin. If the SS/SHDN pin is pulled down below 0.5V, the SC2463 is disabled. If the SS/SHDN pin is pulled down below 0.34V, the bias PNP transistor for SC2463 is dis- abled and the supply current is only 100uA. The power-ok circuitry monitors the FB inputs of the error amplifiers of the switchers. If the voltage on these inputs goes above 0.55V or below 0.45V then the POK pin is pulled low. The POK pin is held low until the end of the start-up sequence.

11 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Applications Information (Cont.) Shoot through control circuitry provides a 30ns dead time to ensure both the upper and lower MOSFET will not turn on simultaneously and cause a shoot through condition. Error Amplifier and PWM ControllerError Amplifier and PWM ControllerError Amplifier and PWM ControllerError Amplifier and PWM ControllerError Amplifier and PWM Controller In closed loop operation, the internal oscillator ramp ranges from 0.75V to 3.8V. The error amplifier output ranges determines duty-ratio of a converter. The synchro- nous continuous-conduction mode of operation allows the SC2463 to regulate the output irrespective of the direction of the load current. The SC2463 uses voltage-mode control for good noise immunity and ease of compensation. The low-side MOSFET of each channel is turned off at the falling-edge of the phase timing clock. After a brief non-overlapping time interval of 30ns, the high-side MOSFET is turned on. The phase inductor current ramps up. When the in- ternal ramp reaches the threshold determined by the error amplifier output, the high-side MOSFET is turned off. As long as phase voltage collapses below 1.5V, the low-side MOSFET is turned on. Buck ConverterBuck ConverterBuck ConverterBuck ConverterBuck Converter Buck converter design includes the following specifica- tions: Input voltage range: ]V,V[V max,inmin,inin ∈ Input voltage ripple (peak-to-peak): ∆Vin Output voltage: Vo Output voltage accuracy: ε Output voltage ripple (peak-to-peak): ∆Vo Nominal output (load) current: Io Maximum output current limit: Io,max Output (load) current transient slew rate: dIo (A/s) Circuit efficiency: η Selection criteria and design procedures for the following are described: 1) output inductor ( L) type and value 2) output capacitor ( C o) type and value 3) input capacitor ( Cin) type and value 4) power MOSFETs 5) current sensing and limiting circuit 6) voltage sensing circuit 7) loop compensation network Operating Frequency (fOperating Frequency (fOperating Frequency (fOperating Frequency (fOperating Frequency (f sssss))))) The switching frequency in the SC2463 is user- programmable. The advantages of using constant frequency operation are simple passive component selection and ease of feedback compensation. Before setting the operating frequency, the following trade-offs should be considered: 1) Passive component size 2) Circuitry efficiency 3) EMI condition 4) Minimum switch on time and 5) Maximum duty ratio For a given output power, the sizes of the passive components are inversely proportional to the switching frequency, whereas MOSFET/Diode switching losses are proportional to the operating frequency. Other issues such as heat dissipation, packaging and the cost issues are also to be considered. The frequency bands for signal transmission should be avoided because of EM interference. Minimum SwitcMinimum SwitcMinimum SwitcMinimum SwitcMinimum Switc h On Time Considerationh On Time Considerationh On Time Considerationh On Time Considerationh On Time Consideration In the SC2463, the falling edge of the clock turns on the top MOSFET. The inductor current and the sensed voltage ramp up. After the internal ramp voltage crosses a threshold determined by the error amplifier output, the top MOSFET is turned off. The propagation delay time from the turn-on of the controlling FET to its turn- off is the minimum switch on time. The SC2463 has a minimum on time of about 50ns at room temperature. This is the shortest on interval of the controlling FET. The controller either does not turn on the top MOSFET at all or turns it on for at least 50ns. For a synchronous step-down converter, the operating duty cycle is V O/VIN. So the required on time for the top MOSFET is V O/(VINfs). If the frequency is set such that the required pulse width is less than 50ns, then the converter will start skipping cycles. Due to minimum on time limitation, simultaneously operating at very high switching frequency and very short duty cycle is not practical. If the voltage conversion ratio V O/VIN and hence the required duty cycle is higher, the switching frequency can be increased to reduce the size of passive components.

change the inductor current during load transients. but with attendant higher core losses. the rated DC output current. Figure 1. An equivalent circuit of Co and Co on the output voltage. The first term is the DC voltage across Co at time t=0.

same type in parallel to satisfy the ESR requirement. capacitors are used, the current ratio increases to 8.3. capacitors will then determine the output ripple-voltage. bank is not simply the sum of all the paralleled capacitors. they should be calculated using the following formulae. capacitance of the ceramic capacitors respectively. Figure 2. Equivalent RC branch.

RMS value of the ripple current in the input capacitor. 1, D2 and I o1, Io2, respectively. FOM follow the same curve in Figure 5. The closer the curve is to the origin, the lower is the FOM.

201 Rds

Figure 5. Figure of Merit curves MOSFETs with low R ds(on) are used for the bottom switch. c) the gate loss due to the gate resistance RG. Rds(on) varies with temperature and gate-source voltage. junction temperature increases from 25 oC to 110 oC.

Figure 6. MOSFET switching characteristics capacitance when Vds is falling. Switching losses occur during the time interval [ t1, t 3]. gate resistance Rg within the MOSFET i.e. Vgsp is the Miller plateau voltage shown in Figure 11. where Rds(on) is the channel resistance of bottom MOSFET. If the input voltage to output voltage ratio is high (e.g. corresponding conduction losses can be quite high. is negligible due to near zero-voltage switching.

17 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Applications Information (Cont.) Once the power losses P loss for the top (P t) and bottom (Pb) MOSFET’s are known, thermal and package design at component and system level should be done to verify that the maximum die junction temperature j,max, usually 125 oC) is not exceeded under the worst- case condition. The equivalent thermal impedance from junction to ambient ( θ ja) should satisfy TT loss max,amax,j ja −≤θ θja depends on the die to substrate bonding, packaging material, the thermal contact surface, thermal compound property, the available effective heat sink area and the air flow condition (free or forced convection). Actual temperature measurement of the prototype should be carried out to verify the thermal design. Setting the Output VSetting the Output VSetting the Output VSetting the Output VSetting the Output V oltoltoltoltolt ageageageageage The non-inverting input of the channel-one error ampli- fier is internally tied the 0.5V voltage reference output. A simple voltage divider (R o1 at top and R o2 at bottom) sets the converter output voltage. The voltage feedback gain h=0.5/V o is related to the divider resistors value as .12 oo Rh hR −= Once either R o1 or R o2 is chosen, the other can be calculated for the desired output voltage V o. Since the number of standard resistance values is limited, the calculated resistance may not be available as a standard value resistor. As a result, there will be a set error in the converter output voltage. This non-random error is caused by the feedback voltage divider ratio. It cannot be corrected by the feedback loop. The following table lists a few standard resistor combi- nations for realizing some commonly used output voltages. Only the voltages in boldface can be precisely set with standard 1% resistors. From this table, one may also observe that when the value 5.0 5.01 −=− oV h h )mhO(1oR 002 608 K4.1K 2 K16.2K 20.4K 26.5 )mhO(2oR K1 K1 K1K 1 K1K 1K 1 and its multiples fall into the standard resistor value chart (1%, 5% or so), it is possible to use standard value resistors to exactly set up the required output voltage value. The input bias current of the error amplifier also causes an error in setting the output voltage. The maximum inverting input bias currents of error amplifiers 1 or 2 is 200nA. Since the non-inverting input is biased to 0.5V, the percentage error in the second output voltage will be Valley Current Sensing for Current-LimitValley Current Sensing for Current-LimitValley Current Sensing for Current-LimitValley Current Sensing for Current-LimitValley Current Sensing for Current-Limit The valley current sensing for current limiting is a unique scheme which could sense the voltage across the bot- tom switch MOSFET when it is on. The scheme is robust with good noise immunity due to reference to ground. The current sensing point is at a delay time t dv before the beginning of a switching cycle. Therefore, the actual valley current is 22 )1( _)( ττ dvdv t VS t LBONDS o V eIeRR VI +−+−= where, IVS is the preset valley current limiting threshold. If a sensed current exceeds the threshold, the top switch will keep off in the next cycle until the current goes back below the threshold. In steady state, since the output voltage is out of regulation in over current condition, the control loop will try to make maximum duty cycle for the top switch as it is on, which is usually greater than 80%. Therefore, as the current falls back below the thresh- old, it is on in the next almost full cycle. The peak cur- rent is not controlled and only depends upon circuit pa- rameters and operating condition in this cycle. The peak current I P is 11 )1( _)( ττ T V T LTONDS oin P eIeRR VVI +−+

Where, T is switching cycle period. lower but average current is still relatively high. pensation to regulate output voltage. Figure 7. Voltage Mode Buck Converter Compensation

  1. Set the loop gain crossover frequency ω C less than

1/5th the switching frequency.

  1. Place an integrator in the origin to increase DC and
  1. Select ω Z1 and ω Z2 such that they are placed near ω O

ω ESR with compensation pole ω P1 (ω P1 = ω ESR ).

  1. Place a high frequency compensation pole ω P2 at the

noise with the adequate phase lag at ω C. Figure 8. Asymptotic diagram of buck power stage and mum On-Resistance 140 Ω , i.e. 3.8V.

  1. A ground plane is recommended to minimize noises

and copper losses, and maximize heat dissipation.

  1. Start the PCB layout by placing the power compo-
  2. The PVCC and AVCC bypass capacitors should be
  3. Separate the power ground from the signal ground.

nal of the output capacitor.

  1. The trace connecting the feedback resistors to the

impedance to drive the MOSFETs.

  1. Minimize the loop including input capacitors, top/bot-

tom MOSFETs. This loop passes high di/dt current.

  1. Maximize the trace width of the loop connecting the

inductor, bottom MOSFET and the output capacitors.

  1. Connect the ground of the feedback divider and the

of the SC2463 by using a separate ground trace. capacitor as close as possible.

20 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Evaluation Board Schematic C19 3.3nF f s=250KHz GND R18 150 SL04 L1 10uH C22 10uF C23 100uF C11 680uF/4V C20 470uF/6.3V C30 22uF C51 22uF R12 2 R14 10uF/16V 10uF/16V 10uF/16V POK SYNC SS/SD GND +3.3V/2A R19 2.0K 10uF C8 0.1uF R17 SUD50N03-10CP GD1L 23 PH1 24 GD1H 25 EO2 12 BST1 26 OSC9 SYNC7 AGND15 EO1 3 GD2L 20 FB1 2 BD44 FB2 13 PH2 19 GD2H 18 BST2 17 FB45 BDI28 ILIM214 VIN27 PGND21 ILIM11 BD311 FB310 PVCC22 AVCC16 SS/SD6 POK8 SC2463 R22 51K C21 Open FZT749 C12 Open R11 20K +3.3V/2A 10uF/16V R13 4.99K FZT749 1uF R24 10K R23 51K R9 20K C31 2.2nF R10 2.05K FZT649 C14 5.6nF C25 4.7nF 11.5K C15 390pF R15 C32 22uF C18 Open SUD50N03-10CP C24 680pF R20 14K 0.1uF R52 SUD50N03-10CP R21 20K R16 18K 5V/2A C16 0.1uF GND SUD50N03-10CP R51 10K R3 30K C53 100pF C52 100pF SL04 C27 Open L2 10uH C29 Open C33 Open 12V GND C28 Open TP5 TP3 R50 20K TP6 TP8 TP11 TP12 TP1 10K C50 1uF 2.5V/1A GND 1.2V/0.5A GND 3.3V/2 A C10 6.8nF TP13 TP7 TP10 TP14 TP15 TP16 TP4 TP9 C13 10uF 180 C17 100uF

21 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Item Quantity Reference Value Manufacturer Part # 1 4 C1, C2, C3, C4 10uF/16V TDK C3216X5R1C106MT 2 1 C5 10uF 3 2 C6, C50 1uF 4 1 C8 0.1uF 5 2 C9, C16 0.1uF 6 1 C10 6.8nF 7 1 C11 680uF/4V Sanyo 4TPB680M 8 8 C12,C18,C21,C52 C27,C28,C29,C33 Open 9 2 C13,C22 10uF TDK C3216X5R1C106MT 10 2 C17,C23 100uF TDK C4532X5R0J107MT 11 1 C14 5.6nF 12 1 C15 390pF 13 1 C19 3.3nF 14 1 C20 470uF/6.3V Sanyo 6TPB470M 15 1 C24 680pF 16 1 C25 4.7nF 17 3 C30,C32, C51 22uF 18 1 C31 2.2nF 19 1 C53 100pF 20 2 D1, D2 SL04 Vishay SL04 21 2 L1,L2 10uH Coilcraft DO5022P-103 22 2 Q1,Q4 Zetex FZT749TA 23 4 Q2,Q3,Q5,Q6 Vishay SUD50N03-10CP 24 1 Q7 Zetex FZT649 25 4 R1,R13,R24,R51 10K 26 1 R2 10 27 1 R3 30K 28 2 R4,R12 2 29 1 R5 11.5K 30 3 R6,R14,R15 0 31 1 R7 180 32 2 R8,R17 1K 33 3 R9,R21,R50 20K 34 1 R10 2.05K 35 1 R11 40.2K 36 1 R16 18K 37 1 R18 150 38 1 R19 2.0K 39 1 R20 14K 40 2 R22,R23 51K 41 1 U1 Semtech Corp. SC2463 Bill of Materia l - Evaluation Board

22 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Typical Characteristics 20MS/DIV A: SS/SHDN PIN VOLTAGE, 5V/DIV B: CH1 OUTPUT VOLTAGE, 5V/DIV C: CH2 OUTPUT VOLTAGE, 5V/DIV D: CH3 OUTPUT VOLTAGE, 2V/DIV STSTSTSTSTARTUP SEQUENCE(1)ARTUP SEQUENCE(1)ARTUP SEQUENCE(1)ARTUP SEQUENCE(1)ARTUP SEQUENCE(1) 500NS/DIV A: CH1 OUTPUT VOLTAGE, 10V/DIV B: CH2 OUTPUT VOLTAGE, 10V/DIV STSTSTSTSTARTUP SEQUENCE(2)ARTUP SEQUENCE(2)ARTUP SEQUENCE(2)ARTUP SEQUENCE(2)ARTUP SEQUENCE(2) STEADSTEADSTEADSTEADSTEAD Y STY STY STY STY ST AAAAATE OPERATE OPERATE OPERATE OPERATE OPERA TIONTIONTIONTIONTION SWITCHER1 LOAD TRANSIENTSWITCHER1 LOAD TRANSIENTSWITCHER1 LOAD TRANSIENTSWITCHER1 LOAD TRANSIENTSWITCHER1 LOAD TRANSIENT 200US/DIV A: CH1 LOAD CURRENT, 0.25A/US, 0.5A/DIV C: CH2 OUTPUT VOLTAGE, 50MV/DIV LDO CH3 LOAD TRANSIENTLDO CH3 LOAD TRANSIENTLDO CH3 LOAD TRANSIENTLDO CH3 LOAD TRANSIENTLDO CH3 LOAD TRANSIENT OVERCURRENT PROTECTIONOVERCURRENT PROTECTIONOVERCURRENT PROTECTIONOVERCURRENT PROTECTIONOVERCURRENT PROTECTION 10US/DIV A: CH1 PH1 VOLTAGE, 10V/DIV B: CH1 INDUCTOR CURRENT, 2A/DIV 200US/DIV A: CH1 LOAD CURRENT, 0.25A/US, 0.5A/DIV C: CH3 OUTPUT VOLTAGE, 20MV/DIV 10MS/DIV A: CH1 OUTPUT VOLTAGE, 5V/DIV B: CH2 OUTPUT VOLTAGE, 2V/DIV C: CH3 OUTPUT VOLTAGE, 1V/DIV D: CH4 OUTPUT VOLTAGE, 2V/DIV

23 2007 Semtech Corp. www.semtech.com SC2463 POWER MANAGEMENT Outline Drawing - TSSOP-28 Semtech Corporation Power Management Products Division

200 Flynn Road, Camarillo, CA 93012

Phone: (805)498-2111 FAX (805)498-3804 Contact Information Land Pattern - TSSOP-28 N AA2 A1bxN PLANE bbb C A-B D ccc C DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3. OR GATE BURRS. DATUMS AND TO BE DETERMINED AT DATUM PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). -B- NOTES: 2. -A- -H- SIDE VIEW A B C De H e/2 (.039) .008 .004 .024 L (L1) c GAGE PLANE SEE DETAIL DETAIL AA 0.25 .026 BSC .252 BSC .004 .169 .173 .007 - 0.10

0.65 BSC

6.40 BSC

4.40 .177 4.30 .012 0.19 4.50 0.30 .382 2X N/2 TIPS SEATING aaa C E/2 INDICATOR PIN 1 213 .018 .003 .031 .002 8° 0° 0.20 0.10 - 8° 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 0.60 (1.0) 0.75 0.20 - 1.20 1.05 0.15 D REFERENCE JEDEC STD MO-153, VARIATION AE.4. INCHES b N bbb aaa ccc E L e D c DIM A MIN MAX MILLIMETERS DIMENSIONS MINMAXNOM NOM E (.222) (5.65) ZG Y P (C) 4.10.161 0.65.026 0.40.016 1.55.061 7.20.283 X INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: