SC2440

SC2440 SEMTECH | Alldatasheet

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Technical content

1 www.semtech.com SC2440

2.5 MHz Dual Switching Regulator

with Integrated 2A Switches POWER MANAGEMENT Revision: March 5, 2007 Description Features

Applications

Typical Application Circuit u Up to 2.5 MHz/Channel Programmable Switching Frequency u Fixed Frequency Current-mode Control u Wide Input Voltage Range 2.8V to 20V u Out of Phase Switching Reduces Ripple u Cycle-by-cycle Current-limiting u Independent Shutdown/soft-start Pins u Independent Hiccup Overload Protection u Independent Power-Good Indicators u Two 2A Integrated Switches u External Synchronization u Thermal Shutdown u Thermally Enhanced 16-pin TSSOP Package The SC2440 is an adjustable frequency dual current- mode switching regulator with 2A integrated switches. Its high frequency operation allows the use of small inductors and capacitors, resulting in very compact power supplies. The SC2440 is suitable for next generation XDSL modems requiring operating frequencies in excess of 1.5 MHz. The two channels operate at 180° out of phase for reduced input voltage ripples. Separate soft start/ shutdown pins allow independent control and output sequencing for latch-up prevention. The SC2440 can also be externally synchronized up to 2.5 MHz per channel. Current-mode PWM control allows fast transient response with simple loop compensation. Cycle-by-cycle current limiting and hiccup overload protection reduce power dissipation during overload. u XDSL and Cable Modems u Set-up Boxes u Point of Load Applications u CPE Equipment u DSP Power Supplies u Disk Drives C15 10µF 40.2K SC2440 GND SS2 IN SW1 FB2 ROSC COMP2 10pF R7 24.3K BOOST1 C1 10µF BOOST2 SW2 3.3µH 0.1µF 4.4µH C4 0.1µF PGOOD2 SS1 PGOOD1 COMP1 FB1 10µF UPS120 UPS120 100K 100K 15K OUT1 3.3V/2A 10K R4 10K R2 R1 23.3K C7 22nF C10 22nF 220pF 10pF 15.4K 470pF 1N4148 SYNC L1: Sumida CR43 L2: Falco D04012 OUT2 5V/2A 1N4148 VIN 12V Efficiency vs Load Current Figure 1. 1.3MHz 12V to 3.3V and 5V Step-down Converter

2 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Absolute Maximum Ratings

Electrical Characteristics

Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Max Units Input Voltage VIN -0.3 to 20 V Boost Pin VBST 40 V Boost Pin Above SW VBST-VSW 20 V PGOOD Pin Voltage VPGOOD VIN V SS Pins VSS 3 V FB Pins VFB -0.3 to VIN V SYNC Pin Current ISYNC 5 mA SW Voltage VSW -0.6 to VIN V SW Transient Spikes (<10ns Duration) VSW VIN +1.5 V -2.5 Operating Ambient Temperature Range TA -40 to 85 °C Thermal Resistance Junction to Ambient θJA 45 °C/W Maximum Junction Temperature TJ 150 °C Storage Temperature Range TSTG -65 to +150 °C Lead Temperature (Soldering)10 sec TLEAD 300 °C Parameter Conditions Min Typ Max Units VIN Start Voltage 2.45 2.62 2.78 V VIN Start Hysteresis 75 mV Quiescent Current Not switching, PGOOD Open 3.3 4.3 mA Shutdown Current VSS1 = VSS2 = 0V, PGOOD Open 38 60 µA Feedback Voltage 0.980 1.000 1.020 V Feedback Voltage Line Regulation VIN = 3V to 20V 0.005 %/V FB Pin Input Bias Current VFB = 1V, V COMP = 1.5V -15 -30 nA Error Amplifier Transconductance 280 µΩ -1 Error Amplifier Open-loop Gain 53 dB COMP Source Current VFB = 0.8V, V COMP = 1.5V 20 µA COMP Sink Current VFB = 1.2V, V COMP = 1.5V 20 µA COMP Pin to Switch Current Gain 5.7 A/V Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1KΩ , VSYNC = 0, VIN = 5V, VBOOST = 8V

3 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: -40°C < TA < 85°C, -40°C < TJ< 105°C, ROSC = 12.1KΩ , VSYNC = 0, VIN = 5V, VBOOST = 8V Parameter Conditions Min Typ Max Units COMP Switching Threshold 0.7 1.1 1.3 V COMP Maximum Voltage VFB = 0.9V 2.2 V Channel Switching Frequecy 1.2 1.4 1.6 MHz Maximum Duty Cycle (Note 2) 80 90 % Switch Current Limit VFB = 0.9V, VSS = 2.3V, COMP Pin Open 2 2.6 A Switch Saturation Voltage ISW = -2A 0.3 0.48 V Switch Leakage Current 10 µA Minimum Boost Voltage ISW = -2A 1.8 2.5 V Boost Pin Current ISW = -0.5A 20 30 mA ISW = -2A 60 80 mA Minimum Soft-Start Voltage to Exit Shutdown SS1 Tied to SS2 0.2 0.4 0.7 V Soft-start Charging Current VSS = 0V 2 µA VSS = 1.5V 1.8 µA Soft-start Discharging Current VSS = 1.5V 0.8 µA Minimum Soft-start Voltage to Enable Overload Shutoff VSS Rising 2 V FB Overload Threshold VSS = 2.3V, VFB Falling 0.74 V Soft-start Voltage to Restart Switching After Overload Shutoff VSS Falling 0.7 1 1.3 V Power Good Threshold Below FB VFB Rising 80 100 120 mV Power Good Output Low Voltage VFB = 0.8V, IPGOOD = 250µA 0.2 0.4 V Power Good Pin Leakage Current VPGOOD = 5V 0.1 1 µA SYNC Input High Voltage 2 V SYNC Input Low Voltage (Note 1) 0.8 V SYNC Frequency SYNC Frequency = 2 X Channel Frequency. (Note 1) 3.4 5 MHz SYNC Pin Input Current VSYNC = 2V 60 75 µA Thermal Shutdown Temperature 155 °C Thermal Shutdown Hysteresis 10 °C Notes: (1) Guaranteed by design, not tested in production. (2) The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be achieved by lowering the operating frequency. (3) This device is ESD sensitive. Use of standard ESD handling precautions is required.

4 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Pin Configuration Ordering Information Underside metal must be soldered to ground. Pin # Pin Name Pin Function 1, 8 BOOST1, BOOST2 Supply pins to the power transistor drivers.Tie to external diode-capacitor charge pumps to generate drive voltages higher than VIN in order to fully saturate the internal NPN power switches. 2, 7 SW1, SW2 Emitters of the internal power NPN transistors. Connect to the inductors, the freewheeling diodes and the boost capacitors. 3, 6 IN Input power supply pins of the SC2440 and also the common collector of the internal power NPNs. Pins 3 and 6 are internally tied together and must be locally bypassed.

4 SYNC

Driving the SYNC pin with an external clock synchronizes both step-down converters. The external clock frequency must be at least twice the individual regulator set (or free-running) frequency. Tie this pin to ground if not used.

5 ROSC An external resistor between this pin and the ground sets the master oscillator free-running

frequency. The set frequency is twice that of the individual switching regulator. 9, 16 FB1, FB2 The inverting inputs of the error amplifiers. Each FB pin is tied to a resistive divider between its output and the ground for setting the channel output voltage. 10, 15 COMP1, COMP2 These are the outputs of the internal error amplifiers. The voltages on these pins control the peak switch currents. RC networks at these pins compensate the control loops. Pulling either pin below 0.7V stops the corresponding switching regulator. 11, 14 PGOOD1, PGOOD2 Open collector outputs of the Power Good comparators. Tie to external pull-up resistors from the input or the output of the converter. The PGOOD outputs become valid as soon as V IN rises above 1 VBE during power-up. PGOOD is actively pulled low until the corresponding FB pin rises to within 10% of the final regulation voltage. 12, 13 SS1, SS2 A capacitor from either SS pin to the ground provides soft-start and overload hiccup functions for that channel. Pulling either SS pin below 0.8V with an open drain or collector transistor shuts off the corresponding regulator. To completely shut off the SC2440 to low-current state, pull both SS pins to the ground. Soft-start is recommended for all applications. Underside Metal GND The exposed pad at the bottom of the package is the electrical ground connection of the SC2440. It also provides a thermal contact to the circuit board. It is to be soldered to the ground plane of the board. Pin Descriptions Part Number Package(1)(2) SC2440TETRT TSSOP-16 EDP SC2440EVB Evaluation Board Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. FB1 BOOST1 TOP VIEW (16 Pin TSSOP-EDP) COMP1 SW1 PGOOD1 IN SS1 SYNC SS2 ROSC PGOOD2 IN COMP2 SW2 FB2 BOOST2

6 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Typical Characteristics Frequency Setting Resistor vs Channel Frequency 100 1000 0 0.5 1 1.5 2 2.5 3 Frequency (MHz) ROSC (KWW ) VIN = 5V Feedback Voltage vs Temperature 0.97 0.98 0.99 1.00 1.01 1.02 -50 -25 0 25 50 75 100 125 Temperature (°C) VFB (V) VIN = 5V Switch Saturation Voltage vs Switch Current 100 200 300 400 Switch Current (A) VCESAT (mV) 25°C 125°C -40°C VIN Start Threshold vs Temperature 2.4 2.5 2.6 2.7 2.8 -50 -25 0 25 50 75 100 125 Temperature (°C) VIN Threshold (V) SYNC Input Logic Thresholds vs Temperature 1.0 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 Temperature (°C) SYNC Thresholds (V) VIH VIL Channel Frequency vs Temperature 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 Temperature (°C) Frequency (MHz) ROSC =12.1KΩ SS Shutdown Threshold vs Temperature 0.20 0.25 0.30 0.35 0.40 -50 -25 0 25 50 75 100 125 Temperature (°C) SS Threshold (V) VSS1 = VSS2 Boost Pin Current vs Switch Current Switch Current (A) Boost Pin Current (mA) 125°C -40°C VIN = 5V VBST = 8V Switch Current Limit vs Temperature 2.0 2.2 2.4 2.6 2.8 3.0 -50 -25 0 25 50 75 100 125 Temperature (°C) Current Limit (A)

7 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Typical Characteristics Soft-Start Pin Current vs Soft-Start Voltage -120 -100 -80 -60 -40 -20 VSS (V) ISS (mmA) ISS of the Other Channel (VSS = 0) ISS of the Swept Channel T = 25°C VIN =5V FB Overload Threshold vs Temperature 0.5 0.6 0.7 0.8 0.9 1.0 -50 -25 0 25 50 75 100 125 Temperature (°C) FB Threshold (V) VIN Quiescent Current vs V IN 0 5 10 15 20 VIN (V) VIN Current (mA) 25°C -40°C105°C VIN Shutdown Current vs VIN 100 125 150 0 5 10 15 20 VIN (V) VIN Current (mmA) 105°C -40°C SS1 = SS2 = 0 PGOOD Threshold to Feedback Difference Voltage vs Temperature -100 -98 -96 -94 -92 -90 -50 -25 0 25 50 75 100 125 Temperature (°C) Voltage (mV) VIN Supply Current vs Soft-Start Voltage VSS (V) IIN (mA) VSS1 = VSS2 TA = 25°C VIN = 5V VCOMP1 = 0 VCOMP2 = 0

8 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Operation The SC2440 is a 2-channel constant-frequency peak current-mode step-down switching regulator with integrated 2A power transistors. Both regulators of the SC2440 operate from a common input power supply and share the same voltage reference, the master oscillator and the synchronizing circuit. Turn-on of the power transistors are phase-shifted by 180°. The two regulators are otherwise completely identical, independent and are capable of producing two separate outputs from the same input. The master oscillator of the SC2440 runs at twice the channel frequency. The free-running frequency of the master oscillator can be programmed with an external resistor from the ROSC pin to ground. Frequency adjustability makes switching regulator design flexible. Peak current-mode control is utilized for the SC2440. The double reactive poles of the output LC filter are reduced to a single real pole by the inner current loop, easing loop compensation. Fast transient response can be achieved with a simple Type-2 compensation network. Switch collector current is sensed with an integrated 7.7mΩ sense resistor. The sensed current is summed with slope- compensating ramp before it is compared with the transconductance error amplifier output. The PWM comparator tripping instant determines the switch turn- on pulse width (Figure 2). The current-limit comparator ILIM turns off the power switch when the sensed-signal exceeds the 20mV current-limit threshold. ILIM therefore provides cycle-by-cycle limit. Current-limit does not vary with duty-cycle. Driving the base of the power transistor above the input power supply rail minimizes the power transistor turn-on voltage and maximizes efficiency. An external charge pump (formed by the capacitor C 2 and the diode D 3 in Figure 1) generates a voltage higher than the input rail at the BOOST pin. The bootstrapped voltage generated becomes the supply voltage for the power transistor driver. The SS pin is a multiple-function pin. An external capacitor connected from the SS pin to the ground together with the internal 1.8µA and 2.6µA current sources set the soft-start and overload shutoff times of the regulator (Figure 3). The SS pin can also be used to shut off the corresponding regulator. When either SS pin is pulled below 0.8V, that regulator is turned off. If both SS pins are pulled below 0.2V, then the SC2440 undergoes overall shutdown. The current draw from the input power supply reduces to 38µA. When either SS pin is released, the corresponding soft- start capacitor is charged with a 2µA current source (not shown in Figure 3). As either SS voltage exceeds 0.3V, the internal bias circuit of the SC2440 is enabled. The SC2440 draws 3.3mA from V IN. An internal fast charge circuit quickly charges the soft-start capacitor to 1V. At this juncture, the fast charge circuit turns off and the 1.8µA current source slowly charges the soft-start capacitor. The output of the error amplifier is forced to track the slow soft-start ramp at the SS pin. When the COMP voltage exceeds 1.1V, the switching regulator starts to switch. During soft-start, the current limit of the converter is gradually increased until the converter output comes into regulation. Hiccup overload protection is utilized in the SC2440. Overload shutdown is disabled during soft-start (V SS < 2V). In Figure 3 the reset input of the overload latch will remain high if the SS voltage is below 2V. Once the soft- start capacitor is charged above 2V, the overload shutdown latch is enabled. As the load draws more current from the regulator, the current-limit comparator will limit the peak inductor current. This is cycle-by-cycle current limiting. Further increase in load current will cause the output voltage to decrease. If the output voltage falls below 74% of its set point, then the overload latch will be set and the soft-start capacitor will be discharged with a net current of 0.8µA. The switching regulator is shut off until the soft-start capacitor is discharged below 1V. At this moment, the overload latch is reset. The soft-start capacitor is recharged and the converter again undergoes soft-start. The regulator will go through soft-start, overload shutdown and restart until it is no longer overloaded. Each regulator of the SC2440 has its own power good comparator. The open collector output of the power good comparator will be actively pulled low if the corresponding feedback voltage is below 0.9V.

voltage drop across the rectifying diode. Figure 6. Variation of Minimum On Time with

11 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT output voltage will not be able to reach its set value in continuous-conduction mode. Example: Determine the maximum operating frequency of a dual 3.3V to 1.8V and 3.3V to 2.5V switching regulator using the SC2440. Assuming that VD = 0.45V, VCESAT = 0.25V and VIN = 2.97V (10% low line), the duty ratios 1D and 2D of the 1.8V and 2.5V converters can be calculated using (2). 71.025.045.097.2 45.08.1D1 =−+ 93.025.045.097.2 45.05.2D2 =−+ += . The maximum operating frequencies of the 1.8V and the 2.5V converters are therefore MHz4.2ns120 D1 1 =− and KHz580ns120 D1 2 =− respectively.. Transient headroom requires that channel frequency be lower than 580KHz. External Synchronization The SYNC input buffer is positive-edge triggered and TTL- compatible ( V8.0VIL < and V2VIH > ). The free-running master oscillator generates a periodic sawtooth ramp between two threshold voltages. A faster external clock applied to the SYNC pin discharges the internal ramp before it reaches its upper threshold, thus locking the internal oscillator. As shown in Figure 2, the master oscillator is being synchronized not the individual phases (see Figure 2). The synchronizing frequency should be twicetwice the desired channelchannel frequency. Bench test shows that an external clock with frequency ranging from slightly below twice to at least 3.5 times the channelchannel free- running frequency is capable of locking the master oscillator. To ensure frequency locking, the external clock frequency should be at least twicetwice the highesthighest free- running channel channel frequency. The frequency of the synchronizing clock should not be higher than 1.6 times Applications Information the set frequency of master oscillator because the amplitudes of the internal sawtooth ramp and slope compensation ramp will both be significantly reduced. Example: Choose the value of R OSC to externally synchronize the SC2440 to 2MHz per channelchannel . The required synchronizing clock frequency = 2 times the channel frequency = 4MHz. For a given R OSC, the free-running channelchannel frequency has a tolerance of ±15%. Set the nominal free-running channelchannel frequency to MHz73.115.1 MHz2 = to ensure locking. Looking up the graph “Channel Frequency vs. R OSC” in the Typical Characteristics, R OSC = 9.31K Ω for a set frequency of 1.73MHz. With ±15% tolerance, the set channel frequency can vary Therefore 36.147.1 FrequencyrunningFreeLowest FrequencyingSynchroniz ==− . Inductor Selection The inductor ripple current ΔIL for a non-synchronous step-down converter in continuous-conduction mode is fL)VVV( )VVV)(VV( fL )D1)(VV(I CESATDIN CESATOUTINDOUTDOUT L −−+=−+=Δ (3) where f is the switching frequency and L is the inductance. In current-mode control, the slope of the modulating (sensed switch current) ramp should be steep enough to lessen jittery tendency but not so steep that large flux swing decreases efficiency. Inductor ripple current ΔIL between 25-40% of the peak inductor current limit is a good compromise. Inductors so chosen are optimized

12 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Applications Information in size and DCR. Setting A6.0)2(3.0IL ==Δ , V45.0VD = and V25.0VCESAT = in (3), f)6.0)(2.0V( )25.0VV)(45.0V(L IN OUTInOUT −−+= (4) where L is in µH and f is in MHz. Equation (3) shows that for a given ,VOUT LIΔ increases as D decreases. If INV varies over a wide range, then choose L based on the nominal input voltage. Always verify converter operation at the input voltage extremes. The peak current limits of both SC2440 power transistors are internally set at 2.6A. The peak current limits are duty-cycle invariant and are guaranteed higher than 2A. The maximum load current is therefore conservatively IA22 III LL LM)MAX(OUT Δ −=Δ−= (5) If LML I3.0I ⋅=Δ , then LM LM LM L LM)MAX(OUT I85.02 I3.0I2 III ⋅=−=Δ−= . The saturation current of the inductor should be 20-30% higher than the peak current limit (2A). Low-cost powder iron cores are not suitable for high-frequency switching power supplies due to their high core losses. Inductors with ferrite cores should be used. Input Capacitor A buck converter draws pulse current with peak-to-peak amplitude equal to its output current I OUT from its input supply. An input capacitor placed between the supply and the buck converter filters the AC current and keeps the current drawn from the supply to a DC constant. The input capacitance CIN should be high enough to filter the pulse input current. Its equivalent series resistance (ESR) should be low so that power dissipated in the capacitor does not result in significant temperature rise and degrade reliability. For a single channel buck converter, the RMS ripple current in the input capacitor is )D1(DII OUTRMS )CIN( −= . (6) Power dissipated in the input capacitor is )ESR(I2 RMS )CIN( ⋅ . Equation (6) has a maximum value of 2 IOUT ( at 2 1D = ), corresponding to the worst-case power dissipation ESRI2 OUT ⋅ in CIN. A dual-channel step-down converter with interleaved switching reduces the RMS ripple current in the input capacitor to a fraction of that of a single-phase buck converter. If both power transistors in the SC2440 were to switch on in phase, the current drawn by the SC2440 would consist of current pulses with amplitude equal to the sum of the channel output currents. If each channel were delivering IOUT and operating at 50% duty cycle, then the input current would switch from zero to 2I OUT. The RMS ripple current in the input capacitor would then be IOUT. Power dissipated in C IN would be ESRI2 OUT ⋅ , 4 times that of a single-channel converter. The SC2440 produces the highest RMS ripple current in C IN when only one channel is running and delivering the maximum output current ( A25.1 −≈ ). The input capacitor therefore should have a RMS ripple current rating of at least 1A. Multi-layer ceramic capacitors, which have very low ESR (a few mΩ ) and can easily handle high RMS ripple current, are the ideal choice for input filtering. A single 4.7 µF or 10µF X5R ceramic capacitor is adequate. For high voltage applications, a small ceramic (1µF or 2.2µF) can be placed in parallel with a low ESR electrolytic capacitor to satisfy both the ESR and bulk capacitance requirements. Output Capacitor The output ripple voltage ΔVOUT of a buck converter can be expressed as  +Δ=Δ OUT LOUT fC8 1ESRIV (7) where COUT is the output capacitance. Inductor ripple current ΔIL increases as D decreases (Equation (3)). The output ripple voltage is therefore the highest when V IN is at its maximum. The first term in (7)

respectively, is drawn from the bootstrap capacitor C BST. output of the DC/DC converter. Figure 8. Methods of Bootstrapping the SC2440.

74% of its final value before C SS is charged above 2V. successful and failed start-up waveforms respectively. it does not overshoot its final voltage by more than 5%. good comparators is 90% of the final regulation voltage. Figure 11. Sequencing the Outputs by (a) Delaying Release of one Channel Relative to the Other and (b) Using the PGOOD of one Channel to Control the Other.

19 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Applications Information ( )  + 1121 111 OUT FB CRRs1 RsC1 RR R v v (9) and ( ) ( ) ( )56O5 55OMA FB COMP RsC1RsC1 RsC1RG v v +⋅+ +≈ (10) provided that 65 CC >> and 5O RR >> . In Equation (10), C 5 forms a low frequency pole p 1 with the output resistance R O of the error amplifier and C 6 forms a high frequency pole p 3 with R 5. Using the component values shown in Figure 1 for the 12V to 3.3V regulator (1.3MHz), Ω=Ωµ== − M6.1280 dB53 cetancTranscondu GainLoopOpenAmplifierR 1O Hz210Krads3.1 pF470M6.1 CR −=−=

• Ω−=−=ω MHz0.1Mrads5.6 pF10K4.15 CR −=−=
• Ω−=−=ω Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop Gain. Control-to-output transfer function is shown with two poles near half the switching frequency ωS. Figure 13. 2pω 1OUT CR n 5OCR 1pω 3pω 65CR 55CR 1Zω Cω ω Gain Sω OUTMPRG + 21 OMA RR RRG + 21 5MA RR RRG n RC OUT1Cω )j(T ω OUT COMP v v Control-to-Output Transfer Function

20 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Applications Information In addition C5 and R5 form a zero with angular frequency: KHz22Krads140 pF470K4.15 CR −=−= ⋅Ω−=−=ω The output-to-control transfer function OUT FB FB COMP OUT COMP v v v v v v ⋅= is also shown in Figure 13. Its mid- band gain (between z 1 and p 3) is  + 21 5MA RR RRG . The overall loop gain T(s) is the product of the control-to- output and the output-to-control transfer functions. To simplify )j(T ω Bode plot, the feedback network is assumed to be resistive. If the overall loop gain is to cross 0dB at one tenth of the switching frequency ( 5 f S C π =ω=ω ) at –20dB/decade, then its mid-band gain (between z1 and p2) will be n10 RC RC n

10 OUT1S

S c ω= ω ω This is also equal to  + 21 5MAOUTMP RR RRGRG . Therefore n10 RC RR RRGRG OUT1 5MAOUTMP ω= + . Re-arranging, MAMP GnG10 C R R1R ω  += (11) ωz1 is shown to be less than ωp2 in Figure 13. Making 2p1z ω=ω gives a first-order estimate of C 5: )MIN(OUT1 nR RCC = (12) Notice that R5 determines the mid-band loop gain of the converter. Increasing R5 increases the mid-band gain and the crossover frequency. However it reduces the phase margin. An estimate of R 5 and C 5 can be obtained from (11) and (12) with n=1. The compensation is then checked by measuring the loop gain and the phase or by observing the inductor current and the output voltage during load transient. Choose the largest R 5 and the smallest C 5 to give at least 45 ° of phase margin. The corresponding load transient should not show any ringing or excessive overshoot (see Figures 14(c), 14(d), 17(b) and 17(c)). C 6 is a small ceramic capacitor (10-47pF) to roll off the loop gain at high frequency. Feedforward capacitor C11 boosts phase margin over a limited frequency range and is sometimes used to improve loop response. C 11 will be more effective if 211 RRR >> . Example: Determine the compensation components for the 1.3MHz 12V to 5V and 3.3V converter in Figure 1. For both channels, 1 S Mrads2.8 −=ω , A2I )MAX(OUT = and F10C1 µ= . n is assumed to be 1 in (11) and (12). For the 3.3V output: ×⋅⋅⋅ ⋅×   += − K9.16 )108.2()7.5()1(10 10102.8 K10 K3.231R 4 nF1)A2(K9.16)1( V3.310C 5 =⋅⋅ For the 5V channel: ×⋅⋅⋅ ⋅×   += − K5.25 )108.2()7.5()1(10 10102.8 K10 K2.401R 4 nF1)A2(K5.25)1( V510C 8 =⋅⋅ C6 and C 9 (both 10pF) are then added to increase gain margin. Load transient responses of both channels are observed using these values. There is very little inductor current overshoot even with C5 and C8 reduced to 470pF and 220pF respectively (Figure 14). The measured overall loop gain and phase plots of the converter are also shown.

Figure 14. Overall Loop Gain and Phase versus Frequency for (a) Channel 1 and (b) Channel 2 of the Dual

23 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Typical Application Circuits C15 4.7µF 8.06K SC2440 GND SS2 IN SW1 FB2 ROSC COMP2 22pF R7 13.4K BOOST1 C1 10µF BOOST2 SW2 1.4µH 0.1µF 1.8µH C4 0.1µF PGOOD2 SS1 PGOOD1 COMP1 FB1 20µF UPS120 UPS120 100K 100K 15K OUT1 3.3V/2A 10K R4 10K R2 R1 23.2K C7 22nF C10 22nF 390pF 15.4K 390pF D4 1N4148 SYNC L1 & L2: Sumida CR43 OUT2 1.8V/2A 1N4148 VIN Figure 17(a). 1.3MHz 5V to 3.3V and 1.8V Step-down Converter 20µs/div Upper Trace : OUT1 Voltage, AC Coupled, 0.2V/div Lower Trace : L 1 Inductor Current, 0.5A/div (b) OUT1 20µs/div Upper Trace : OUT2 Voltage, AC Coupled, 0.2V/div Lower Trace : L 2 Inductor Current, 0.5A/div (c) OUT2 Efficiency vs Load Current 0 0.5 1 1.5 2 Load Current (A) Efficiency (%) VOUT2 = 1.8V VOUT1 = 3.3VVIN = 5V

26 2005 Semtech Corp. www.semtech.com SC2440 POWER MANAGEMENT Outline Drawing - TSSOP-16 w/EDP Land Pattern - TSSOP-16 w/EDP (.222) (5.65) Z G Y P (C) 4.10 .161 0.65 .026 0.40 .016 1.55 .061 7.20 .283 X THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. NOTES: INCHES DIMENSIONS Z P Y X DIM C G MILLIMETERS F .126 3.20 F F L (L1) c GAGE PLANESEE DETAIL DETAIL A A 0.25 .026 BSC .252 BSC .004 .169 .193 .173 .197 .007 - 0.10

0.65 BSC

6.40 BSC

4.40 5.00 .177 .201 4.30 4.90 .012 0.19 4.50 5.10 0.30 bxN 2X N/2 TIPS SEATING aaa C E/2 INDICATOR PIN 1 1 32 N AA2 bbb C A-B D ccc C DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3. OR GATE BURRS. DATUMS AND TO BE DETERMINED AT DATUM PLANE CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). -B- NOTES: 2. -A- -H- SIDE VIEW (.039) .004 .008 .024 .018 .003 .031 .002 8° 0° 0.20 0.10 - 8° 0.45 0.09 0.80 0.05 .030 .007 .047 .042 .006 (1.0) 0.60 0.75 0.20 - 1.20 1.05 0.15 A B C De e/2 H PLANE D REFERENCE JEDEC STD MO-153, VARIATION AB.4. INCHES b N ccc aaa bbb E L e D c DIM A MIN MAX MILLIMETERS MIN DIMENSIONS NOM MAX NOM E BOTTOM VIEW EXPOSED PAD F F .112 Semtech Corporation Power Management Products Division

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