SABRE-LL-I STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Features

■ Configurable Device ■ 4 Full Bridges to generate – Up 2 DC motor drivers and 1 SteppEr Motor Driver or – 4 DC motor drivers ■ Bridges (1 & 2) additional configurations are – Super DC – 2 Half Bridges – 1 super Half Bridge – 2 switches –1 s u p e r s w i t c h ■ Bridges (3 & 4) additional configurations are: – Same as Bridges 1&2, listed above; – 2 Buck Regulators (Bridge 3) – 1 Super Buck Regulator – Battery Charger (Bridge 4) ■ One variable voltage Buck switching regulator ■ One switching regulator controller ■ One linear regulator ■ Bidirectional serial interface ■ Programmable Watchdog function. ■ Integrated power sequencing and supervisory functions with fault signaling through serial interface and external reset pin. ■ Thermal shutdown protection with thermal warning capability. ■ Very low power dissipation in shut-down mode (~35 mW) ■ Aux features – Op amps –C o m p a r a t o r s – Pass switches – Multi-channels 9 bit ADC –G P I O s

Description

SABRe is a new concept of IC in the Motion & Power Supply field. ST aim is to follow the SABRe specification and to offer to the customer an IC with a wide number of features, that can be configured and customized: Motor Drivers, Regulators, high precision A/D Converter, Operational Amplifiers and Voltage Comparators. The start up configuration can be defined by the GPIOs and then through the Serial Interface; a customization can be done through a metal layer in order to set more complex functions. TQFP64 Exposed Pad Table 1. Device summary

Figure 1. Block diagram

SABRE-LL-I Detailed description Detailed description

  • Four widely configurable Full Bridges. Diagonal Rdson are: – Bridge 1 and 2: – Diagonal Rdson: 1.1 Ω; – Max operative current= 2.5A. – Bridge 3 and 4: – Diagonal Rdson: 1.6 Ω; – Max operative current= 1.5A. The possible configurations for each bridge are the following: – Bridge 1 or 2: – DC motor driver – Super DC (Bridge 1 and 2 paralleled form SuperBridge1) – 2 Half Bridges – 1 super Half Bridge – 2 switches – 1 super switch – Bridge 3 has the same configurations as Bridge 1 or 2 (Bridge 3 and 4 paralleled they form SuperBridge2) plus the following: – ½ Stepper motor driver – 2 Buck regulators (V AUX1_SW, VAUX2_SW) – 1 super Buck regulator – Bridge 4 has the same configurations as Bridge 1 or 2 (Bridge 4 and 3 paralleled they form SuperBridge2) plus the following: – ½ Stepper motor driver – 1 Super Buck regulator (VAUX3_SW) – Battery charger
  • One variable voltage Buck switching regulator (VMAIN_SW) with: – Internal soft start sequence. – Pulse skipping strategy control. – Internal PWM generation. – Internal power FET. – Regulated voltage range: 1-5 Volts. – Output load current: 3.0 A. – Switching frequency: ~250KHz.
  • One switching regulator controller (VEXT_SW) with: – Pulse skipping strategy control. – Internal PWM generation. – Regulated voltage range: 1-30 Volts. – Current limitation.

Detailed description SABRE-LL-I

  • One linear regulator (VMAIN_LIN) that can be used to generate low current low ripple voltages. This regulator can be used to drive an external bipolar pass transistor to generate high current/low ripple output voltage.
  • Current sink DAC: – 64 available current levels (6 bits programmable). – Up to 64 mA output current. – 5 Volt tolerant.
  • Two Operational Amplifiers: – 3.3V supply, rail to rail input com patibility, internally compensated. – They can have all pins externally accessible or can be internally configured as a buffer, for internal reference voltages. – Unity Gain Bandwidth > 1MHz.
  • Two Comparators with 3.3V input compatibility and low offset.
  • Two 3.3V Pass Switches with 1Ω Rdson and short circuit protected.
  • One 8bits/9bits A/D converter (100KS/sec @ 9 bits, 200KS/sec @8bits). It can be used to measure most of the internal signals, of the input pins and the IC temperature.
  • Fourteen General Purpose I/Os that can be used to drive/read internal/external analog/logic signals.
  • Bidirectional Serial Interface with address detection so that different ICs can share the same data-bus.
  • Programmable Watchdog function.
  • Integrated power sequencing and supervisory functions with fault signaling through serial interface and external reset pin.
  • Thermal shutdown protection with thermal warning capability.
  • Very Low power dissipation in Shut-down mode (~35 mW)
  • SABRe is intended to maximize the use of its components, so that when an internal circuit is not needed it could be used for other applications. Bridge 3, for example, can be used as a bridge or to implement two switching regulators with synchronous rectification: to obtain this flexibility SABRe includes 2 separate regulation loops for these regulators. When the bridge is used as a motor driver, the 2 regulation loops can be redirected on general purpose I/Os, to leave the possibility to assembly a switching regulator using an external FET and one of these regulation loops.

The following specifications define the maximum range of voltages or currents for SABRe. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. Table 2. Absolute maximum ratings

  1. This value is useful to define the voltage rating for an external capacitor to be connected from VSupply to

provide voltage to external loads.

  1. TSD means the "Thermal Shut Do wn" temperature of the device.

Table 3. IC operating ratings

  1. Operating supply current is measured with System regulators operating but externally loaded only with the

Package information SABRE-LL-I

Package information

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 2. TQFP64 mechanical data and package dimensions

Revision history

Table 4. Document revision history 3-May-2007 1 Initial release.