S494 AUK | Alldatasheet

Document overview

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Technical content

Features

  • Uncommitted output transistors capable of 200mA source or sink
  • Internal protection from double pulsing of out-puts with narrow pulse widths or with supply voltages bellows specified limits
  • Easily synchronized to other circuits
  • Dead time control comparator
  • Output control selects single-ended or push-pull operation

Ordering Information

Type NO. Marking Package Code S494 S494 SOP-16 O u t l i n e D i m e n s i o n s u n i t : mm SSeemmiiccoonndduuccttoorr PIN Connections 1. Non-INV Input 2. INV Input 3. Feed-Back 4. Dead-Time Control 5. C T 6. RT 7. GND 8. C1 9. E1 10. E2 11. C2 12. Vcc

13 Output Control

  1. Ref Out 15. INV-Input 16. Non-INV Input

A b s o l u t e M a x i m u m R a t i n g s Ta=25°C Characteristic Symbol Ratings Unit supply voltage V CC 42 V Voltage From Any Pin to Ground (except pin 8 and pin 11) VIN V CC+0.3 V Output Collector Voltage V C1, VC2 42 V Peak Collector Current I C1, IC2 250 mA Power Dissipation P D 1500 mW Operating Temperature T opr -40 ~ 85 °C Storage Temperature T stg -65 ~ 150 °C Recommended Operating Condition Characteristic Symbol Min. Max. Unit supply voltage V CC 7 40 V Voltage on Any Pin Except Pin 8 and 11(Referenced to Ground) VIN -0.3 V CC+0.3 V Output Voltage V C1, VC2 -0.3 40 V Output Collector Current I C1, IC2 - 200 mA Timing Capacitor C t 470 - PF Timing Capacitor C t - 10 ㎌ Timing Resistor R t 1.8 500 ㏀ Oscillator Frequency f OSC 1 300 KHz

Electrical Characteristics

Characteristic Symbol Test Condition Min. Typ. Max. Unit Reference Voltage Vref Iref = 1.0mA 4.75 5.00 5.25 V Line Regulation V LINE 7V < Vcc < 40V - 2 25 mV Load Regulation V LOAD 1mA< IREF <10mA - 1 15 mV Temperature Coefficient - 0°C < Ta <70°C - 0.01 0.03 %/°C Oscillator Section Characteristic Symbol Test Condition Min. Typ. Max. Unit Oscillator Frequency f OSC Ct=0.01 ㎌, Rt=12 ㏀ - 10 - ㎑ Oscillator Frequency Change Over Operating Temperature Range Δ fSOC Ct=0.01 ㎌, Rt=12 ㏀ - - 2 %

Characteristic Symbol Test Condition Min. Typ. Max. Unit Input Bias Current (Pin4) I IB(DT) Vcc = 15V, 0V < V 4 < 5.25V - -2 -10 ㎂ Max. Duty cycle, Each Output DC (Max) Vcc = 15V, Pin4 = 0V, Output Control Pin = Vref 43 - 45 % Zero Duty - 3 3.3 Input Threshold Voltage Max Duty VTH - 0 - - V Error Amplifier Section Characteristic Symbol Test Condition Min. Typ. Max. Unit Input Offset Voltage V IOS V 3 = 2.5V - 2 10 mV Input Offset Current I IOS V 3 = 2.5V - 25 250 nA Input Bias Current I IB V 3 = 2.5V - 0.2 1 ㎂ Input Common Mode voltage Range VICR 7V ≤ VCC ≤ 40V -0.3 - V CC V Large Signal Open Loop Voltage Range GVO 0.5V ≤ V3 ≤ 3.5V 60 74 - dB Unity Gain Band width f C - - 650 - ㎑ PWM Comparator Section (Pin3) Characteristic Symbol Test Condition Min. Typ. Max. Unit Inhibit Threshold Voltage V THI Zero duty cycle - 4 4.5 V Output Source Current Io + 0.5V < V 3 < 3.5V 2 - - mA Output Sink Current Io - 0.5V< V3 < 3.5V -0.2 -0.6 - mA Output Section Characteristic Symbol Test Condition Min. Typ. Max. Unit Common-Emitter V E= 15V, IC = 200mA - 1.1 1.3 Output Satur- ation Voltage Emitter-Follower VCE(SAT) VC =15V, IE = 200mA - 1.5 2.5 V Collector off-state Current I C(off) V CC = VC = 40V, VE = 0 - 2 100 Emitter off-state Current I E(off) V CC = VC = 40V, VE = 0 - - -100 Output Control(Pin 13) Output Control Voltage Required for single-Ended or Parallel Output Operation V OCL - - - 0.4 V Output Control Voltage Req- uired for Push-pull operation VOCH - 2.4 - - V Total Device Standby power Supply Current ICC - - 6 10 mA : These limits apply when the voltage measured at Pin 3 is with in the range specified.

Characteristic Symbol Test Condition Min. Typ. Max. Unit Common Emitter - 100 200 Rise Time Emitter Follower tr - - 100 200 Common Emitter - 25 100 Fall Time Emitter Follower tf - - 40 100 ns Block Diagram Reference Regulator Osc T F. F Vcc Ref Out GND RT CT Dead-Time Control Non-inv In put Inv-In put Non-inv In put Inv-In put Feed-Back Dead Time COMPARATOR PWM COMPARATOR EA1 EA2 Output Control

The basic oscillator(switching)frequency is controlled by an external resistor (Rt) and capacitor(Ct). The relationship between the values of Rt Ct and frequency is shown in. The level of the sawtooth wave form is compar ed with an error voltage by the pulse width modulated comparator. The output of the PWM Comparator directs the pulse steering flip flop and the output control logic. The error voltage is generated by the error amplifier. The error amplifier boosts the voltage difference between the output and the 5V in ternal reference. See Figure7 for error amp sensing techniques. The second error amp is ty pically used to implement current limiting. The output control logic (Pin13) selects either push-pull or single-ended operation of the output transistors (see Figure6). The dead time control prevents on-state overlap of the output transistors as can be seen is Figure5. The dead time is approximately 3 to 5% of the total period if the dead time control(pin4) is grounded. This dead time can be increased by connecting the dead time control to a voltage up to 5 V. The frequency response of the error amps can be modified by using external resistors and capacitors. These components are typically connected between the compensation terminal (pin3) and the inverting input of the error amps(pin2 or pin15). The switching frequency of two or more S494 circuits can be synchronized. The timing capacitor, Ct is connected as shown in Figure8. Charging current is provided by the master circuit. Disc harging is through all the circuits slaved to the master. Rt is required only for the master circuit. Operating Waveform

Fig.1Error Amplifier Test Circuit Fig.2 Current Limit sense Amplifier Test Circuit Fig. 3 Common-Emitter Configuration Fig. 5 Dead-Time and Feedback Control Test circuit and Waveform Test Circuit Fig. 4 Emitter-Follower Configuration Te st circuit and waveform Voltage waveform Each output Transistor 15pF 15V DC C E 90% 10% 90% 10% Tr Tf Vc 90% 10% 90% 10% Tr Tf GND Each output Transistor 15pF 15V DC C V E S 4 9 4 Vcc=15V DEAD TIME FEED BACK REF OUT OUTPUT CONTROL Vcc RT CT (+) (-) (+) (-) TEST Inputs OUTPUT1 OUTPUT2 13 1 4

7 GND

0.01uF 150 150 ERROR AMP ERROR AMP VIN VREF ERROR AMP ERROR AMP VIN V 3 V REF

Fig. 6 Output Connections for Single-Ended Fig. 7 Error Amplifier Sensing Techniques and Push-Pull Configurations Fig. 8 Slaving Tow or More Control Circuits Fig. 9Error Amplifier and Current Limit S e n s e A m p l i f i e r O u t p u t C i r c u i t s RT CT RT CT 14RT CT VREF VREF MASTER SLAVE (ADDITIONAL CIRCUITS) 0.6mA Vcc VREF TO REMAINDER OF ERROR AMPLIFIER CIRCUIT TO REMAINDER OF ERROR AMPLIFIER CIRCUIT TO COMPENSATION PWM COMPARATOR INPUT S 4 9 4 OUTPUT CONTROL 0 < VOC < 4V QC QE SI NGLE-ENDED CONFI GURATI ON

1 TO 500 m A(MAX)

2.4V <V OC<VREF PUSH-PULL CONFIGURATION 250 mA(MAX) 250 mA(MAX) 2(15) - ERROR AMP 1(16) +R1 VREF TO OUTPUT VOLTAGE OF SYSTEM POSITIVE OUTPUT VOLTAGE Vo 1(16) 2(15)3 VREF Vo TO OUTPUT VOLTAGE OF SYSTEM NEGATI V E OUTPUT VOLTAGE Vo = -VREF R1

φ Ω Electrical Characteristic Curves S 4 9 4 Fig. 5 ICC - VCC Fig. 3 t OSC - RT Fig. 2 V CE -IE Fig. 4 A VOL , Phase - f Fig. 1 V CE(sat) -IC