S2083

S2083 MA-COM | Alldatasheet

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Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Introduction The layout of the surface mount board plays a critical role in product design and must be done properly to achieve the intended performance of an integrated circuit. An accurate PCB pad and solder stencil design provides a proper connection interface between the IC package and the board. With the correct pad geometry, the package will self-align when subjected to a solder reflow process and will also allow for just enough excess surface area for adequate solder filleting. The solder mask should be applied over bare copper (SMOBC) to avoid solder reflow under the solder mask. These considerations apply in general for most of M/A-COM Tech’s surface mount packaged IC’s. This application note provides specific guidelines for mounting quad flat no-leads packages (QFN per JEDEC MO-220), and dual flat no -leads packages (DFN per JEDEC MO-229). PCB Pad Design The first consideration in mounting the QFN / DFN to a board is the layout of metalized pads. The US- based trade association, IPC, has developed land pad design standards contained in the document IPC-SM-782 entitled Surface Mount Design and Land Pattern Standards. Figures 1-1 through 1 -3 shows the PCB geometry developed for M/A -COM’s QFN / DFN packages based on the general guidelines contained within IPC-SM-782. The center area or the thermal pad, acts as an RF ground pad and thermal path to conduct heat away from the package. Normally, the size of the thermal pad should match the size of the exposed pad on the bottom of the package. However, a smaller thermal pad is sometimes recommended to prevent solder bridging to the lead pads. Table 1 shows some suggested PCB pad dimensions for QFN / DFN packages used by M/A-COM Tech. The solderable length of the lead pad is controlled by the solder mask opening (Lm) as indicated in Table 2, in combination with pad length (L) as indicated in Table 1. Via Design To improve the thermal/RF performance of the package, we recommend providing thermal vias on the PCB. These vias provide a heat transfer and RF ground path from the top surface of the PCB to the inner layers and the bottom surface. We recommend a via diameter of 0.3 mm in a 1.0 mm pitch array for standard square packages. This is shown in Figure 1 -1, in which the vias are 1.0 mm away from their diagonal neighbors. Other non - standard designs may require a slightly different via diameter and pitch as shown in Figures 1 -2, 1-3, and 2-4. Figure 1-1 PCB Land Design

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Figure 1-2 PCB Land Designs 1 x 1 mm X1-DFN - 6LD 2 x 2 mm PDFN - 8LD 1.2 x 1.5 mm PDFN - 6LD 2 x 2 mm STQFN - 12LD

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. 4 x 6 mm PQFN - 32LD 5 x 5 mm PQFN - 20LD (Power Amp) Figure 1-3 PCB Land Designs - cont. 1.5 x 1.2 mm PDFN - 6LD 2 x 2.5 mm STQFN - 14LD

and/or prototype measurements. Commitment to develop is not guaranteed. typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. changes to the product(s) or information contained herein without notice. Table 1. Recommended PCB Land Pattern Dimensions

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Figure 2-2 Solder Mask Designs 1 x 1 mm X1-DFN - 6LD 1.2 x 1.5 mm PDFN - 6LD 1.5 x 1.2 mm PDFN - 6LD

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Figure 2-3 Solder Mask Designs - cont. 2 x 2 mm STQFN - 12LD 2 x 2 mm PDFN - 8LD 2 x 2.5 mm STQFN - 14LD

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Figure 2-4 Solder Mask Design - cont. 4 x 6 mm PQFN - 32LD (not shown on right view for clarity) Stencil Design A stencil is used for applying solder paste to the PCB. Although the PCB design suggested in Figures 1 through 2 will help eliminate some surface mounting difficulties, special considerations apply in stencil design and solder paste printing for both lead pad and thermal pads. Surface mount processes vary from company to company, so we recommend careful development of your process for QFN / DFN packages. The following provides some guidelines for stencil design. We recommend a stencil thickness of 0.100 to 0.125 mm for fine pitch packages (0.5 mm or smaller). This thickness can be increased to 0.15 mm for coarser pitch parts. A laser -cut, stainless steel stencil with electro -polished trapezoidal walls is recommended. The stencil opening for all lead pad areas should be the same as the pad size on the PCB (Tables 1 & 2). As mentioned before, the function of the thermal pad is to allow for heat removal from the package as well as providing an effective RF ground. Therefore, a good stencil design becomes important for getting an optimal older paste distribution between the lead pads and the thermal pad. To minimize voids and defects, use smaller multiple stencil openings for the thermal pad instead of one big opening. Figures 3-1 through 3- 3 shows the recommended stencil designs. The target coverage for solder paste area is to maintain 50 to 80 percent of the overall thermal pad area. The selected web width is 0.2 mm running across the vias as shown in Figures 3-1 through 3-3.

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Figure 3-1 Stencil Designs 1 mm X1-DFN - 6LD 1.2 x 1.5 mm PDFN - 6LD 1.5 x 1.2 mm PDFN - 6LD 2 mm PDFN - 8LD 2 x 2.5 mm STQFN—14LD st 2 mm STQFN - 12LD

and/or prototype measurements. Commitment to develop is not guaranteed. typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. changes to the product(s) or information contained herein without notice. Table 2. Recommended Solder Mask & Stencil Dimensions

Surface Mount Instructions for QFN / DFN Packages Application Note S2083 Rev. V10 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. Reflow Profile The most common solder reflow method is accomplished in a belt furnace using convection heat transfer. Tables 3 thru 5 along with Figure 4 show a typical convection reflow profile of temperature versus time. The profile reflects the three distinct heating stages, or zones (preheat, reflow, and cooling) recommended in automated reflow processes to ensure reliable, finished solder joints. The profile will vary among soldering systems and is intended as an example to use as a starting point. Other factors that can affect the profile include the density and types of components on the board, type of solder used and type of board or substrate material being used. Thermocouples should be securely attached to the top surface of a representative component to insure the temperature exposure is met. Profile should be recorded by data acquisition for future reference. General Soldering Precautions The melting temperature of solder generally exceeds the recommended maximum operating temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, always observe the following instructions to minimize the thermal stress to the devices.  Always preheat the device (failure to do so can cause excessive thermal shock and stress that can result in damage to the device).  Limit the temperature in the reflow stage to peak temperature indicated in Tables 3 thru 5.  After completing the soldering process, allow the devices to cool naturally for at least 3 minutes. Gradual cooling should be used, as the use of forced cooling will increase the temperature gradient and may result in latent failure due to mechanical stress.  Avoid any mechanical stress or shock to the solder joints and devices during cooling.

and/or prototype measurements. Commitment to develop is not guaranteed. typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. changes to the product(s) or information contained herein without notice. Table 3. Reflow Conditions (TL to Tp) 3°C/second max. 3°C/second max. (Tp to TL) 6°C/second max. 6°C/second max. Time 25°C to Peak Temperature 6 minutes max. 8 minutes max. refer to JEP140 for recommended thermocouple use. For example, if Tc is 260 °C and time tp is 30 seconds, this means the following for the supplier and the user. For a supplier: The peak temperature must be at least 260 °C. The time above 255 °C must be at least 30 seconds. For a user: The peak temperature must not exceed 260 °C. The time above 255 °C must not exceed 30 seconds. Note 3: All components in the test load shall meet the classification profile requirements. higher peak classification temperature is desired. Table 4. SnPb Eutectic Process - Classification Temperature (TC)

and/or prototype measurements. Commitment to develop is not guaranteed. typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Visit www.macomtech.com for additional data sheets and product information. changes to the product(s) or information contained herein without notice. Table 5. Pb-Free Process - Classification Temperature (TC) values specified in Tables 4 or 5. The use of a higher T p does not change the classification temperature (Tc). Note 2: Package volume excludes external terminals (e.g., balls, bumps, lands, leads) and/or nonintegral heat sinks. reduces the thermal gradients between packages. However, thermal gradients due to differences in thermal mass of SMD packages may still exist. temperatures and profiles defined in Tables 3 and 5, whether or not Pb -free. Figure 4. Reflow Profile