S1NK60Z

STS1NK60Z STMICROELECTRONICS | Alldatasheet

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Technical content

N-CHANNEL 600V - 13Ω -0 . 2 5 A-S O - 8 Zener-Protected SuperMESH™ Power MOSFET /square6 TYPICAL R DS (on) = 13Ω /square6 EXTREMELY HIGH dv/dt CAPABILITY /square6 ESD IMPROVED CAPABILITY /square6 100% AVALANCHE TESTED /square6 NEW HIGH VOLTAGE BENCHMARK /square6 GATE CHARGE MINIMIZED

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

/square6 AC ADAPTORS AND BATTERY CHARGERS /square6 SWITH MODE POWER SUPPLIES (SMPS)

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STS1NK60Z 600 V < 15 Ω 0.25 A 2 W SALES TYPE MARKING PACKAGE PACKAGING STS1NK60Z S1NK60Z SO-8 TAPE & REEL SO-8 INTERNAL SCHEMATIC DIAGRAM

(/circle6 ) Pulse width limited by safe operating area (1) ISD ≤0.3A, di/dt≤200A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. THERMAL DATA GATE-SOURCE ZENER DIODE PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0 ) 600 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 600 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 0.25 A ID Drain Current (continuous) at TC = 100°C 0.16 A IDM (/circle6 ) Drain Current (pulsed) 1 A PTOT Total Dissipation at TC = 25°C 2W Derating Factor 0.016 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 800 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns Tj Tstg Operating Junction Temperature Storage Temperature - 5 5t o1 5 0 - 5 5t o1 5 0 Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Symbol Parameter Test Conditions Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Voltage Igs=± 1mA (Open Drain) 30 V

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. C oss eq.is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS . Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID =1m A ,VGS = 0 600 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS =V GS ,ID =5 0µ A 3 3.75 4.5 V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID = 0.4 A 13 15 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS =V ,ID = 0.4 A 0.5 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5 V ,f=1M H z ,VGS =0 9 4 17.6 2.8 pF pF pF C oss eq.(3) Equivalent Output Capacitance VGS =0 V ,VDS = 0V to 480V 11 pF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD =3 0 0 V ,ID = 0.4 A R G = 4.7Ω VGS =1 0V (Resistive Load see, Figure 3) 5.5 ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =4 8 0 V ,ID = 0.8 A, VGS =1 0 V 4.9 2.7 6.9 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 300V, ID = 0.4A R G =4 . 7Ω VGS =1 0V (Resistive Load see, Figure 3) ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD =480V, ID = 0.8A, R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) 12.5 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) 0.25 A A VSD (1) Forward On Voltage ISD = 0.25A, VGS =0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 0.8 A, di/dt = 100A/µs VDD =2 0 V ,Tj= 150°C (see test circuit, Figure 5) 140 224 3.2 ns nC A

Static Drain-source On Resistance Thermal ImpedanceSafe Operating Area Transfer CharacteristicsOutput Characteristics Transconductance

Source-drain Diode Forward Characteristics Normalized On Resistance vs Temperature Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized BVDSS vs Temperature

Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

DIM. mm inch A1 . 7 5 0 . 0 6 8 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e1 . 2 7 0 . 0 5 0 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M0 . 6 0 . 0 2 3 S 8 (max.) 0016023 SO-8 MECHANICAL DATA

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