S1A CYSTEKEC | Alldatasheet

Document overview

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Technical content

Features

  • For surface mounted applications
  • Glass passivated junction chip
  • Low profile package
  • Built-in stain relief, ideal for automatic placement
  • High temperature soldering guaranteed : 260°C/10 seconds at terminals
  • Plastic material used carries UL flammability classification 94V-0 Mechanical Data
  • Case: JEDEC DO-214AC(SMA) molded plastic
  • Terminals: Pure tin plated, solderable per MIL-STD-750 method 2026
  • Polarity: Color band denotes cathode end
  • Mounting position : Any
  • Weight: 0.064 gram, 0.002 ounce Maximum Ratings and Electrical Characteristics (Rating at 25°C ambient temperature unless otherwise specified. Single phase, half wave , 60Hz, resistive or inductive load. For capacitive load, derate current by 20%. ) Type Parameter Symbol S1A S1B S1D S1G S1J S1K S1M Units Maximum repetitive peak reverse voltage VRRM 50 100 200 400 600 800 1000 V Maximum RMS voltage VRMS 35 70 140 280 420 560 700 V Maximum DC blocking voltage VR 50 100 200 400 600 800 1000 V Maximum instantaneous forward voltage, IF=1A VF 1.1 V Maximum average forward rectified current, see Fig. 1 IF(AV) 1 A Peak forward surge current @8.3ms single half sine wave superimposed on rated load (JEDEC method) TL=90°C IFSM 30 A TA=25°C 5 Maximum DC reverse current at Rated DC blocking voltage TA=125°C IR 50 μA Typical reverse recovery time (Note 1) trr 1.8 μs Typical junction capacitance @ f=1MHz and applied 4V reverse voltage CJ 12 pF RθJA 50 Typical thermal resistance (Note 2) RθJL 90 °C/W Operating junction and Storage temperature range TJ;TSTG -55 ~ +150 ℃ Note: 1.Reverse recovery test conditions : IF=0.5A, IR=1A, IRR=0.25A 2.Thermal resistance from junction to ambient and from junction to lead mounted on PCB with 0.2” ×0.2”(5mm×5mm) copper pad areas.

CYStech Electronics Corp. Spec. No. : C246SA Issued Date : 2012.08.06 Revised Date : 2013.03.11 Page No. : 2/4 S1A thru S1M CYStek Product Specification Ratings and Characteristic Curves

CYStech Electronics Corp. Spec. No. : C246SA Issued Date : 2012.08.06 Revised Date : 2013.03.11 Page No. : 3/4 S1A thru S1M CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C246SA Issued Date : 2012.08.06 Revised Date : 2013.03.11 Page No. : 4/4 S1A thru S1M CYStek Product Specification DO-214AC/SMA Dimension DO-214AC/SMA Plastic Surface Mounted Package CYStek Package Code : SA Notes : 1.Controlling dimension : millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material :

  • Lead : Pure tin plated.
  • Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.