S1C17001 EPSON | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

CMOS 16-bit Single Chip Microcontroller

  • Low Power MCU (operating voltage 1.8 V, 0.5 μA/SLEEP, 2.5 μA/HALT)
  • S1C17 High Performance 16-bit RISC CPU Core with C Optimized Compact Code and Serial ICE Support
  • Infrared Remote Controller with Carrier Generator
  • 32K-Byte ROM and 2K-Byte RAM ■ DESCRIPTIONS The S1C17001 is a 16-bit MCU that features high-speed operation, low power consumption, small size, large address space, and on-chip ICE. The S1C17001 consists of an S1C17 CPU Core, a 32K-byte ROM, a 2K-byte RAM, serial interface modules (UART that supports high bit rate and IrDA 1.0, SPI and I 2C) for connecting various sensor modules, 8-bit timers, 16-bit timers, a PWM & capture timer, a clock timer, a stopwatch timer, a watchdog timer and 28 GPIO ports. The S1C17001 is capable of high-speed operation (8.2 MHz) with low operating voltage (1.8 V). Its 16-bit RISC processor executes one instruction in one clock cycle. The S1C17001 also provides an on-chip ICE function that allows on-board debugging and evaluating the program by connecting the S1C17001 to the ICD Mini (S5U1C17001H) or ICD board with only three wires. ■ FEATURES
  • I 2C (master) 1 ch.
  • UART (with IrDA 1.0) 1 ch.
  • Remote controller (REMC) 1 ch.
  • 16-bit timer (T16) 3 ch.
  • PWM & capture timer (T16E) 1 ch.
  • Clock timer (CT) 1 ch.
  • Stopwatch timer (SWT) 1 ch.
  • Watchdog timer (WDT) 1 ch.
  • 8-bit OSC1 timer (T8OSC1) 1 ch.
  • NMI
  • 14 hardware interrupts (8 levels) DD) 1.65 V to 2.7 V
  • I/O voltage (HV DD) 1.65 V to 3.6 V
  • HALT state: 2.5 μA (32 kHz)
  • Run state: 10 μA (32 kHz) 1800 μA (8 MHz)
  • Flash memory model for

2 EPSON

■ BLOCK DIAGRAM CPU Core S1C17 Internal RAM (2K bytes) 8-bit timer 16-bit timer Prescaler Clock timer Watchdog timer Remote controller MISC register Internal ROM (32K bytes) Interrupt system DCLK, DST2, DSIO(P31–33) REMI(P04), REMO(P05) P00–07, P10–17, P20–27, P30–33 EXCL0–2 (P16, P07, P06) SIN, SOUT, SCLK (P23–25) SDI, SDO, SPICLK (P20–22) I/O 2 (0x5000–) Interrupt controller UART SPI I2CSDA, SCL (P14–15) I/O 1 (0x4000–) I/O port/ I/O MUX #TEST0–5 Reset circuit Test circuit #RESET Oscillator/ Clock generator Stopwatch timer PWM & capture timer 8-bit OSC1 timer OSC1–2, OSC3–4 FOUT1(P13), FOUT3(P30) EXCL3(P27), TOUT(P26)

■ PIN LAYOUT DIAGRAM WCSP-48pin A B C D E F G A B C D E F G 76543211234567 A1 Corner A1 Corner Index Top View Top View Bottom View P07 EXCL1 A B C D E F G P05 REMO #TEST2 P06 EXCL2 P15 SCL P16 EXCL0 LVDD LVDD DSIO P33 DST2 P32 #TEST0 P17 #SPISS #TEST1 P21 SDO VSS VSS VSS VSS VSSP04 REMI DCLK P31 P14 SDA P20 SDI HVDD HVDDP02 P03 P01 P00 P22 SPICLK P23 SIN P24 SOUT P12 P10 P13 FOUT1 P25 SCLK OSC4 P11 #RESET P27 EXCL3 #TEST4 OSC3 #TEST3 P26 TOUT P30 FOUT3 OSC1 OSC2 #TEST5 234567

4 EPSON

■ PIN DESCRIPTION No. Pin name I/O Initial Function

1 VSS – – Power supply pin (GND)

2 #TEST1 I I (Pull-UP) Test pin (fix at high during normal operation) 3 #TEST2 I I (Pull-UP) Test pin (fix at high during normal operation) 4 #TEST3 I I (Pull-UP) Test pin (fix at high during normal operation) 5 #TEST4 I I (Pull-UP) Test pin (fix at high during normal operation) 6 #TEST5 I I (Pull-UP) Test pin (fix at high during normal operation)

7 OSC3 I I OSC3 oscillation input pin (external clock may be input)

8 OSC4 O O OSC3 oscillation output pin

9 OSC1 I I OSC1 oscillation input pin (external clock may be input)

10 OSC2 O O OSC1 oscillation output pin

11 HVDD – – Power supply pin (HV DD+)

12 VSS – – Power supply pin (GND)

13 #TEST0 I I (Pull-UP) Test pin (fix at high during normal operation) 14 #RESET I I (Pull-UP) Initial reset input pin

15 DSIO/P33 I/O I (Pull-UP) On-chip debugger data I/O pin * or I/O port pin

16 DST2/P32 I/O O (L) On-chip debugger status output pin * or I/O port pin

17 DCLK/P31 I/O O (H) On-chip debugger clock output pin * or I/O port pin

18 P30/FOUT3 I/O I (Pull-UP) I/O port pin * or OSC3 divider clock output pin

19 P27/EXCL3 I/O I (Pull-UP) I/O port pin * or T16E external clock input pin

20 P26/TOUT I/O I (Pull-UP) I/O port pin * or T16E PWM signal output pin

21 P25/SCLK I/O I (Pull-UP) I/O port pin * or UART clock input pin

22 P24/SOUT I/O I (Pull-UP) I/O port pin * or UART data output pin

23 P23/SIN I/O I (Pull-UP) I/O port pin * or UART data input pin

24 P22/SPICLK I/O I (Pull-UP) I/O port pin * or SPI clock I/O pin

25 P21/SDO I/O I (Pull-UP) I/O port pin * or SPI data output pin

26 P20/SDI I/O I (Pull-UP) I/O port pin * or SPI data input pin

27 P17/#SPISS I/O I (Pull-UP) I/O port pin (with interrupt) * or SPI slave select input pin

28 P16/EXCL0 I/O I (Pull-UP) I/O port pin (with interrupt) * or T16 Ch.0 external clock input pin

29 P15/SCL I/O I (Pull-UP) I/O port pin (with interrupt) * or I 2C clock output pin

30 P14/SDA I/O I (Pull-UP) I/O port pin (with interrupt) * or I 2C data I/O pin

31 P13/FOUT1 I/O I (Pull-UP) I/O port pin (with interrupt) * or OSC1 clock output pin

32 P12 I/O I (Pull-UP) I/O port pin (with interrupt)

33 P11 I/O I (Pull-UP) I/O port pin (with interrupt)

34 P10 I/O I (Pull-UP) I/O port pin (with interrupt)

35 P07/EXCL1 I/O I (Pull-UP) I/O port pin (with interrupt) * or T16 Ch.1 external clock input pin 36 P06/EXCL2 I/O I (Pull-UP) I/O port pin (with interrupt) * or T16 Ch.2 external clock input pin

37 P05/REMO I/O I (Pull-UP) I/O port pin (with interrupt) * or Remote control signal output pin

38 P04/REMI I/O I (Pull-UP) I/O port pin (with interrupt) * or Remote control signal input pin

39 P03 I/O I (Pull-UP) I/O port pin (with interrupt)

40 HVDD – – Power supply pin (HV DD+)

41 VSS – – Power supply pin (GND)

42 P02 I/O I (Pull-UP) I/O port pin (with interrupt)

43 P01 I/O I (Pull-UP) I/O port pin (with interrupt)

44 P00 I/O I (Pull-UP) I/O port pin (with interrupt)

45 LVDD – – Power supply pin (LV DD+)

46 VSS – – Power supply pin (GND)

47 LVDD – – Power supply pin (LV DD+)

48 VSS – – Power supply pin (GND)

Note: The pin names described in boldface type and description with ‘ *’ are default settings.

■ BASIC EXTERNAL CONNECTION DIAGRAM Single power supply system (LV DD = HVDD) P00~P03 P04 (REMI) P05 (REMO) P06 (EXCL2) P07 (EXCL1) P10~P12 P13 (FOUT1) P14 (SDA) P15 (SCL) P16 (EXCL0) P17 (#SPISS) P20 (SDI) P21 (SDO) P22 (SPICLK) P23 (SIN) P24 (SOUT) P25 (SCLK) P26 (TOUT) P27 (EXCL3) P30 (FOUT3) DSIO (P33) DCLK (P31) DST2 (P32) Recommended values for external parts S1C17001 [The potential of the substrate (back of the chip) is VSS.] LVDD HVDD #TEST1–#TEST5 #RESET OSC3 OSC4 OSC1 OSC2 TEST0 V SS ICD or I/O I/O HVDD 10k Symbol X'tal1 C CD1 Rf1 Rd1 X'tal3 CE C CD3 Rf3 Rd3 CP Cres Name Crystal oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Crystal oscillator Ceramic oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Capacitor for power supply Capacitor for #RESET pin Recommended value 32.768 kHz (MC-146, EPSON TOYOCOM) 7 pF 7 pF 10 MΩ 0 Ω

8 MHz (CA-301, EPSON TOYOCOM)

0.2–8 MHz 27 pF 27 pF 1 MΩ 0 Ω 3.3 μF 0.47 μF Rd3 Rd1 CD3 X'tal3 or CE Rf3 CG3 CD1 X'tal1 Rf1 CG1 Cres 1.65 V 2.7 V CP+ Note: The above table is simply an example, and is not guaranteed to work.

http://www.epson.jp/device/semicon_e S1C17001 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arisi ng out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of Economy, Trade and Industry or other approval from another government agency. © SEIKO EPSON CORPORATION 2008, All right reserved. SEIKO EPSON CORPORATION ■ EPSON Electronic Devices Website SEMICONDUCTOR OPERATIONS DIVISION IC Sales Dept. IC International Sales Group Document code: 411207701 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN First issue September, 2007 Phone: +81-42-587-5814 FAX: +81-42-587-5117 Printed April, 2008 in Japan L Dual-power supply system (LV DD ≠ HVDD) P00~P03 P04 (REMI) P05 (REMO) P06 (EXCL2) P07 (EXCL1) P10~P12 P13 (FOUT1) P14 (SDA) P15 (SCL) P16 (EXCL0) P17 (#SPISS) P20 (SDI) P21 (SDO) P22 (SPICLK) P23 (SIN) P24 (SOUT) P25 (SCLK) P26 (TOUT) P27 (EXCL3) P30 (FOUT3) DSIO (P33) DCLK (P31) DST2 (P32) S1C17001 [The potential of the substrate (back of the chip) is VSS.] HVDD #TEST1–#TEST5 LVDD #RESET OSC3 OSC4 OSC1 OSC2 TEST0 V SS ICD or I/O I/O HVDD 10k Cres

3.3 V CPH+

1.8 V CPL+

X'tal3 or CE Rf3 CG3 CD1 X'tal1 Rf1 CG1 Recommended values for external parts Symbol X'tal1 C CD1 Rf1 Rd1 X'tal3 CE C CD3 Rf3 Rd3 CP Cres Name Crystal oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Crystal oscillator Ceramic oscillator Gate capacitor Drain capacitor Feedback resistor Drain resistor Capacitor for power supply Capacitor for #RESET pin Recommended value 32.768 kHz (MC-146, EPSON TOYOCOM) 7 pF 7 pF 10 MΩ 0 Ω 0.2–8 MHz 27 pF 27 pF 1 MΩ 0 Ω 3.3 μF 0.47 μF Note: The above table is simply an example, and is not guaranteed to work.