S11454EJ3V0DS00

S11454EJ3V0DS00_15 RENESAS | Alldatasheet

Document overview

• Manufacturer or author: NEC Electronics Corporation/NEC Electronics Corporation
• PDF pages: 22

Technical content

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry.

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μPD3734A

2660 PIXELS CCD LINEAR IMAGE SENSOR

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. S11454EJ3V0DS00 (3rd edition) Date Published February 2006 NS CP (N) Printed in Japan The mark '' <R>" shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field. 1996

DESCRIPTION

The μ PD3734A is a high sensitivity CCD (Charge Coupled De vice) linear image sensor which changes optical images to electrical signal. The μ PD3734A has 2660 pixels and an output amplifier which has high gain and wide output range, but low noise. And it has reset feed-through level clamp circuit, sample and hold circuit and voltage amplif ier. Therefore, it is suitable for image scanners, facsimiles and so on.

FEATURES

• Valid photocell : 2660 pixels
• Photocell’s pitch : 11 μ m
• High sensitivity : 70 V/lx •s TYP.
• Peak response wavelength : 550 nm (green)
• Resolution : 12 dot/mm A4 (210 ×297 mm) size (shorter side) 300 dpi US letter (8.5” × 11”) size (shorter side)
• Power supply : +12 V
• Drive clock level : CMOS output under 5 V operation
• High speed scan : 0.54 ms/line (S/H in used)
• Built-in circuit : Sample and hold circuit Reset feed-through level clamp circuit Clamp pulse generation circuit Voltage amplifier
• Low noise
• Low image lag : 1 % MAX.

ORDERING INFORMATION

μ PD3734ACY-A CCD linear image sensor 22- pin plastic DIP (10.16 mm (400)) Remark The μ PD373ACY-A is a lead-free product. <R>

2 Data Sheet S11454EJ3V0DS

μ PD3734A BLOCK DIAGRAM Optical black (OB) 18 pixels, invalid 2 pixels, valid photocell 2660 pixels, invalid 2 pixels VOD VOUT AGND RB SHB AGND TG Voltage Amplifier S/H circuit Reset feed-through level clamp circuit φ φ φ φ

μ PD3734A PIN CONFIGURATION (Top View) CCD linear image sensor 22-pin plastic DIP (10.16 mm (400)) μ PD3734ACY-A NC 12 2 22 1 32 0 41 9 51 8 61 7 71 6 81 5 91 4 10 13 11 12 No connection Reset gate clock No connection No connection Output No connection Shift register clock 1 Shift register clock 2 No connection No connection No connection Sample and hold clock Output drain voltage Analog GND No connection No connection No connection No connection Transfer gate clock Analog GND No connection NC VOD AGND NC NC NC NC NC TG NC NC NC NC NC VOUT AGND NC No connection SHBφ φ RBφ Caution Connect the No connection pins (NC) to GND. PHOTOCELL STRUCTURE DIAGRAM 9 mμ 2 mμ 11 m μ Channel stopper Aluminum shield

4 Data Sheet S11454EJ3V0DS

μ PD3734A ABSOLUTE MAXIMUM RATINGS (TA = +25°C) Parameter Symbol Ratings Unit Output drain voltage V OD –0.3 to +15 V Shift register clock voltage V φ 1, Vφ 2 –0.3 to +15 V Reset gate clock voltage V φ RB –0.3 to +15 V Transfer gate clock voltage V φ TG –0.3 to +15 V Sample and hold clock voltage V φ SHB –0.3 to +15 °C Operating ambient temperature Note T A –25 to +60 °C Note Use at the condition wi thout dew condensation. Caution Product quality may suffer if the absolute m aximum rating is exceeded ev en momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. RECOMMENDED OPERATING CONDITIONS (TA = +25°C) Parameter Symbol Conditions MIN. TYP. MAX. Unit Output drain voltage V OD 11.4 12.0 12.6 V Shift register clock high level V φ 1H, Vφ 2H 4.5 5.0 5.5 V Shift register clock low level V φ 1L, Vφ 2L –0.3 0 +0.5 V Reset gate clock high level V φ RBH 4.5 5.0 5.5 V Reset gate clock low level V φ RBL –0.3 0 +0.5 V Transfer gate clock high level V φ TGH 4.5 5.0 5.5 V Transfer gate clock low level V φ TGL –0.3 0 +0.5 V Sample and hold clock high level V φ SHBH 4.5 5.0 5.5 V Sample and hold clock low level V φ SHBL –0.3 0 +0.5 V Data rate f φ RB S/H in used 0.2 1 5 MHz S/H not in used 0.2 1 4 MHz

μ PD3734A

ELECTRICAL CHARACTERISTICS

TA = +25°C, VOD = 12 V, fφ 1 = 0.5 MHz, data rate = 1 MHz, storage time = 10 ms light source: 3200 K halogen lamp + C-500S (infrared cut filter, t = 1 mm), input signal clock = 5 Vp-p Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Saturation voltage V sat 1.5 2.0 – V Saturation exposure SE Daylight color fluorescent lamp – 0.029 – lx •s Photo response non-uniformity PRNU V OUT = 500 mV – ±2 ±8 % Average dark signal ADS Light shielding – 1.0 3.0 mV Dark signal non-uniformity DSNU Light shielding – 4 6 mV Power consumption P W – 190 250 mW Output impedance Z O – 0.5 1 k Ω Response R F Daylight color fluorescent lamp 49 70 91 V/Ix •s Response peak – 550 – nm Image lag IL V OUT = 1 V – 0.3 1.0 % Offset level V OS 3.5 4.5 5.5 V Output fall delay time Note t d V OUT = 500 mV, t1, t2 = 30 ns – 80 – ns Register imbalance RI V OUT = 500 mV 0 – 3 % Total transfer efficiency TTE V OUT = 1 V, data rate = 4 MHz 92 – – % Dynamic range DR V sat/DSNU – 500 – times Reset feed-through noise RFSN Light shielding –900 –200 +500 mV Sample and hold noise SHSN Light shielding, φ SHB series resistor 47 Ω –50 0 +50 mV Bit noise BN – 4.5 – mV p-p Random noise σ S/H in used – 0.9 – mV S/H not in used – 0.9 – mV Resolution MTF Modulation transfer function at nyquist frequency – 65 – % Note Refer to TIMING CHART2.

6 Data Sheet S11454EJ3V0DS

μ PD3734A INPUT PIN CAPACITANCE (TA = +25°C, VOD = 12 V) Parameter Symbol Pin name Pin No. MIN. TYP. MAX. Unit Shift register clock pin capacitance 1 C φ 1 φ 1 15 – 400 – pF Shift register clock pin capacitance 2 C φ 2 φ 2 14 – 400 – pF Sample and hold clock pin capacitance C φ SHB φ SHB 2 – 5 – pF Reset gate clock pin capacitance C φ RB φ RB 21 – 5 – pF Transfer gate clock pin capacitance C φ TG φ TG 9 – 100 – pF

μ PD3734A TIMING CHART 1 1346 1347 1348 2691 2692 2693 2694 2695 2696 φ TG φ 1 φ 2 φ RB VOUT φ SHB VOUT (S/H) OB (Optical black) 18 pixels Valid photocell 2660 pixels Invalid photocell 2 pixels Invalid photocell 2 pixels Remark V OUT = Output when φ SHB is not in used (When φ SHB is not in used, connect φ SHB pin to GND). VOUT (S/H) = Output when φ SHB is in used.

8 Data Sheet S11454EJ3V0DS

μ PD3734A TIMING CHART 2 90 % 10 % t1 t2 10 % 90 % 10 % 90 % t6 t3 t7 t4 10 % 90 % t9 t8 t10 10 % t11 td RB VOUT SHBφ φ φ φ 50 % t12 t13 50 % 50 % Sampling noise SignalVOUT (S/H) RFSN VOS Remark V OUT (S/H) = Output when φ SHB is in used. Parameter MIN. TYP. MAX. Unit t1, t2 0 50 (100) ns t3 20 100 – ns t4 90 300 – ns t5 70 300 – ns t6, t7 0 50 – ns t8 20 200 – ns t9, t10, t11 0 50 – ns t12 0 – – ns t13 – 5 10 ns Remark The MAX. in the table above shows the operation range in which the output characteristics are kept almost enough for general purpose, does not show the limit above which the μ PD3734A is destroyed.

μ PD3734A TIMING CHART for φ TG, φ 1, φ 2 t16t14 t15 90 % 10 % t17 90 % t18 TG φ φ Parameter MIN. TYP. MAX. Unit t14, t15 0 50 – ns t16 650 1000 (2000) ns t17, t18 0 100 – ns Remark The MAX. in the table above shows the operation range in which the output characteristics are kept almost enough for general purpose, does not show the limit above which the μ PD3734A is destroyed. CROSS POINTS for φ 1, φ 2

2 V or more2 V or more

φ Remark Adjust cross point of φ 1, φ 2 by φ 1, φ 2 pin external input resistors.

10 Data Sheet S11454EJ3V0DS

μ PD3734A DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage: Vsat Output signal voltage at which the response linearity is lost. 2. Saturation exposure: SE Product of intensity of illumination (IX) and storage time (s) when saturation of output voltage occurs. 3. Photo response non-uniformity: PRNU The peak/bottom ratio to the average output voltage of all the valid pixels calculated by the following formula. PRNU (%) = VMAX. or VMIN. n VΣ j j = 1 n − 1 × 100 n : Number of valid pixels Vj : Output voltage of each pixel VMIN. VMAX.Register Dark DC level j = 1 n Vjn 1 ∑ 4. Average dark signal: ADS Average output signal voltage of all the valid pixels at light shielding. This is calculated by the following formula. ADS (mV) = j = 1 2660 dj 2660 dj : Dark signal of valid pixel number j 5. Dark signal non-uniformity: DSNU Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. This is calculated by the following formula. DSNU (mV): maximum of | dj – ADS | j = 1 to 2660 dj : Dark signal of valid pixel number j ADS DSNU Register Dark DC level Vout

11Data Sheet S11454EJ3V0DS μ PD3734A 6. Output impedance: ZO Impedance of the output pins viewed from outside. 7. Response: R Output voltage divided by exposure (Ix•s). Note that the response varies with a light source (spectral characteristic). 8. Image lag: IL The rate between the last output voltage and the next one after read out the data of a line. OFFON VOUT VOUT Light TGφ IL (%) = × 100V1 VOUT 9. Register imbalance: RI The rate of the difference between the averages of the out put voltage of Odd and Ev en pixels, against the average output voltage of all the valid pixels. RI (%) = n j = 1 n (V2j – 1 – V2j) n j = 1 n Vj × 100 n : Number of valid pixels Vj : Output voltage of each pixel 10. Bit Noise: BN Output signal distribution of a photocell by scan.

12 Data Sheet S11454EJ3V0DS

μ PD3734A 11. Random noise: σ Random noise σ is defined as the standard deviation of a valid photocell output signal with 100 times (= 100 lines) data sampling at dark (light shielding). σ (mV) = i=1 100 (Vi – V) V 100 , = 100 i=1 100 Vi Vi : A valid pixel output signal among all of the valid photocells VOUT V100 line 1 line 2 line 100 This is measured by the DC level sampling of only the signal level, not by CDS (Correlated Double Sampling).

13Data Sheet S11454EJ3V0DS μ PD3734A STANDARD CHARACTERISTIC CURVES (Reference Value) 01 0 2 0 3 04 0 5 0 0.1 0.25 0.5 51 01 0.1 0.2 1200600400 1000 800 100 TOTAL SPECTRAL RESPONSE CHARACTERISTICS (without infrared cut filter) (TA = +25°C) STORAGE TIME OUTPUT VOLTAGE CHARACTERISTIC (TA = +25°C) DARK OUTPUT TEMPERATURE CHARACTERISTIC Operating Ambient Temperature T A (°C) Relative Output Voltage Relative Output Voltage Storage Time (ms) Wavelength (nm) Response Ratio (%)

14 Data Sheet S11454EJ3V0DS

μ PD3734A APPLICATION CIRCUIT EXAMPLE NC NC AGND VOD NC NC NC AGND NC NC NC NC NC VOUT NC NC φSHB φTG RBφ NC φ φ PD3734Aμ φRB SHBφ φTG +5 V +12 V 10 Ω0.1 Fμ 10 F /16 V μ 0.1 Fμ 10 F /16 V μ 74HC04 47 Ω 10 Ω 47 Ω 2 Ω 2 Ω 100 Ω 100 Ω 2 kΩ VOUT Caution Connect the No connection pins (NC) to GND. Remark When internal sample and hold circuit of the μ PD3734A is not necessary, connect pin 2 (φ SHB) to GND.

15Data Sheet S11454EJ3V0DS μ PD3734A PACKAGE DRAWING 44.0±0.3 37.5 1st valid pixel 0.8±0.3 1 9.25±0.3 2.0 0.25±0.05 10.16±0.2 1.02±0.15 (5.42) 4.21±0.5 4.39±0.4 2.35±0.2 3 (1.99) 2 Name Dimensions Refractive index Plastic cap 42.9 ×8.35×0.7 1.5 1 1st valid pixel The center of the pin1

2 The surface of the CCD chip The top of the cap

3 The bottom of the package The surface of the CCD chip

(Unit : mm) 10.16 +0.7 −0.2 CCD LINEAR IMAGE SENSOR 22-PIN PLASTIC DIP (10.16 mm (400) ) PD3734ACYμ

16 Data Sheet S11454EJ3V0DS

μ PD3734A RECOMMENDED SOLDERING CONDITIONS When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. Type of Through-hole Device μ PD3734ACY-A: CCD linear image sensor 22-pin plastic DIP (10.16 mm (400)) Process Conditions Partial heating method Pin temperature: 300°C or bel ow, Heat time: 3 seconds or less (per pin). Cautions 1. Cautions 1. During assembl y care should be taken to prevent so lder or flux from contacting the plastic cap. The optical characteristics could be degraded by such contact. 2. Soldering by the solder flow method may have deleterious effects on prevention of plastic cap soiling and heat resistance. So the method cannot be guaranteed.

17Data Sheet S11454EJ3V0DS μ PD3734A NOTES ON HANDLING THE PACKAGES CLEANING THE PLASTIC CAP DUST AND DIRT PROTECTING MOUNTING OF THE PACKAGE OPERATE AND STORAGE ENVIRONMENTS Ethyl Alcohol Methyl Alcohol Isopropyl Alcohol N-methyl Pyrrolidone EtOH MeOH IPA NMP The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either touch plastic cap surface by hand or have any object come in contact with plastic cap surface. Should dirt stick to a plastic cap surface, blow it off with an air blower. For dirt stuck through electricity ionized air is recommended. And if the plastic cap surface is grease stained, clean with our recommended solvents. Care should be taken when cleaning the surface to prevent scratches. We recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below. Excessive pressure should not be applied to the cap during cleaning. If the cap requires multiple cleanings it is recommended that a clean surface or cloth be used. The following are the recommended solvents for cleaning the CCD plastic cap. Use of solvents other than these could result in optical or physical degradation in the plastic cap. Please consult your sales office when considering an alternative solvent. The application of an excessive load to the package may cause the package to warp or break, or cause chips to come off internally. Particular care should be taken when mounting the package on the circuit board. Don't have any object come in contact with plastic cap. You should not reform the lead frame. We recommended to use a IC-inserter when you assemble to PCB. Also, be care that the any of the following can cause the package to crack or dust to be generated. 1. Applying heat to the external leads for an extended period of time with soldering iron. 2. Applying repetitive bending stress to the external leads. 3. Rapid cooling or heating Operate in clean environments. CCD image sensors are precise optical equipment that should not be subject to mechanical shocks. Exposure to high temperatures or humidity will affect the characteristics. So avoid storage or usage in such conditions. Keep in a case to protect from dust and dirt. Dew condensation may occur on CCD image sensors when the devices are transported from a low-temperature environment to a high-temperature environment. Avoid such rapid temperature changes. For more details, refer to our document "Review of Quality and Reliability Handbook" (C12769E) ELECTROSTATIC BREAKDOWN CCD image sensor is protected against static electricity, but destruction due to static electricity is sometimes detected. Before handling be sure to take the following protective measures. 1. Ground the tools such as soldering iron, radio cutting pliers of or pincer. 2. Install a conductive mat or on the floor or working table to prevent the generation of static electricity. 3. Either handle bare handed or use non-chargeable gloves, clothes or material. 4. Ionized air is recommended for discharge when handling CCD image sensor. 5. For the shipment of mounted substrates, use box treated for prevention of static charges. 6. Anyone who is handling CCD image sensors, mounting them on PCBs or testing or inspecting PCBs on which CCD image sensors have been mounted must wear anti-static bands such as wrist straps and ankle straps which are grounded via a series resistance connection of about 1 M Ω. RECOMMENDED SOLVENTS Solvents Symbol

18 Data Sheet S11454EJ3V0DS

μ PD3734A [MEMO]

19Data Sheet S11454EJ3V0DS μ PD3734A VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V IL (MAX) and V IH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between V IL (MAX) and VIH (MIN). HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions. POWER ON/OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. When switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. Use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. The correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I/O pull-up power supply while the device is not powered. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. NOTES FOR CMOS DEVICES

μ PD3734A The information in this document is current as of February, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to NEC Electronics products developed based on a customer- designated "quality assurance program" for a specific application. The recommended applications of an NEC Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC Electronics product before using it in a particular application. The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to determine NEC Electronics' willingness to support a given application. (Note) M8E 02. 11-1 (1) (2) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its majority-owned subsidiaries. "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as defined above). Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "Standard": "Special": "Specific":