RV4141A ONSEMI | Alldatasheet
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© 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com RV4141A Rev. 1.0.8 RV4141A — Low-Power, Ground-Fault Interrupter RV4141A Low-Power, Ground-Fault Interrupter
Features
Powered from the AC Line Built-In Rectifier Direct Interface to SCR 500μA Quiescent Current Precision Sense Amplifier Adjustable Time Delay Minimum External Components Meets UL 943 Requirements Compatible with 110V or 220V Systems Available in an 8-Pin SOIC Package
Description
The RV4141A is a low-power controller for AC- receptacle, ground-fault circ uit interrupters. These devices detect hazardous cu rrent paths to ground and ground to neutral faults. The circuit interrupter then disconnects the load from t he line before a harmful or lethal shock occurs. Internally, the RV4141A contains a diode rectifier, shunt regulator, precision sense amp lifier, current reference, time-delay circuit, and SCR driver. Two sense transformers, SCR, solenoid, three resistors, and four capacitors complete the design of the basic circuit interrupter. The simple layout and minimum component count ensure eas e of application and long- term reliability. Features not found in other GFCI controllers include a low offset voltage sense amplifier, eliminating the need for a coupling capacitor between the sense transformer and sense amplifier, and an internal rectifier to elim inate high-voltage rectifying diodes. The RV4141A is powered only during the positive half period of the line voltage, but can sense current faults independent of its phase relative to the line voltage. The gate of the SCR is driven only during the positive half cycle of the line voltage.
Ordering Information
RV4141AN -35 to +80°C 8-Lead, Plastic Dual-Inline Package (DIP) Rails RV4141AMT -35 to +80°C 8-Lead, Plastic Small-Ou tline Integrated Circuit (SOIC) Tape and Reel
Figure 1. Block Diagram Figure 2. Pin Assignment
1 Amp Out Sense Amplifier Output – an external resistor to V FB sets the IFAULT threshold
2 V FB Sense amplifier negative input
3 V REF Sense amplifier positive input – biased internally at +VS/2
4 GND Substrate ground for all circuitry
5 Line Anode of internal di ode connected to supply voltage
7 SCR Trigger Output for triggering ex ternal SCR when a fault is detected
8 Delay Cap An external capacitor to ground sets the delay time for a ground fault to be present before
© 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com RV4141A Rev. 1.0.8 3 RV4141A — Low-Power, Ground-Fault Interrupter Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Power Supply 10 mA PD Internal Power Dissipation 500 mW TSTG Storage Temperature Range -65 +150 °C TA Operating Temperature Range -35 +80 °C TJ Junction Temperature +125 °C TL Lead Soldering Temperature
10 Seconds, SOIC +260
60 Seconds, DIP +300
Symbol Parameter Typ. Max. Unit JA Thermal Resistance SOIC 240 °C/W DIP 160
© 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com RV4141A Rev. 1.0.8 4 RV4141A — Low-Power, Ground-Fault Interrupter
Electrical Characteristics
ILINE = 1.5mA and TA = +25°C, RSET= 650k Symbol Parameter Conditions Min. Typ. Max. Units Shunt Regulator (Pins 5 to 4) VREG Regulated Voltage I2-3 = 11µA 25 27 29 V ILINE = 750µA, I2-3 = 9µA 25 27 29 IQ Quiescent Current V 5-4 = 24V 500 µA Sense Amplifier (Pins 2 to 3) VOFF Offset Voltage -200 0 200 µV GBW Gain Bandwidth Design Value 3 MHz tSK Slew Rate Design Value 1 V/µS IBIAS Input Bias Current Design Value 30 100 nA SCR Trigger (Pins 7 to 4) ROUT Output Resistance V7-4 = Open, I2-3 = µA 3.8 4.7 5.6 k VOUT Output Voltage I2-3 = 9µA 0 0.1 10.0 mV I2-3 = 11µA 3.0 3.8 4.5 V IOUT Output Current V7-4 = 0V, I2-3 = 11µA 400 600 µA Reference Voltage (Pins 3 to 4) VREF Reference Voltage I LINE = 750µA 12 13 14 V Delay Timer (Pins 8 to 4) Discharge / Charge Ratio I2-3 = 0/11µA 1.8 2.5 3.0 µA/µA tDLY Delay Time(1) C 8-4 = 12nF 2 ms IDLY Delay Current I2-3 = 11µA 30 40 50 µA Notes: 1. Delay time is defined as starti ng when the instantaneous sense current (I2-3) exceeds 6.5V/RSET and ending when the SCR trigger voltage V7-6 goes HIGH.
© 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com RV4141A Rev. 1.0.8 5 RV4141A — Low-Power, Ground-Fault Interrupter Circuit Operation (Refer to Figure 1 and Figure 3.) The precision op amp connec ted to pins 1 through 3 senses the fault current flow ing in the secondary of the sense transformer, converting it to a voltage at pin 1. The ratio of secondary current to output voltage is directly proportional to feedback resistor, RSET. RSET converts the sense transformer secondary current to a voltage at pin 1. Due to the virtual ground created at the sense amplifier input by its negative feedback loop, the sense transformer's burden is equal to the value of RIN. From the transformer's point of view, the ideal value for RIN is 0Ω. This causes it to operate as a true current transformer with minimal error. However, making R IN equal to zero creates a lar ge offset voltage at pin 1 due to the sense amplifier's very high DC gain. RIN should be selected as high as possible, consistent with preserving the transformer's operation as a true current mode transformer. A typical value for R IN is between 200 and 1000Ω. As seen in Equation (1), maximizing R IN minimizes the DC offset error at the s ense amplifier output. The DC offset voltage at pin 1 contri butes directly to the trip current error. The offset voltage at pin 1 is: )/( ECINSETOS RSRRV (1) where: VOS = Input offset voltage of sense amplifier; RSET = Feedback resistor; RIN = Input resistor; RSEC = Transformer secondary winding resistance. The sense amplifier has a specified maximum offset voltage of 200 μV to minimize trip current errors. Two comparators connected to the sense amplifier output are configured as a window detecto r, whose references are -6.5V and +6.5V, referred to pin 3. When the sense transformer secondary RMS current exceeds 4.6/R SET, the output of the window detector starts the delay circuit. If the secondary current exc eeds the predetermined trip current for longer than the delay time, a current pulse appears at pin 7, triggering the SCR. The SCR anode is directly connected to a solenoid or relay coil. The SCR can be tripped only when its anode is more positive than its cathode. Supply Current Requirements The RV4141A is powered direct ly from the line through a series-limiting resistor called R LINE; its value is between 24k and 91k The controller IC has a built-in dioderectifier, eliminating the need for external power diodes. The recommended value for R LINEis 24k to 47k for 110V systems and 47kto 91k for 220V systems. When RLINEis 47kthe shunt regulator current is limited to 3.6mA. The recommended maximum peak line current through RLINE is 10mA. (Refer to Figure 3) The GFCI detects a ground fault by sensing a difference in current in the line and neutra l wires. The difference in current is assumed to be a fault current creating a potentially hazardous path from line to ground. Since the line and neutral wires pass through the center of the sense transformer, only the differential primary current is transferred to the secondary. Assuming the turns ratio is 1:1000, the secondary current is 1/1000th the fault current. The RV4141A’s sense amplifier converts the secondary current to a voltage compared with either of the two window detector reference voltages. If the fault current exceeds the design va lue for the duration of the programmed time delay, the RV4141A sends a current pulse to the gate of the SCR. Detecting ground-to-neutral faults is more difficult. R B represents a normal ground fault resistance. R N is the wire resistance of the elec trical circuit between load/ neutral and earth ground. R G represents the ground-to- neutral fault condition. Accord ing to UL 943, the GFCI must trip when R N = 0.4 Ω, RG = 1.6 Ω, and the normal ground fault is 6mA. Assuming the ground fault to be 5mA, 1mA, and 4mA goes through R G and R N, respectively, causing an effective 1mA fault current. Th is current is detected by the sense transformer and am plified by the sense amplifier. The ground / neut ral and sense transformers are mutually coupled by R G, R N, and the neutral wire ground loop, producing a pos itive feedback loop around the sense amplifier. T he newly created feedback loop causes the sense amplifier to oscillate at a frequency determined by ground/neutral transformer secondary inductance and C4, which occurs at 8KHz. C2 is used to program the ti me required for the fault to be present before the SCR is triggered. Refer to Equation (2) for calculating the value of C2. Its typical value is 12nF for a 2ms delay. R SET is used to set the fault current at which the GF CI trips. When used with a 1:1000 sense transformer, its typical value is 1M Ω for a GFCI designed to trip at 5mA. RIN should be the highest value possible that ensures a predictable secondary curr ent from the sense transformer. If R IN is set too high, normal production variations in the transformer permeability causes unit-to- unit variations in the secondary current. If it is too low, a large offset voltage error at pin 1 is present. This error voltage in turn creates a trip current error proportional to the input offset voltage of the sense amplifier. As an example, if RIN is 500Ω, RSET is 1M, RSEC is 45 and the VOS of the sense amplifie r is its maximum of 200 μV; the trip current error is ±5.6%.
(117VAC) and 22mA in the UK and Europe (220V AC). C2 is in Nf and t is the desired delay time in ms. N is the number of sense transformer secondary turns.
- This formula assumes an ideal sense transformer is
Figure 3. GFI Application Circuit
C. DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS. D. DOES NOT INCLUDE DAMBAR PROTRUSIONS. Figure 4. 8-Lead, Plastic Dual-Inline Package (DIP) warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/.
B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
1.75 MAX
Figure 5. 8-Lead, Plastic Small-Outline Integrated Circuit (SOIC) warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/.
© 2003 Fairchild Semiconductor Corporation www.fairchildsemi.com RV4141A Rev. 1.0.8 9 RV4141A — Low-Power, Ground-Fault Interrupter
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