RV4141A

RV4141A FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

• Powered from the AC line
• Built-in rectifier
• Direct interface to SCR
• 500 µA quiescent current
• Precision sense amplifier
• Adjustable time delay
• Minimum external components
• Meets UL 943 requirements
• For use with 110V or 220V systems
• Available in 8 pin DIP or SOIC package

Description

The RV4141A is a low power controller for AC receptacle ground fault circuit interrupters. These devices detect hazardous current paths to ground and ground to neutral faults. The circuit interrupter then disconnects the load from the line before a harmful or lethal shock occurs. Internally, the RV4141A contains a diode rectifier, shunt regulator, precision sense amplifier, current reference, time delay circuit, and SCR driver. Two sense transformers, SCR, solenoid, three resistors and four capacitors complete the design of the basic circuit inter- rupter. The simple layout and minimum component count insure ease of application and long term reliability. Features not found in other GFCI controllers include a low offset voltage sense amplifier eliminating the need for a coupling capacitor between the sense transformer and sense amplifier, and an internal rectifier to eliminate high voltage rectifying diodes. The RV4141A is powered only during the positive half period of the line voltage, but can sense current faults inde- pendent of its phase relative to the line voltage. The gate of the SCR is driven only during the positive half cycle of the line voltage. Block Diagram 4.7KDelay RV4141A 65-4141-01 Cap SCR +VS Line Amp Out VFB VREF Gnd RV4141A Low Power Ground Fault Interrupter

PRODUCT SPECIFICATION RV4141A REV. 1.0.1 7/8/03 Pin Assignments Absolute Maximum Ratings (beyond which the device may be damaged)1 Notes: 1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if Operating Conditions are not exceeded. Thermal Characteristics Parameter Min Typ Max Units Supply Current 10 mA Internal Power Dissipation 500 mW Storage Temperature Range -65 +150 °C Operating Temperature Range -35 +80 °C Junction Temperature 125 °C Lead Soldering Temperature 60 Sec, DIP 300 °C

10 Sec, SOIC 260 °C

Parameter Min Typ Max Units θ JA Thermal resistance SOIC 240 °C/W PDIP 160 °C/W Delay Cap SCR Trigger +VS Line Amp Out VFB VREF GND 65-4141A-02

RV4141A PRODUCT SPECIFICATION REV. 1.0.1 7/8/03

Electrical Characteristics

= 1.5mA and T A = +25°C, R SET = 650k Ω Note: 1. Delay time is defined as starting when the instantaneous sense current (I 2-3 ) exceeds 6.5 V/R SET and ending when the SCR trigger voltage V 7-6 goes high. Parameters Test Conditions Min Typ Max Units Shunt Regulator (Pins 5 to 4) Regulated Voltage I 2-3 = 11µA 25.0 27.0 29.0 V Regulated Voltage I LINE = 750 µA, I 2-3 = 9µA 25.0 27.0 29.0 V Quiescent Current V 5-4 = 24V — 500 — µA Sense Amplifier (Pins 2 to 3) Offset Voltage -200 0 200 µV Gain Bandwidth (Design Value) — 1.5 — MHz Input Bias Current (Design Value) 30 100 nA SCR Trigger (Pins 7 to 4) Output Resistance V 7-4 = Open, I 2-3 = µA 3.8 4.7 5.6 k Ω Output Voltage I 2-3 = 9µA 0 0.1 10 mV Output Voltage I 2-3 = 11µA 2.4 3.0 3.6 V Output Current V 7-4 = 0V, I 2-3 = 11µA 400 600 µA Reference Voltage (Pins 3 to 4) Reference Voltage I LINE = 750 µA 12.0 13.0 14.0 V Delay Timer (Pins 8 to 4) Delay Time (Note 1) C 8-4 = 12nF — 2.0 — ms Delay Current I 2-3 = 11µA 30 40 50 µA

PRODUCT SPECIFICATION RV4141A REV. 1.0.1 7/8/03 Circuit Operation (Refer to Block Diagram and Figure 1) The precision op amp connected to Pins 1 through 3 senses the fault current flowing in the secondary of the sense trans- former, converting it to a voltage at Pin 1. The ratio of sec- ondary current to output voltage is directly proportional to feedback resistor, R SET R SET converts the sense transformer secondary current to a voltage at Pin 1. Due to the virtual ground created at the sense amplifier input by its negative feedback loop, the sense transformer's burden is equal to the value of R IN . From the transformer's point of view, the ideal value for R IN is 0 Ω This will cause it to operate as a true current transformer with minimal error. However, making R IN equal to zero cre- ates a large offset voltage at Pin 1 due to the sense amplifier's very high DC gain. R IN should be selected as high as possi- ble consistent with preserving the transformer's operation as a true current mode transformer. A typical value for R IN is between 200 and 1000 Ω As seen by the equation below, maximizing R IN minimizes the DC offset error at the sense amplifiers output. The DC offset voltage at Pin 1 contributes directly to the trip current error. The offset voltage at Pin 1 is: V OS x R SET /(R IN + R SEC Where: V OS = Input offset voltage of sense amplifier R SET = Feedback resistor R IN = Input resistor R SEC = Transformer secondary winding resistance The sense amplifier has a specified maximum offset voltage of 200 µV to minimize trip current errors. Two comparators connected to the sense amplifier output are configured as a window detector, whose references are -6.5 volts and +6.5 volts referred to Pin 3. When the sense trans- former secondary RMS current exceeds 4.6/R SET the output of the window detector starts the delay circuit. If the second- ary current exceeds the predetermined trip current for longer than the delay time a current pulse appears at Pin 7, trigger- ing the SCR. The SCR anode is directly connected to a solenoid or relay coil. The SCR can be tripped only when its anode is more positive than its cathode. Supply Current Requirements The RV4141A is powered directly from the line through a series limiting resistor called R LINE , its value is between 24 k Ω and 91 k Ω . The controller IC has a built-in diode rectifier eliminating the need for external power diodes. The recommended value for R LINE is 24 k Ω to 47 k Ω for 110V systems and 47 k Ω to 91 k Ω for 220V systems. When R LINE is 47 k Ω the shunt regulator current is limited to 3.6 mA. The recommended maximum peak line current through R LINE is 10 mA. (Refer to Figure 1) The GFCI detects a ground fault by sensing a difference cur- rent in the line and neutral wires. The difference current is assumed to be a fault current creating a potentially hazardous path from iine to ground. Since the line and neutral wires pass through the center of the sense transformer, only the dif- ferential primary current is transferred to the secondary. Assuming the turns ratio is 1:1000 the secondary current is 1/1000th the fault current. The RV4141A’s sense amplifier converts the secondary current to a voltage which is com- pared with either of the two window detector reference volt- ages. If the fault current exceeds the design value for the duration of the programmed time delay, the RV4141A will send a current pulse to the gate of the SCR. Detecting ground to neutral faults is more difficult. R B repre- sents a normal ground fault resistance, R N is the wire resis- tance of the electrical circuit between load/ neutral and earth ground. R G represents the ground to neutral fault condition. According to UL 943, the GFCI must trip when R N = 0.4 Ω R G = 1.6 Ω and the normal ground fault is 6 mA. Assuming the ground fault to be 5 mA, 1 mA and 4 mA will go through R G and R N , respectively, causing an effective 1 mA fault current. This current is detected by the sense trans- former and amplified by the sense amplifier. The ground/ neutral and sense transformers are now mutually coupled by R G , R N and the neutral wire ground loop, producing a posi- tive feedback loop around the sense amplifier. The newly created feedback loop causes the sense amplifier to oscillate at a frequency determined by ground/neutral transformer secondary inductance and C4. Typically it occurs at 8 KHz. C2 is used to program the time required for the fault to be present before the SCR is triggered. Refer to the equation below for calculating the value of C2. Its typical value is 12 nF for a 2 ms delay. R SET is used to set the fault current at which the GFCI trips. When used with a 1:1000 sense transformer, its typical value is 1 M Ω for a GFCI designed to trip at 5 mA. R IN should be the highest value possible which insures a predictable secondary current from the sense transformer. If R IN is set too high, normal production variations in the transformer permeability will cause unit to unit variations in the secondary current. If it is too low, a large offset voltage error at Pin 1 will be present. This error voltage in turn cre- ates a trip current error proportional to the input offset volt- age of the sense amplifier. As an example, if R IN is 500 Ω

prevents high frequency line pulses from triggering the SCR. or less to meet the UL 943 timing requirement. fabricated using high permeability laminated steel rings. usually from 200 to 1500 turns. designed specifically for GFCI and related applications. Determine the nominal ground fault trip current requirement. minimum delay time required to prevent nuisance tripping. T is the desired delay time in ms. N is the number of sense transformer secondary turns. This formula assumes an ideal sense transformer is used. 30% to when using a non-ideal transformer. Figure 1. GFI Application Circuit

5 Ring Steel Core

1.1 Meg

PRODUCT SPECIFICATION RV4141A Mechanical Dimensions 8-Lead Plastic DIP Package A — .210 — 5.33 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .015 — .38 — .022 .56B .014 .36 B1 .045 .070 1.14 1.78 D .348 .430 8.84 10.92 .300 .325 7.62 8.26 .240 .280 6.10 7.11 E e — .430 — 10.92 .005 — .13 — A2 .115 .195 2.93 4.95 .100 BSC 2.54 BSC eB .115 .160 2.92 4.06L 8° 8° 5N C .008 .015 .20 .38 Notes: Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E1" do not include mold flashing. Mold flash or protrusions shall not exceed .010 inch (0.25mm). Terminal numbers are for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals. D e B A L 5 8 E eB C

RV4141A PRODUCT SPECIFICATION Mechanical Dimensions (continued) 8-Lead SOIC Package D A – C – ccc C LEAD COPLANARITY SEATING PLANEe B L h x 45° C α EH A .053 .069 1.35 1.75 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .004 .010 0.10 0.25 .020 0.51B .013 0.33 C .008 .010 0.20 0.25 E .150 .158 3.81 4.01 e .228 .244 5.79 6.20 .010 .020 0.25 0.50 H .050 BSC 1.27 BSC h L .016 .050 0.40 1.27 0° 8° 0° 8° N8 8 α ccc .004 0.10—— D .189 .197 4.80 5.00 Notes: Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). "L" is the length of terminal for soldering to a substrate. Terminal numbers are shown for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals.

PRODUCT SPECIFICATION RV4141A 7/8/03 0.0m 001 Stock#DS2004141A  2003 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

Ordering Information

Part Number Package Operating Temperature Range RV4141AN 8-Lead Plastic DIP -35 °C to +80°C RV4141AM 8-Lead Plastic SOIC -35 °C to +80°C