RMPA1959

RMPA1959 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

• Single positive-supply operation and low power and shutdown modes
• 39% CDMA efficiency at +28dBm average output power
• Compact LCC package- 4.0 x 4.0 x 1.5 mm with industry standard pinout
• Internally matched to 50 Ω and DC blocked RF input/ output.
• Meets CDMA2000-1XRTT performance requirements Absolute Ratings Note: No permanent damage with only one parameter set at extreme limit. Other parameters set to typical values. Symbol Parameter Min Max Units Vcc1, Vcc2 Supply Voltages 0 5.0 V Vref Reference Voltage 2.6 3.5 V Vmode Power Control Voltage 0 3.5 V Pin RF Input Power – +10 dBm T STG Storage Temperature -55 +150 °C Device

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959 Module Block Diagram Figure 1. RMPA1959 US PCS CDMA Power Amplifier Module Functional Block Diagram

Electrical Characteristics

Notes: All parameters met at Tc = +25°C, Vcc = +3.4V, f = 1880 MHz, and load VSWR 1.2:1. All phase angles. Guaranteed by design Symbol Parameter Condition Min Typ Max Units f Operating Frequency 1850 1910 MHz CDMA Operation SSg Small-Signal Gain P O = 0dBm 23 25 dB Gp Power Gain P O = +28dBm, Vmode = 0V P O = +16dBm, Vmode 2.0V 25 28 24.5 dB dB P O Linear Output Power Vmode = 0V Vmode 2.0V dBm dBm PAEd PAEd (digital) @ +28 dBm Vmode = 0V 36 39 % PAEd (digital) @ +16 dBm Vmode 2.0V 10 % PAEd (digital) @ +16 dBm Vmode 2.0V, V CC = 1.4V 20 % Itot High Power Total Current P O = +28dBm, Vmode = 0V 460 530 mA Low Power Total Current P O = +16dBm, Vmode = 2.0V 120 mA Adjacent Channel Power Ratio IS-95 ACPR1 ±1.25 MHz Offset P O = +28dBm; Vmode = 0V -50 -46 dBc P O = +16dBm; Vmode = 2.0V -52 dBc ACPR2 ±2.25 MHz Offset P O = +28dBm; Vmode = 0V -60 -57 dBc P O = +16dBm; Vmode = 2.0V -68 dBc General Characteristics VSWR Input Impedance 2.5:1 2.0:1 NF Noise Figure 4d B Rx No Receive Band Noise Power P O +28dBm; 1850 to 1910 MHz -139 dBm/Hz 2fo-5fo Harmonic Suppression P O +28dBm -30 dBc S Spurious Outputs 2,3 Load VSWR 5.0:1 -60 dBc Ruggedness w/Load Mismatch No permanent damage 10:1 Tc Case Operating Temperature -30 85 °C DC Characteristics Iccq Quiescent Current Vmode 2.0V 50 mA Iref Reference Current P O +28dBm 58 m A Icc (off) Leakage Shutdown Current No applied RF signal 15µ A INPUT MATCHING NETWORK OUTPUT MATCHING NETWORK COLLECTOR BIAS INTERSTAGE MATCH BIAS CONTROL INPUT STAGE INPUT STAGE BIAS OUTPUT STAGE BIAS OUTPUT STAGE MMIC PA MODULE VCC=3.4V (nom) VREF=2.85V (nom) 1850–1910 MHz

50 Ohms I/O

Vmode (4) VREF (5) RF IN (2) RF OUT (8) VCC1, VCC2 (1, 10) GND (3, 6, 7, 9, 11)

Figure 2. Package Outline

Figure 3. Evaluation Board Layout

11 G657553-1 V2 PC, BOARD FAIRCHILD

35 GRM39X7R102K50V 1000 pF CAPACITOR (0603) MURATA

A/R 8 SN63 SOLDER PASTE INDIUM CORP. A/R 9 SN96 SOLDER PASTE INDIUM CORP.

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959 Evaluation Board Schematic Recommended Operating Conditions Parameter Symbol Min Typ Max Units Operating Frequency f 1850 1910 MHz Supply Voltage Vcc1, Vcc2 3.0 3.4 4.2 V Reference Voltage (operating) (shutdown) Vref 2.7 2.85 3.1 0.5 V V Bias Control Voltage (low-power) (high-power) Vmode 1.8 2.0 3.0 0.5 V V Linear Output Power (high-power) (low-power) Pout +28 +16 dBm dBm Case Operating Temperature Tc -30 +85 °C 3,6,7,9 SMA1 RF IN Vcc2 (package base) 50 ohm TRL 50 ohm TRL 3.3 µF Vref 3.3 µF 1000 pF1000 pF 1000 pF 0.1 µF Vmode SMA2 RF OUT 1Vcc1 PA1959 PPYYWW U31XX

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959 Performance Data 1840 1860 1880 1900 1920 Frequency (MHz) Gain (dB) PAE (%) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) RMPA1959 Vcc=3.4V, Vref = 2.85V, Pout=28dBm, Vmode=0V RMPA1959 Vcc=3.4V, Vref = 2.85V, Pout=28dBm, Vmode=0V RMPA1959 Vcc=3.4V, Vref = 2.85V, Pout=28dBm, Vmode=0V, IS-95 -55 -54 -53 -52 -51 -50 -49 -48 -47 -46 -45 APCR1 (dBc) RMPA1959 Vcc=3.4V, Vref = 2.85V, Pout=28dBm, Vmode=0V, IS-95 -65 -64 -63 -62 -61 -60 -59 -58 -57 -56 -55 ACPR2 (dBc) -60 -55 -50 -45 -40APCR1 (dBc) APCR2 (dBc) -80 -75 -70 -65 -60 RMPA1959 16dBm Pout Vcc = 3.4V, Vref = 2.85V Vmode = 2.0V RMPA1959 16dBm Pout Vcc = 3.4V, Vref = 2.85V Vmode = 2.0V RMPA1959 16dBm Pout Vcc = 3.4V, Vref = 2.85V Vmode = 2.0V RMPA1959 16dBm Pout Vcc = 3.4V, Vref = 2.85V Vmode = 2.0V 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 28Gain (dB) PAE (%)

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959 Efficiency Improvement Application In addition to high-power/low-power bias modes, the efficiency of the PA module can be significantly increased at backed-off RF power levels by dynamically varying the supply voltage (Vcc) applied to the amplifier. Since mobile handsets and power amplifiers frequently operate at 10–20 dB back-off, or more, from maximum rated linear power, battery life is highly dependent on the DC power consumed at antenna power levels in the range of 0 to +16 dBm. The reduced demand on transmitted RF power allows the PA supply voltage to be reduced for improved efficiency, while still meeting linearity requirements for CDMA modulation with excellent margin. High-efficiency DC-DC converters are now available to implement switched-voltage operation. The following figures show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 10 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of –52dBc and ACPR2 of less than –61dBc. Operation at even lower levels of Vcc supply voltage are possible with a further restriction on the maximum RF output power. As shown below, the PA module can be biased at a supply voltage of as low as 0.7V with an efficiency as high as 10–12 percent at +8dBm output power. Excellent signal linearity is still maintained even under this low supply voltage condition. RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) 1840 1860 1880 1900 1920 Frequency (MHz) Gain (dB) Vcc=1.2V Vcc=1.5V Vcc=2.0V Vcc=3.0VVcc=3.4V RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm PAE (%) Vcc=1.2V Vcc=1.5V Vcc=2.0V Vcc=3.0V Vcc=3.4V RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm ACPR1 (dBc) Vcc=1.2V Vcc=1.5V Vcc=2.0V Vcc=3.0V Vcc=3.4V RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm ACPR2 (dBc) Vcc=1.2V Vcc=1.5V Vcc=2.0V Vcc=3.0VVcc=3.4V -60 -58 -56 -54 -52 -50 -48 -46 -44 -42 -40 -75 -73 -71 -69 -67 -65 -63 -61 -59 -57 -55

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959 Efficiency Improvement Application (continued) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm, Freq=1.88GHz 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) Gain (dB) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm, Freq=1.88GHz Vcc (V) PAE (%) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm, Freq=1.88GHz -60 -58 -56 -54 -52 -50 -48 -46 -44 -42 -40 Vcc (V) ACPR1 (dBc) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=16dBm, Freq=1.88GHz -75 -73 -71 -69 -67 -65 -63 -61 -59 -57 -55ACPR2 (dBc) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=8dBm, Freq=1.88GHz 30Gain (dB) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=8dBm, Freq=1.88GHz PAE (%) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=8dBm, Freq=1.88GHz -65 -63 -61 -59 -57 -55 -53 -51 -49 -47 -45ACPR1 (dBc) RMPA1959 PCS 4x4mm2 PAM Vref = 2.85V, Pout=8dBm, Freq=1.88GHz -80 -78 -76 -74 -72 -70 -68 -66 -64 -62 -60 ACPR2 (dBc) 0.5 1 1.5 2 2.5 3 3.5 4 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) 0.5 1 1.5 2 2.5 3 3.5 4 Vcc (V) 0.5 1 1.5 2 2.5 3 3.5 4

©2004 Fairchild Semiconductor Corporation RMPA1959 Rev. D RMPA1959

Application Information

CAUTION: THIS IS AN ESD SENSITIVE DEVICE Precautions to Avoid Permanent Device Damage:

• Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC & ground contact areas.
• Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues.
• Static Sensitivity: Follow ESD precautions to protect against ESD damage: –A properly grounded static-dissipative surface on which to place devices. – Static-dissipative floor or mat. –A properly grounded conductive wrist strap for each person to wear while handling devices.
• General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, & ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid.
• Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild recommends the following procedures prior to assembly.
• Dry-bake devices at 125°C for 24 hours minimum. Note: The shipping reels cannot withstand 125°C baking temperature.
• Assemble the dry-baked devices within 7 days of removal from the oven.
• During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C
• If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended.
• Reflow Profile – Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A typical heating rate is 1- 2°C/sec. – Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 120-150 seconds at 150°C. – Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter- metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 10 seconds. Maximum soldering temperatures should be in the range 215-220°C, with a maximum limit of 225°C. – Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack- resistant solder joint. The illustration below indicates the recommended soldering profile. Solder Joint Characteristics: Proper operation of this device depends on a reliable void- free attachment of the heatsink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should not be subjected to more than 225°C and reflow solder in the molten state for more than 5 seconds. No more than 2 rework operations should be performed.

Figure 4. Recommended Solder Reflow Profile

10 SEC

45 SEC (MAX)

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY , FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ FAST FASTr™ FPS™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ I 2C™ i-Lo™ ImpliedDisconnect™ Rev. I13 ACEx™ ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT ™ DOME™ EcoSPARK™ E 2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET  QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™Across the board. Around the world.™ The Power Franchise Programmable Active Droop™