RM4559D FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • Unity gain bandwidth – 4.0 MHz
  • Slew rate – 2.0 V/mS
  • Low noise voltage – 1.4 mVRMS
  • Supply voltage – ±22V for RM4559 and ±18V for RC4559
  • No frequency compensation required

Description

The RC4559 integrated circuit is a high performance dual operational amplifier internally compensated and con- structed on a single silicon chip using an advanced epitaxial process. These amplifiers feature improved AC performance which far exceeds that of the 741-type amplifiers. The specially designed low-noise input transistors allow the RC4559 to be used in low-noise signal processing applications such as audio preamplifiers and signal conditioners. The RC4559 also has more output drive capability than 741-type amplifiers and can be used to drive a 600W load. Block Diagram 65-3473-01 A Output (A) –Input (A) –Input (A) Output (B) –Input (B) –Input (B) B

  • No latch up
  • Large common mode and differential voltage ranges
  • Low power consumption
  • Parameter tracking over temperature range
  • Gain and phase match between amplifiers Pin Assignments 65-3473-02 Output (A) –Input (A) +Input (A) Output (B) –Input (B) +Input (B) –VS +V S Output (A) –Input (A) +Input (A) –VS +V S Output (B) –Input (B) +Input (B) 65-3473-03 RC4559 Dual High-Gain Operational Amplifier Rev. 1.0.0

PRODUCT SPECIFICATION RC4559 Absolute Maximum Ratings (beyond which the device may be damaged)1 Notes: 1. Functional operation under any of these conditions is NOT implied. 2. For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage. 3. Short circuit may be to ground on one op amp only. Rating applies to +75°C ambient temperature. Matching Characteristics (VS = ±15V, TA = +25°C unless otherwise specified) Parameter Min Typ Max Units Supply Voltage RM4559 ±22 V RC4559 ±18 Input Voltage2 ±15 V Differential Input Voltage 30 V P D TA < 50°C SOIC 300 mW PDIP 468 CerDIP 833 TO-99 658 Junction Temperature SOIC, PDIP 125 °C CerDIP, TO-99 175 Operating Temperature RM4559 -55 125 °C RC4559 0 70 Lead Soldering Temperature PDIP, CerDIP, T0-99 (60 sec) 300 °C SOIC (10 sec) 260 Output Short Circuit Duration

3 Indefinite

Parameter Test Conditions Typ Units Voltage Gain R L ³ 2 kW± 1.0 dB Input Bias Current ±15 nA Input Offset Current ±7.5 nA

RC4559 PRODUCT SPECIFICATION

Electrical Characteristics

(VS = ±15V and TA = +25°C unless otherwise specified) Note: 1. Sample tested only. RM4559 RC4559 Parameters Test Conditions Min Typ Max Min Typ Max Units Input Offset Voltage R S £ 10kW 1.0 5.0 2.0 6.0 mV Input Offset Current 5.0 100 5.0 100 nA Input Bias Current 40 250 40 250 nA Input Resistance (Differential Mode) 0.3 1.0 0.3 1.0 M W Large Signal Voltage Gain R L ³ 2kW, VOUT = ±10V 50 300 20 300 V/mV Output Voltage Swing R L ³ 10kW± 12 ±14 ±12 ±14 V R L ³ 2kW± 10 ±13 ±10 ±13 R L ³ 600W± 9.5 ±10 ±9.5 ±10 Input Voltage Range ±12 ±13 ±12 ±13 V Common Mode Rejection Ratio R S £ 10kW 80 100 80 100 dB Power Supply Rejection Ratio R S £ 10kW 82 100 82 100 dB Supply Current R L = ¥ 3.3 5.6 3.3 5.6 mA Transient Response Rise Time V IN = 20 mV R L = 2kW 80 80 mS Overshoot C L £ 100pF 35 35 % Slew Rate 1.5 2.0 1.5 2.0 V/ mS Unity Gain Bandwidth 3.0 4.0 3.0 4.0 MHz Power Bandwidth V OUT = 20Vp-p 24 32 24 32 kHz Input Noise Voltage1 F=20Hz to 20kHz 1.4 5.0 1.4 5.0 mVRMS Input Noise Current F=20Hz to 20kHz 25 25 pA RMS Channel Separation Gain = 100, F = 10kHz, RS = 1kW 90 90 dB The following specifications apply for RM = -55°C £ TA £ +125°C, RC = 0° £ TA £ +70°C Input Offset Voltage R S £ 10kW 6.0 7.5 mV Input Offset Current 300 200 nA Input Bias Current 500 300 nA Large Signal Voltage Gain R L ³ 2kW, VOUT = ±10V 25 15 V/mV Output Voltage Swing R L ³ 2kW± 10 ±10 V Supply Current R L = ¥ 4.0 6.6 4.0 6.6 mA

RC4559 PRODUCT SPECIFICATION Simplified Schematic Diagram 65-0208 Output (1,7) D25.8K 120 Q15 Q14 Q10 Q12 Q13 50K 15 pF Q9 Q11 50KR3 15 pFR2 (4) S (3,5) (2,6) -Input Q2 Q1 8.7K (8) S +Input

PRODUCT SPECIFICATION RC4559 Mechanical Dimensions 8-Lead Ceramic DIP Package A — .200 — 5.08 Symbol Inches Min. Max. Min. Max. Millimeters Notes b1 .014 .023 .36 .58 .065 1.65b2 .045 1.14 c1 .008 .015 .20 .38 E .220 .310 5.59 7.87 e .100 BSC 2.54 BSC L .125 .200 3.18 5.08 .015 .060 .38 1.52 .005 — .13 — 2, 8 5, 9 eA .300 BSC 7.62 BSC 7 Q 90¡ 105¡ 90¡ 105¡a D — .405 — 10.29 Notes: Index area: a notch or a pin one identification mark shall be located adjacent to pin one. The manufacturer's identification shall not be used as pin one identification mark. The minimum limit for dimension "b2" may be .023 (.58mm) for leads number 1, 4, 5 and 8 only. Dimension "Q" shall be measured from the seating plane to the base plane. This dimension allows for off-center lid, meniscus and glass overrun. The basic pin spacing is .100 (2.54mm) between centerlines. Each pin centerline shall be located within ±.010 (.25mm) of its exact longitudinal position relative to pins 1 and 8. Applies to all four corners (leads number 1, 4, 5, and 8). "eA" shall be measured at the center of the lead bends or at the centerline of the leads when "a" is 90¡. All leads – Increase maximum limit by .003 (.08mm) measured at the center of the flat, when lead finish applied. Six spaces. Note 1 D E Q A e L eA c1a

RC4559 PRODUCT SPECIFICATION Mechanical Dimensions (continued) 8-Lead Plastic DIP Package A — .210 — 5.33 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .015 — .38 — .022 .56B .014 .36 B1 .045 .070 1.14 1.78 D .348 .430 8.84 10.92 .300 .325 7.62 8.26 .240 .280 6.10 7.11 E e — .430 — 10.92 .005 — .13 — A2 .115 .195 2.93 4.95 .100 BSC 2.54 BSC eB .115 .160 2.92 4.06L 8¡ 8¡ 5N C .008 .015 .20 .38 Notes: Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E1" do not include mold flashing. Mold flash or protrusions shall not exceed .010 inch (0.25mm). Terminal numbers are for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals. D e B A L 5 8 E eB C

PRODUCT SPECIFICATION RC4559 Mechanical Dimensions (continued) 8-Lead SOIC Package D A – C – ccc C LEAD COPLANARITY SEATING PLANEe B L h x 45¡ C a EH A .053 .069 1.35 1.75 Symbol Inches Min. Max. Min. Max. Millimeters Notes A1 .004 .010 0.10 0.25 .020 0.51B .013 0.33 C .008 .010 0.20 0.25 E .150 .158 3.81 4.01 e .228 .244 5.79 6.20 .010 .020 0.25 0.50 H .050 BSC 1.27 BSC h L .016 .050 0.40 1.27 0¡ 8¡ 0¡ 8¡ N8 8 a ccc .004 0.10—— D .189 .197 4.80 5.00 Notes: Dimensioning and tolerancing per ANSI Y14.5M-1982. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). "L" is the length of terminal for soldering to a substrate. Terminal numbers are shown for reference only. "C" dimension does not include solder finish thickness. Symbol "N" is the maximum number of terminals.

RC4559 PRODUCT SPECIFICATION Mechanical Dimensions (continued) 8-Lead Metal Can IC Header Package k e a REFERENCE PLANE øb øb1 øD2 øD øD1 AQ FL1 L BASE and SEATING PLANE Notes: (All leads) øb applies between L1 & L2. øb1 applies between L2 & .500 (12.70mm) from the reference plane. Diameter is uncontrolled in L1 & beyond .500 (12.70mm) from the reference plane. Measured from the maximum diameter of the product. Leads having a maximum diameter .019 (.48mm) measured in below the reference plane of the product shall be within .007 (.18mm) of their true position relative to a maximum width tab. The product may be measured by direct methods or by gauge. All leads – increase maximum limit by .003 (.08mm) when lead finish is applied. A .165 .185 4.19 4.70 Symbol Inches Min. Max. Min. Max. Millimeters Notes øb .016 .019 .41 .48 .021 .53øb1 .016 .41 øD .335 .375 8.51 9.52 øD1 .305 .335 7.75 8.51 øD2 .110 .160 2.79 4.06 .200 BSC 5.08 BSCe .100 BSC 2.54 BSC 45¡ BSC 45 ¡ BSC F — .040 — 1.02 .027 .034 .69 .86 .027 .045 .69 1.14 2 1, 5 1, 5 a k L .500 .750 12.70 19.05 — .050 — 1.27 .250 — 6.35 — 1 .010 .045 .25 1.14Q

PRODUCT SPECIFICATION RC4559 5/20/98 0.0m 001 Stock#DS30004559 Ó 1998 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com O rdering Information Note: Product Number Temperature Range Screening Package RC4559M 0° to 70°C Commercial 8 Pin Wide SOIC RC4559N 0° to 70°C Commercial 8 Pin Plastic DIP RC4559D 0° to 70°C Commercial 8 Pin Ceramic DIP RM4559D -55°C to +125°C Commercial 8 Pin Ceramic DIP RM4559D/883B -55°C to +125°C Military 8 Pin Ceramic DIP RM4559T -55°C to +125°C Commercial 8 Pin TO-99 Metal Can RM4559T/883B -55°C to +125°C Military 8 Pin TO-99 Metal Can