RLP1N06CLE INTERSIL | Alldatasheet
Document overview
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- PDF pages: 7
Technical content
Features
- 1A, 55V
- r DS(ON) = 0.750Ω
- I LIMITat 150oC = 1.1A to 1.5A Maximum
- Built-in Voltage Clamp
- Built-in Current Limiting
- ESD Protected, 2kV Minimum
- Controlled Switching Limits EMI and RFI
- 175 oC Rated Junction Temperature
- Logic Level Gate
- Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Packaging JEDEC TO-220AB
Ordering Information
RLP1N06CLE TO-220AB L1N06CLE NOTE: When ordering, use the entire part number. G D S GATE DRAIN (FLANGE) SOURCE DRAIN Data Sheet July 1999
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RLP1N06CLE UNITS Maximum Temperature for Soldering 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 20mA, VGS = 0V (Figure 7) 55 - 70 V Gate to Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA (Figure 8) 1 - 2.5 V Zero Gate Voltage Drain Current I DSS VDS = 45V, VGS = 0V TC = 25 oC- - 5 µA TC = 150oC- - 2 0 µA Gate to Source Leakage Current I GSS VGS = 5V TC = 25 oC- - 5 µA TC = 150oC- - 2 0 µA Drain to Source On Resistance (Note 2) rDS(ON) ID = 1A, VGS = 5V (Figure 6) TC = 25oC - - 0.750 Ω TC = 150oC - - 1.500 Ω Limiting Current I DS(LIM) VDS = 15V, VGS = 5V (Figure 2) TC = 25oC 1.8 - 3 A TC = 150oC 0.9 - 1.5 A Turn-On Time t (ON) VDD = 30V, ID = 1A, VGS = 5V, RGS = 25Ω R L = 30Ω - - 6.5 µs Turn-On Delay Time t d(ON) - - 1.5 µs Rise Time t r 1-5 µs Turn-Off Delay Time t d(OFF) - - 7.5 µs Fall Time t f 1-5 µs Turn-Off Time t (OFF) - - 12.5 µs Thermal Resistance Junction to Case R θJC - - 4.17 oC/W Thermal Resistance Junction to Ambient R θJA TO-220AA - - 62 oC/W Electrostatic Voltage ESD Human Model (100pF, 1.5k Ω ) MIL-STD-883B (Category B2) 2000 - - V Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = 1A - - 1.5 V Reverse Recovery Time t rr ISD = 1A - - 1 ms NOTES: 2. Pulsed: pulse duration = 80µs maximum, duty cycle = 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. RLP1N06CLE
All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 device, like most Power MOSFET devices today, is limited to 175oC. The maximum voltage allowable can, therefore be expressed as: Duty Cycle Operation of the RLP1N06CLE In many applications either the drain to source voltage or the gate drive is not available 100% of the time. The copper header on which the RLP1N06CLE is mounted has a very large thermal storage capability, so for pulse widths of less than 100 milliseconds, the temperature of the header can be considered a constant case temperature calculated simply as: Generally the heat storage capability of the silicon chip in a power transistor is ignored for duty cycle calculations. Making this assumption, limiting junction temperature to 175 oC and using the TC calculated above, the expression for maximum V DS under duty cycle operation is: These values are plotted as Figures 12 thru 16. Limited Time Operations of the RLP1N06CLE Protection for a limited period of time is sufficient for many applications. As stated above the heat storage in the silicon chip can usually be ignored for computations of over 10 milliseconds and the thermal equivalent circuit reduces to a simple enough circuit to allow easy computation on the limiting conditions. The variation in limiting current with temperature complicates the calculation of junction temperature, but a simple straight line approximation of the variation is accurate enough to allow meaningful computations. The curves shown as figures 17 thru 21 give an accurate indication of how long the specified voltage can be applied to the device in the current limiting mode without exceeding the maximum specified 175 oC junction temperature. In practice this tells you how long you have to alleviate the condition causing the current limiting to occur. V DS 175oCT AMBIENT–() TC V DS ID DR θCA×××() TAMBIENT+= (EQ. 2) V DS