RLP03N06CLE

RLD03N06CLE FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

• 0.30A, 60V
• r DS(ON) = 6.0Ω
• Built in Current Limit ILIMIT0.140 to 0.210A at 150oC
• Built in Voltage Clamp Temperature Compensating PSPICE Model
• 2kV ESD Protected
• Controlled Switching Limits EMI and RFI

Description

The RLD03N06CLE, RLD03N06CLESM and RLP03N06CLE are intelligent monolithic power circuits which incorporate a lat- eral bipolar transistor, resistors, zener diodes and a power MOS transistor. The current limiting of these devices allow it to be used safely in circuits where a shorted load condition may be encoun- tered. The drain-source voltage clamping offers precision control of the circuit voltage when switching inductive loads. The “Logic Level” gate allows this device to be fully biased on with only 5.0V from gate to source, thereby facilitating true on-off power control directly from logic level (5V) integrated circuits. The RLD03N06CLE, RLD03N06CLESM and RLP03N06CLE incorporate ESD protection and are designed to withstand 2kV (Human Body Model) of ESD. Formerly developmental type TA49026. PACKAGING AVAILABILITY PART NUMBER PACKAGE BRAND RLD03N06CLE TO-251AA 03N06C RLD03N06CLESM TO-252AA 03N06C RLP03N06CLE TO-220AB 03N06CLE NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-252AA variant in tape and reel, i.e. RLD03N06CLESM9A.

Specifications RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE Electrical SpecificationsTC = +25oC, Unless Otherwise Specified PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain-Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V 60 - 85 V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA 1 - 2.5 V Zero Gate Voltage Drain Current I DSS VDS = 45V, VGS = 0V TJ = +25oC- - 5 0 µA TJ = +150oC - - 200 µA Gate-Source Leakage Current I GSS VGS =5 V T J = +25oC- - 5 µA TJ = +150oC- - 2 0 µA On Resistance r DS(ON) ID = 0.100A, VGS = 5V TJ = +25oC - - 6.0 Ω TJ = +150oC - - 12.0 Ω Limiting Current I DS(LIMIT) VDS = 15V, VGS = 5V TJ = +25oC 280 - 420 mA TJ = +150oC 140 - 210 mA Turn-On Time t ON VDD = 30V, ID = 0.10A, R L = 300Ω , VGS = 5V, R GS = 25Ω - - 7.5 µs Turn-On Delay Time t D(ON) - - 2.5 µs Rise Time t R - - 5.0 µs Turn-Off Delay Time t D(OFF) - - 7.5 µs Fall Time t F - - 5.0 µs Turn-Off Time t OFF - - 12.5 µs Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz - 100 - pF Output Capacitance C OSS -6 5-p F Reverse Transfer Capacitance C RSS - 3.0 - pF Thermal Resistance Junction to Case R θJC - - 5.0 oC/W Thermal Resistance Junction to Ambient RθJA TO-220 Package - - 80 oC/W TO-251 and TO-252 Packages - - 100 oC/W Source-Drain Diode Ratings and Specifications PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Forward Voltage V SD ISD = 0.1A - - 1.5 V Reverse Recovery Time t RR ISD = 0.1A, dISD /dt = 100A/µs - - 1.0 ms

FIGURE 7. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN FIGURE 10. SELF-CLAMPED INDUCTIVE SWITCHING FIGURE 11. TYPICAL CAPACITANCE vs DRAIN-TO-SOURCE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

FIGURE 13. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 14. RESISTIVE SWITCHING WAVEFORMS emitter junction of this bipolar transistor, the bipolar “turns on”. function of temperature. This dependence is shown in Figure 3. switching speed is very predictable. ous heatsink thermal resistances. alleviate the condition causing the current limiting to occur.

150 C T C–o

RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE Temperature Compensated PSPICE Model for the RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE SUBCKT RLD03N06CLE 2 1 3; rev 4/18/94 CA 12 8 0.547e-9 CB 15 14 0.547e-9 CIN 6 8 0.301e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 20 17 18 66.5 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 2.96e-9 LSOURCE 3 7 2.96e-9 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 QCONTROL 20 70 7 QMOD 1 RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 1.123 RGATE 9 20 3200 RIN 6 8 1e9 RSOURCE1 8 70 RDSMOD 1.12 RSOURCE2 70 7 RSMOD 2.16 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.22 .MODEL DBKMOD D (RS = 3150 TRS1 =0 TRS2 = 0) .MODEL DESD1MOD D (BV = 13.54 TBV1 = 0 TBV2 = 0 RS = 45.5 TRS1 = 0 TRS2 = 0) .MODEL DESD2MOD D (BV = 11.46 TBV1 = -7.576e-4 TBV2 = -3.0e-6 RS = 0 TRS1 = 0 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 74.2e-12 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 1.67 KP = 3.40 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL QMOD NPN (BF =5) .MODEL RBKMOD RES (TC1 = 4e-4 TC2 = 1.13e-8) .MODEL RDSMOD RES (TC1 = 6.80e-3 TC2 = 6.5e-6) .MODEL RSMOD RES (TC1 = 2.95e-3 TC2 = -1e-6) .MODEL RVTOMOD RES (TC1 = -2.22e-3 TC2 = -1.95e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3 VOFF = -1) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1 VOFF = -3) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.85 VOFF = 2.15) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.15 VOFF = -2.85) .ENDS NOTE: 1. For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records 1991. GATE LGATE RGATE EVTO DESD1 DESD2 12 13 S1A S1B S2A S2B CA CB EGS EDS R IN C IN MOS1 MOS2 RDRAIN DBREAK EBREAK DBODY LDRAIN DRAIN RSOURCE2 LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP 17 18 RSOURCE1

RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE TO-220AB

3 LEAD JEDEC TO-220AB PLASTIC PACKAGE

LEAD NO. 1 - GATE LEAD NO. 2 - DRAIN LEAD NO. 3 - SOURCE TERM. 4 - DRAIN EØP Q D H 1 L 60o b 1 2 3 e A c 45o D 1 A 1 TERM. 4 SYMBOL INCHES MILLIMETERS NOTESMIN MAX MIN MAX A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 - b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 D 0.590 0.610 14.99 15.49 - D 1 - 0.160 - 4.06 - E 0.395 0.410 10.04 10.41 - e 0.100 TYP 2.54 TYP 5 e1 0.200 BSC 5.08 BSC 5 H 1 0.235 0.255 5.97 6.47 - J1 0.100 0.110 2.54 2.79 6 L 0.530 0.550 13.47 13.97 - L1 0.130 0.150 3.31 3.81 2 ØP 0.149 0.153 3.79 3.88 - Q 0.102 0.112 2.60 2.84 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bot- tom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bot- tom of dimension D. 7. Controlling dimension: Inch. 8. Revision 1 dated 1-93.

RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE TO-251AA

3 LEAD JEDEC TO-251AA PLASTIC PACKAGE

LEAD NO. 1 - GATE LEAD NO. 2 - DRAIN LEAD NO. 3 - SOURCE TERM. 4 - DRAIN E A c SEATING D L b e 12 3 H 1 A 1 TERM. 4 PLANE SYMBOL INCHES MILLIMETERS NOTESMIN MAX MIN MAX A 0.086 0.094 2.19 2.38 - A1 0.018 0.022 0.46 0.55 3, 4 b 0.028 0.032 0.72 0.81 3, 4 b1 0.033 0.040 0.84 1.01 3 b2 0.205 0.215 5.21 5.46 3, 4 c 0.018 0.022 0.46 0.55 3, 4 D 0.270 0.290 6.86 7.36 - E 0.250 0.265 6.35 6.73 - e 0.090 TYP 2.28 TYP 5 e1 0.180 BSC 4.57 BSC 5 H 1 0.035 0.045 0.89 1.14 - J1 0.040 0.045 1.02 1.14 6 L 0.355 0.375 9.02 9.52 - L1 0.075 0.090 1.91 2.28 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-251AA outline dated 9-88. 2. Solder finish uncontrolled in this area. 3. Dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bot- tom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bot- tom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 10-95.

RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE TO-252AA SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE LEAD NO. 1 - GATE LEAD NO. 3 - SOURCE TERM. 4 - DRAIN E D L e b1b A L c SEATING BACK VIEW H 1 A 1 e1 J1 TERM. 4 0.265 MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS (6.7) 0.265 (6.7) 0.070 (1.8) 0.118 (3.0) 0.063 (1.6) 0.090 (2.3) 0.063 (1.6) 0.090 (2.3) PLANE SYMBOL INCHES MILLIMETERS NOTESMIN MAX MIN MAX A 0.086 0.094 2.19 2.38 - A1 0.018 0.022 0.46 0.55 4, 5 b 0.028 0.032 0.72 0.81 4, 5 b1 0.033 0.040 0.84 1.01 4 b2 0.205 0.215 5.21 5.46 4, 5 b3 0.190 - 4.83 - 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.270 0.290 6.86 7.36 - E 0.250 0.265 6.35 6.73 - e 0.090 TYP 2.28 TYP 7 e1 0.180 BSC 4.57 BSC 7 H 1 0.035 0.045 0.89 1.14 - J1 0.040 0.045 1.02 1.14 - L 0.100 0.115 2.54 2.92 - L1 0.020 - 0.51 - 4, 6 L2 0.025 0.040 0.64 1.01 3 L3 0.170 - 4.32 - 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. B of JEDEC TO-252AA outline dated 9-88. 2. L3 and b3 dimensions establish a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L 1 is the terminal length for soldering. 7. Position of lead to be measured 0.090 inches (2.28mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 5 dated 10-95.

Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters For general information regarding Harris Semiconductor and its products, call1-800-4-HARRIS UNITED STATES Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2-724-2111 SOUTH ASIA Harris Semiconductor H.K. Ltd. 13/F Fourseas Building 208-212 Nathan Road Tsimshatsui, Kowloon Hong Kong TEL: (852) 723-6339 NORTH ASIA Harris K.K. Kojimachi-Nakata Bldg. 4F 5-3-5 Kojimachi Chiyoda-ku, Tokyo 102 Japan TEL: (81) 3-3265-7571 TEL: (81) 3-3265-7572 (Sales) SEMICONDUCTOR RLD03N06CLE, RLD03N06CLESM, RLP03N06CLE TO-252AA 16mm TAPE AND REEL 330mm 50mm 13mm 22.4mm 16.4mm 2.0mm 4.0mm 1.75mm 1.5mm DIA. HOLE CL COVER TAPE USER DIRECTION OF FEED 8.0mm 16mm GENERAL INFORMATION 1. USE "9A" SUFFIX ON PART NUMBER. 2. 2500 PIECES PER REEL. 3. ORDER IN MULTIPLES OF FULL REELS ONL Y . 4. MEETS EIA-481 REVISION "A" SPECIFICATIONS. Revision 5 dated 10-95