54C164245 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 23

Technical content

Datasheet sections

  • 1 Functional description
  • 1.1 Cold spare
  • 1.2 Power-up
  • 1.3 Pin connections
  • 2 Absolute maximum ratings and operating conditions
  • 3 Electrical characteristics
  • 4 Radiations
  • 5 Test circuit
  • 6 Package information
  • 6.1 Ceramic Flat-48 package information
  • 7 Ordering information
  • 8 Other information
  • 8.1 Data code
  • 8.2 Documentation
  • 9 Revision history

Features

  • Fully compatible with 54ACS164245
  • Dual supply bidirectional level shifter
  • Extended voltage range from 2.3 V to 5.5 V
  • Separated enable pin for 3-state output
  • Schmidt-triggered I/Os: 100 mV hysteresis
  • Internal 26 Ω limiting resistor on each I/O
  • High speed: Tpd = 8 ns maximum
  • Fail safe
  • Cold spare
  • Hermetic package
  • 100 krad (Si) at any Mil1019 dose rate
  • SEL immune to 110MeV.cm2/mg LET ions
  • RHA QML-V qualified

Description

The 54AC164245 is a rad-hard advanced high- speed CMOS, Schmitt trigger 16-bit bidirectional multi-purpose transceiver with 3-state outputs and cold sparing. Designed for use as an interface between a 5 V bus and a 3.3 V bus in mixed 5 V/3.3 V supply systems, it achieves high-speed operation while maintaining the CMOS low-power dissipation. All pins have cold spare buffers to change them to high impedance when VDD is tied to ground. This IC is intended for two-way asynchronous communication between the data buses. The direction of the data transmission is determined by the nDIR inputs. The A port interfaces with the 3.3 V bus but can also operate at 2.3 V. The B port operates with the 5 V bus. Ceramic Flat-48 The upper metallic lid is not electrically connected to any pins, nor to the IC die inside the package Table 1. Device summary

1 Functional description

Figure 1. Logic diagram Table 2. Function table

1.1 Cold spare

1.2 Power-up

1.3 Pin connections

Figure 2. Pin connections

Table 3. Pin descriptions

1 DIR1 Direction control inputs

24 DIR2 Direction control inputs

2 Absolute maximum ratings and operating conditions

Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise noted, all voltages are referenced to VSS. case temperature range of -55°C to +125°C. Table 4. Absolute maximum ratings

  1. VDD1 (5 V) may remain disconnected.
  2. Short-circuits can cause exce ssive heating and destructive dissipation. Values are typical.
  3. Human body model: a 100 pF capacit or is charged to the specified voltage, then discharged through a

while the other pins are floating.

In Table 5, unless otherwise noted, all voltages are referenced to VSS. Table 5. Operating conditions

  1. Derates system propagation del ays by difference in rise time to switch point for tr or tf > 1 ns/V.

3 Electrical characteristics

the current meter must be placed in the circuit such that all current flows through the meter. Table 6. DC specifications

0.7 VDD2

0.7 VDD1

0.3 VDD2

0.3 VDD1

Table 6. DC specifications (continued)

  1. This device requires both VDD1 and VDD2 power supplies for operation. The power supply is indicated and followed by the

voltage to which the power supply is set to the given test.

  1. This parameter is supplied as a des ign limit but not guaranteed or tested.
  2. No more than one output should be shorted at a time for a maximum duration of one second.
  3. Power does not include power contributi on of any CMOS output sink current.
  4. Power dissipation specified per switching output.
  5. Tests must be performed in sequence and include attribute dat a only. Functional tests should include the truth table and

IH(min + 20%, -0%); VIL = VIL(max + 0%, -50%), as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices are guaranteed to VIH(min) and VIL(max).

In Table 7, data are guaranteed by design but not tested. Table 7. AC electrical characteristics

Table 7. AC electrical characteristics (continued)

4 Radiations

54AC164245 is a pure CMOS product. Irradiation is performed at high dose rates. Table 8. Radiations

5 Test circuit

Figure 3. Test circuit

  1. C L = 50 pF or equivalent (includes jig and probe capacitance), RT = ZOUT of pulse generator (typically

Figure 4. Waveform 1: propagation delay

Figure 7. Waveform 4: enable and disable times (port A = 3.3 V, port B = 5 V)

6 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

6.1 Ceramic Flat-48 p ackage information

Figure 8. Ceramic Flat-48 package mechanical drawing

  1. The upper metallic lid is not elec trically connected to any pins, nor to the IC die inside the package.

Table 9. Ceramic Flat-48 package mechanical data

7 Ordering information

8 Other information

8.1 Data code

  • EM xyywwz
  • QML-V yywwz where:

Table 10. Order codes

8.2 Documentation

9 Revision history

Table 11. Documentation provided for ESCC flight

  1. QCI = quality conformance inspection
  2. PIND = particle impact noise detection
  3. SEM = scanning electron microscope

Table 12. Document revision history 23-Sep-2011 1 Initial release. 06-Apr-2012 2 Added Pin 4 description to Table 3: Pin descriptions. documentation for engineering model (there is none).