RFV10N50BE INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- 10A, 500V
- r DS(ON) = 0.480Ω
- Very Fast Turn-Off Characteristics
- Nanosecond Switching Speeds
- Electrostatic Discharge Protected
- UIS Rating Curve
- SOA is Power Dissipation Limited
- High Input Impedance
Description
The RFV10N50BE is an N-Channel fast switching MOSFET transis- tor that is designed for switching regulators, inverters and motor driv- ers. The RFV10N50BE is a monolithic structure incorporating a high voltage, high current MOSFET, a control MOSFET and ESD protec- tion diodes. As indicated in the symbol to the right, the turn-on of the main MOSFET is controlled by Gate 1 (G 1). The control MOSFET, controlled by Gate 2 (G2), is distributed throughout the structure. Gate 2 provides a very low impedance and inductive path to rapidly dis- charge the gate of the main MOSFET. Gate 2 affords very fast turn-off (typically less than 25ns) when desired. A separate return connection, Source Kelvin (S K), is supplied for the gate drive circuit to avoid volt- age induced transients from the output circuit during switching. The RFV10N50BE can be operated directly from integrated circuits. Formerly developmental type TA9881. PACKAGE AVAILABILITY PART NUMBER PACKAGE BRAND RFV10N50BE TO-247 V10N50BE NOTE: When ordering use the entire part number. File Number 3377.1 August 1995 Absolute Maximum Ratings TC = +25oC UNITS Drain Current D 10 A Power Dissipation Control FET Power Dissipation
Specifications RFV10N50BE Electrical SpecificationsCase Temperature (TC ) = +25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS LIMITS UNITSMIN TYP MAX Drain-Source Breakdown Voltage BV DSS ID = 0.25mA, VGS = 0V 500 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 0.25mA 2 - 4 V Zero Gate Voltage Drain Current I DSS VDS = 500V, VGS = 0V TC = +25oC- - 1 µA TC = +125oC - - 250 µA Gate-Source Leakage Current I GSS VGS = +12V, VGS = -0.3V - - ±500 nA On Resistance r DS(ON) ID = 10A, VGS = 10V - - 0.480 Ω Turn-On Time t ON VDD = 250V, ID = 10A, RL = 25Ω , VGS1 = VGS2 = +10V, RGS1 = 6.25Ω, R GS2 = 20Ω - - 75 ns Turn-On Delay Time t D(ON) -2 0-n s Rise Time t R -3 0-n s Turn-Off Delay Time t D(OFF) -2 1-n s Fall Time t F -5- n s Turn-Off Time t OFF - - 50 ns Total Gate Charge Q G10 VGS = 0V to 10V V DD = 400V, ID = 10A, R L = 40Ω - 145 190 nC Gate Source Charge Q GS -1 7 2 2 n C Gate Drain (“Miller”) Charge Q GD -5 7 7 4 n C Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz - 3800 - pF Output Capacitance C OSS - 290 - pF Reverse Transfer Capacitance C RSS -7 5-p F Thermal Resistance R θJC Junction to Case - - 0.8 oC/W Thermal Resistance R θJA Junction to Ambient - - 40 oC/W Control FET Specifications PARAMETER SYMBOL TEST CONDITIONS LIMITS UNITSMIN TYP MAX Static Drain to Source r DS(ON) VGS = 10V, ID = 1.0A - 1.6 - Ω Drain Source Breakdown Voltage BV DSS ID = 1.0mA, VGS = 0V 14 15 - V Gate Threshold Voltage V GS(TH) VDS = VGS , ID = 0.25mA 2 - 4 V Total Gate Charge Q G10 ID = 1.0A, VGS = 10V - - 5 nC Source-Drain Diode Ratings and Specifications PARAMETER SYMBOL TEST CONDITIONS LIMITS UNITSMIN TYP MAX Continuous Source Current I S - - 10 A Pulsed Source Current I SM - - 25 A Forward Voltage V SD ISD = 10A, VGS = 0V - - 1.4 V Reverse Recovery Time t RR ISD = 10A, VGS = 0V, dISD /dt = 100A/µs - - 750 ns
FIGURE 7. NORMALIZED r DS(ON) vs JUNCTION TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN FIGURE 10. TYPICAL CAPACITANCE vs VOLTAGE FIGURE 11. TYPICAL SWITCHING WAVEFORMS FOR CON- FIGURE 12. MAXIMUM NORMALIZED TRANSIENT THERMAL
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
All Harris Semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters For general information regarding Harris Semiconductor and its products, call1-800-4-HARRIS UNITED STATES Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee
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TEL: (32) 2.724.2111 ASIA Harris Semiconductor PTE Ltd. No. 1 Tannery Road Cencon 1, #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400 SEMICONDUCTOR RFV10N50BE Packaging TERMINAL CONNECTIONS Lead No. 1 - Gate 1 (G1) Lead No. 2 - Gate 2 (G2) Lead No. 3 and Mounting Flange - Drain (D) Lead No. 4 - Source Kelvin (SK) Lead No. 5 - Source (S) A b c D E L ØR 123 45 e Q ØS ØP 12345 BACK VIEW TERM. 6 TO-247
5 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
A 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 b1 0.060 0.070 1.53 1.77 1, 2 b2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 D 0.800 0.820 20.32 20.82 - E 0.605 0.625 15.37 15.87 - e 0.110 TYP 2.79 TYP 4 e1 0.438 BSC 11.12 BSC 4 J1 0.090 0.105 2.29 2.66 5 L 0.620 0.640 15.75 16.25 - L1 0.145 0.155 3.69 3.93 1 ØP 0.138 0.144 3.51 3.65 - Q 0.210 0.220 5.34 5.58 - ØR 0.195 0.205 4.96 5.20 - ØS 0.260 0.270 6.61 6.85 - NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93.