RFP8P10 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 8A, 100V
  • r DS(ON) = 0.400Ω
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Packaging TO-220AB

Ordering Information

NOTE: When ordering, include the entire part number. G D S SOURCE DRAIN DRAIN GATE (FLANGE) July 1999 File Number 1496.2Data Sheet

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP8P10 UNITS Maximum Temperature for Soldering 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = -250µA, VGS = 0 -100 V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = -250µA -2 - -4 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS , VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS , VGS = 0V TJ = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0 - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) ID = 8A, VGS = -10V (Figures 6, 7) - - 0.400 Ω Drain to Source On Voltage (Note 2) V DS(ON) ID = 8A, VGS = -10V - - 3.2 V Turn-On Delay Time t d(ON) ID ≈ 4A, VDD = 50V, RG = 50Ω, VGS = -10V R L = 12Ω, (Figure 10) -1 8 6 0 n s Rise Time t r - 70 150 ns Turn-Off Delay Time t d(OFF) - 166 275 ns Fall Time t f - 94 175 ns Input Capacitance C ISS VGS = 0V, VDS = 25V, f = 1MHz (Figure 9) - - 1500 pF Output Capacitance C OSS - - 700 pF Reverse Transfer Capacitance C RSS - - 300 pF Thermal Resistance, Junction to Case R θJC RFP8P10 - - 1.67 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = -4A - - -1.4 V Diode Reverse Recovery Time t rr ISD = -4A, dlSD /dt = -100A/µs - 200 - ns NOTES: 2. Pulse Test: Pulse Width≤ 300µs, Duty Cycle≤ 2% 3. Repetitive rating: pulse width is limited by maximum junction temperature. RFP8P10

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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FIGURE 13. GATE CHARGE TEST CIRCUIT FIGURE 14. GATE CHARGE WAVEFORMS