RFP45N03L INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 45A, 30V
  • r DS(ON) = 0.022Ω
  • Temperature Compensating PSPICE Model
  • Can be Driven Directly from CMOS, NMOS, and TTL Circuits
  • Peak Current vs Pulse Width Curve
  • UIS Rating Curve
  • 175 oC Operating Temperature
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Description

These are N-Channel power MOSFETs manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI circuits, gives optimum utili- zation of silicon, resulting in outstanding performance. They were designed for use in applications such as switching reg- ulators, switching converters, motor drivers and relay drivers. These transistors can be operated directly from integrated circuits. Formerly developmental type TA49030. Symbol Packaging

Ordering Information

RFP45N03L TO-220AB FP45N03L RF1S45N03L TO-262AA F45N03L RF1S45N03LSM TO-263AB F45N03L NOTE: When ordering, use the entire part number. Add the suffix 9A, to obtain the TO-263AB variant in tape and reel, e.g., RF1S45N03LSM9A. G D S JEDEC TO-220AB JEDEC TO-262AA JEDEC TO-263AB GATE DRAIN (FLANGE) SOURCE DRAIN SOURCE DRAIN GATE DRAIN (FLANGE) DRAIN (FLANGE) GATE SOURCE CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 File Number 4005.2 [ /Title (RFP45 N03L, RF1S45 N03L, RF1S45 N03LS /Subject (45A, 30V , 0.022 Ohm,

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP45N03L, RF1S45N03L, RF1S45N03LSM UNITS Refer to Peak Current Curve A 0.606 W W/oC Maximum Temperature for Soldering 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V 30 - - V Gate to Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA1 - 2 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS , VGS = 0V - - 25 µA VDS = Rated BVDSS , VGS = 0V, TC = 150oC - - 250 µA Gate to Source Leakage Current I GSS VGS = ±10V - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) ID = 45A, VGS = 5V (Figure 11 - - 0.022 Ω Turn-On Time t ON VDD = 15V, ID = 45A, RL = 0.33Ω , VGS = 5V, RGS = 5Ω (Figures 15, 18, 19) - - 260 ns Turn-On Delay Time t d(ON) -1 5- n s Rise Time t r - 160 - ns Turn-Off Delay Time t d(OFF) -2 0- n s Fall Time t f -2 0- n s Turn-Off Time t OFF - - 60 ns Total Gate Charge Q g(TOT) VGS = 0V to 10V V DD = 24V, ID = 45A, R L = 0.533Ω IG(REF) = 0.6mA (Figures 20, 21) -5 0 6 0 n C Gate Charge at 5V Q g(5) VGS = 0V to 5V - 30 36 nC Threshold Gate Charge Q g(TH) VGS = 0V to 1V - 1.5 1.8 nC Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 14) - 1650 - pF Output Capacitance C OSS - 575 - pF Reverse Transfer Capacitance C RSS - 200 - pF Thermal Resistance Junction-to-Case R θJC - - 1.65 oC/W Thermal Resistance Junction-to-Ambient RθJA -- 8 0 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD ISD = 45A - - 1.5 V Diode Reverse Recovery Time t rr ISD = 45A, dISD /dt = 100A/µs - - 125 ns NOTES: 2. Pulse test: pulse width≤ 300µs, duty cycle≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). RFP45N03L, RF1S45N03L, RF1S45N03LSM

FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Harris Application Notes AN7254 and AN7260. FIGURE 15. NORMALIZED SWITCHING WAVEFORMS FOR

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

.SUBCKT RFP45N03L 2 1 3 ; rev 11/22/94 CA 12 8 2.55e-9 CB 15 14 2.64e-9 CIN 6 8 1.45e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 33.3 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 4.9e-9 LSOURCE 3 7 4.9e-9 MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 0.14e-3 RGATE 9 20 0.89 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 10.31e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.583 ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/176,6))} .MODEL DBKMOD D (RS = 1.66e-1 TRS1 = -2.97e-3 TRS2 = 7.57e-6) .MODEL DPLCAPMOD D (CJO = 0.96e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 2.313 KP = 53.82 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 8.95e-4 TC2 = -1e-7) .MODEL RDSMOD RES (TC1 = 3.82e-3 TC2 = 1.17e-5) .MODEL RSCLMOD RES (TC1 = 2.03e-3 TC2 = 0.45e-5) .MODEL RVTOMOD RES (TC1 = -2.27e-3 TC2 = -5.75e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.82 VOFF= -2.82) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.82 VOFF= -4.82) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.67 VOFF= 2.33) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.33 VOFF= -2.67) .ENDS NOTE: For further discussion of the PSPICE model, consultA New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. GATE LGATE RGATE EVTO 12 13 S1A S1B S2A S2B CA CB EGS EDS RIN CIN MOS1 MOS2 DBREAK DBODY LDRAIN DRAIN RSOURCE LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP 7 3 17 18 RDRAIN ESCL RSCL1RSCL2 EBREAK + RFP45N03L, RF1S45N03L, RF1S45N03LSM