RFG40N10 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • 40A, 100V DS(ON) = 0.040 Ω
  • UIS Rating Curve
  • SOA is Power Dissipation Limited
  • 175 o C Operating Temperature
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Packaging

Ordering Information

RFP40N10 TO-220AB RFP40N10 RF1S40N10 TO-262AA F1S40N10 RF1S40N10SM TO-263AB F1S40N10 NOTE: When ordering, use the entire part number. Add the suffix, 9A, to obtain the TO-263AB variant in tape and reel, i.e. RF1S40N10SM9A. D G S JEDEC STYLE TO-247 JEDEC TO-220AB JEDEC TO-263AB JEDEC TO-262AA DRAIN (FLANGE) SOURCE DRAIN GATE DRAIN (FLANGE) SOURCE DRAIN GATE DRAIN (FLANGE)GATE SOURCE DRAIN SOURCE GATEDRAIN (FLANGE) Data Sheet January 2002

©2002 Fairchild Semiconductor Corporation RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM Rev. C Absolute Maximum Ratings T C = 25 o C, Unless Otherwise Specified RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM UNITS DSS 100 V Drain to Gate Voltage (R GS = 1M DGR 100 V GS 20 V Drain Current D DM 100 A A AS Figures 4, 12, 13 D Derate Above 25 o 160 1.07 W o C J , T STG -55 to 175 o C Maximum Temperature for Soldering L pkg 300 260 o C o C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. T J = 25 o C to 150 o 2. Repetitive Rating: pulse width limited by maximum junction temperature. Electrical Specifications T C = 25 o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS I D = 250 µ A, V GS = 0V (Figure 9) 100 - - V Gate Threshold Voltage V GS(TH) V GS = V DS , I D = 250 µ A (Figure 8) 2 - 4 V Zero Gate Voltage Drain Current I DSS V DS = 80V, V GS = 0V T C = 25 o C- - 1 µ A T C = 150 o C- - 5 0 µ A Gate to Source Leakage Current I GSS V GS 20V - - 100 nA Drain to Source On Resistance r DS(ON) I D = 40A, V GS = 10V (Figure 7) - - 0.040 Ω Turn-On Time t ON V DD = 50V, I D = 20A, R L = 2.5 Ω , V GS = 10V, R GS = 4.2 Ω (Figure 11) - - 80 ns Turn-On Delay Time t d(ON) -1 7- n s Rise Time t r -3 0- n s Turn-Off Delay Time t d(OFF) -4 2- n s Fall Time t f -2 0- n s Turn-Off Time t OFF - - 100 ns Total Gate Charge Q g(TOT) V GS = 0V to 20V V DD = 80V, I D = 40A, R L = 2.0 Ω (Figures 11) - - 300 nC Gate Charge at 10V Q g(10) V GS = 0V to 10V - - 150 nC Threshold Gate Charge Q g(TH) V GS = 0V to 2V - - 7.5 nC Thermal Resistance Junction to Case R θ JC - - 0.94 o C/W Thermal Resistance Junction to Ambient R θ JA TO-247 - - 30 o C/W TO-220AB and TO-263AB - - 62 o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD I SD = 40A - - 1.5 V Reverse Recovery Time t rr I SD = 40A, dI SD /dt = 100A/ µ s - - 200 ns RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Application Notes AN7254 and AN7260. FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ Rev. H4 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET STAR*POWER is used under license VCX™