RFP3055 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • 12A, 60V DS(ON) = 0.150 Ω
  • Temperature Compensating PSPICE Model
  • Peak Current vs Pulse Width Curve
  • UIS Rating Curve
  • 175 o C Operating Temperature
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Packaging

Ordering Information

NOTE: When ordering, use the entire part number. Add the suffix 9A, to obtain the TO-252AA variant in tape and reel, i.e. RFD3055SM9A. G D S JEDEC TO-251AA JEDEC TO-252AA JEDEC TO-220AB SOURCE DRAIN (FLANGE) GATE DRAIN GATE SOURCE DRAIN (FLANGE) GATE DRAIN (FLANGE) SOURCE DRAIN Data Sheet January 2002

©2002 Fairchild Semiconductor Corporation RFD3055, RFD3055SM, RFP3055 Rev. B Absolute Maximum Ratings T C = 25 o C, Unless Otherwise Specified RFD3055, RFD3055SM, RFP3055 UNITS DSS 60 V Drain to Gate Voltage (R GS = 20K Ω DGR 60 V GS 20 V D 12 A DM Refer to Peak Current Curve A AS Refer to UIS Curve D 53 W o C J , T STG -55 to 175 o C Maximum Temperature for Soldering L pkg 300 260 o C o C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. T J = 25 o C to 150 o Electrical Specifications T C = 25 o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS I D = 250 µ A, V GS = 0V (Figure 11) 60 - - V Gate Threshold Voltage V GS(TH) V GS = V DS , I D = 250 µ A (Figure 10) 2 - 4 V Zero Gate Voltage Drain Current I DSS V DS = Rated BV DSS , V GS = 0V - - 1 µ A T C = 125 o C, V DS = 0.8 x Rated BV DSS -- 2 5 µ A Gate to Source Leakage Current I GSS V GS 20V - - 100 nA Drain to Source On Resistance r DS(ON) I D = 12A, V GS = 10V (Figure 9) (Note 2) - - 0.150 Ω Turn-On Time t ON V DD = 30V, I D = 12A R L = 2.5 Ω , V GS = +10V R G = 10 Ω (Figure 13) - - 40 ns Turn-On Delay Time t d(ON) -7-n s Rise Time t r -2 1- n s Turn-Off Delay Time t d(OFF) -1 6- n s Fall Time t f -1 0- n s Turn-Off Time t OFF - - 40 ns Total Gate Charge Q g(TOT) V GS = 0 to 20V V DD = 48V,I D = 12A, R L = 4 I g(REF) = 0.24mA (Figure 13) -1 9 2 3n C Gate Charge at 10V Q g(10) V GS = 0 to 10V - 10 12 nC Threshold Gate Charge Q g(TH) V GS = 0 to 2V - 0.6 0.8 nC Input Capacitance C ISS V DS = 25V, V GS = 0V, f = 1MHz (Figure 12) - 300 - pF Output Capacitance C OSS - 100 - pF Reverse Transfer Capacitance C RSS -3 0- p F Thermal Resistance Junction to Case R θ JC - - 2.8 o C/W Thermal Resistance Junction to Ambient R θ JA TO-251 and TO-252 - - 100 o C/W TO-220 - - 62.5 o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD I SD = 12A - - 1.5 V Reverse Recovery Time t rr I SD = 12A, dI SD /dt = 100A/ µ s - - 100 ns NOTES: 2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%. 3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current Capability Curve (Figure 5). RFD3055, RFD3055SM, RFP3055

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

175 T C–

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation RFD3055, RFD3055SM, RFP3055 Rev. B .SUBCKT RFP3055 2 1 3 ; rev 10/26/93 CA 12 8 0.540e-9 CB 15 14 0.540e-9 CIN 6 8 0.300e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 67.9 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 4.61e-9 LSOURCE 3 7 4.61e-9 MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1e-4 RGATE 9 20 7.23 RIN 6 8 1e9 RSCL1 5 51 RSLVCMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 108e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.5 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))} .MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6) .MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10) .MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6) .MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5) .MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6) .MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50) .ENDS NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFet Featuring Global Temperature Options; authored by William J. Hepp and C. Frank Wheatley. GATE LGATE RGATE EVTO 12 13 S1A S1B S2A S2B CA CB EGS EDS RIN CIN MOS1 MOS2 RDRAIN DBREAK EBREAK DBODY LDRAIN DRAIN RSOURCE LSOURCE SOURCE RBREAK RVTO VBAT IT VTO ESG DPLCAP ESCL RSCL1 RSCL2 17 18 RFD3055, RFD3055SM, RFP3055

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ Rev. H4 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET STAR*POWER is used under license VCX™