RFM18N08 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- 18A, 80V and 100V
- r DS(ON) = 0.100Ω
- Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”
Description
These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated cir- cuits. Formerly developmental type TA17421. Symbol Packaging JEDEC TO-204AA JEDEC TO-220AB
Ordering Information
RFM18N08 TO-204AA RFM18N08 RFM18N10 TO-204AA RFM18N10 RFP18N08 TO-220AB RFP18N08 RFP18N10 TO-220AB RFP18N10 NOTE: When ordering, use the entire part number. D G S DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) SOURCE DRAIN GATEDRAIN (TAB) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 File Number 1446.1 [ /Title (RFM18 N08, RFM18 N10, RFP18N 08, RFP18N 10) /Subject (18A, 80V and 100V ,
0.1 Ohm,
FETs) /Author /Key- words (Harris Semi- conduc- tor, N- Channel Power MOS- FETs, TO- 204AA, TO- 220AB) /Creator /DOCIN FO pdf- mark
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFM18N08 RFM18N10 RFP18N08 RFP18N10 UNITS A A 100 0.8 100 0.8 0.6 0.6 W W/oC Maximum Temperature for Soldering 300 260 300 260 300 260 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V RFM18N08, RFP18N08 80 - - V RFM18N10, RFP18N10 100 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 8) 2 - 4 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS , VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) ID = 18A, VGS = 10V, (Figures 6, 7) - - 0.100 Ω Drain to Source On Voltage (Note 2) VDS(ON) ID = 18A, VGS = 10V - - 1.8 V Turn-On Delay Time t d(ON) VDD = 50V, ID ≈ 9A, RG = 50Ω , VGS = 10V, R L = 5.5Ω (Figures 10, 11, 12) -6 0 9 0 n s Rise Time t r - 300 450 ns Turn-Off Delay Time t d(OFF) - 150 225 ns Fall Time t f - 150 225 ns Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz, (Figure 9) - - 1700 pF Output Capacitance C OSS - - 750 pF Reverse-Transfer Capacitance C RSS - - 300 pF Thermal Resistance Junction to Case R θJC RFM18N08, RFM18N10 - - 1.25 oC/W RFP18N08, RFP18N10 - - 1.67 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = 9A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 4A, dISD /dt = 100A/µs - 150 - ns NOTES: 2. Pulse test: width≤ 300µs, duty cycle≤ 2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. RFM18N08, RFM18N10, RFP18N08, RFP18N10
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs
0.1 ID, DRAIN CURRENT
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Harris Application Notes AN7254 and AN7260. FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR