RFP15N08L INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

Features

  • 15A, 80V
  • r DS(ON) = 0.140Ω
  • Design Optimized for 5 Volt Gate Drive
  • Can be Driven Directly from Q-MOS, N-MOS, TTL Circuits
  • SOA is Power Dissipation Limited
  • 175 oC Rated Junction Temperature
  • Logic Level Gate
  • High Input Impedance
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol Packaging JEDEC TO-220AB

Ordering Information

RFP15N08L TO-220AB RFP15N08L NOTE: When ordering, use the entire part number. G D S GATE DRAIN (FLANGE) SOURCE DRAIN Data Sheet June 1999

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP15N08L UNITS 0.48 W W/oC Maximum Temperature for Soldering 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 1mA, VGS = 0V 80 - - V Gate to Threshold Voltage V GS(TH) VGS = VDS , ID = 1mA 1 - 2.5 V Zero Gate Voltage Drain Current I DSS TC = 25oC, VDS = 65V, VGS = 0V - - 1 µA TC = 125oC, VDS = 65V, VGS = 0V - - 50 µA Gate to Source Leakage Current I GSS VGS = 10V, VDS = 0V - - 100 nA Drain to Source On Voltage V DS(ON) ID = 7.5A, VGS = 5V - - 1.05 V ID = 15A, VGS = 5V - - 3.0 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 7.5A, VGS = 5V - - 0.140 Ω Forward Transconductance V (plateau)VDS = 15V, ID = 15A - - 4.5 V Turn-On Delay Time t d(ON) VDD = 40V, ID = 7.5A, RGS = 6.25Ω, VGS = 5V - - 40 ns Rise Time t r - - 325 ns Turn-Off Delay Time t d(OFF) - - 325 ns Fall Time t f - - 325 ns Total Gate Charge (Gate to Source + Gate to Drain) Q g(TOT) VGS = 0-10V V DD = 64V, ID = 15A, R L = 4.27Ω - - 80 nC Gate Charge at 5V Q g(5) VGS = 0-5V - - 45 nC Threshold Gate Charge Q g(TH) VGS = 0-1V - - 3 nC Thermal Resistance Junction to Case R θJC - - 2.083 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD ISD = 7.5A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 4A, dISD /dt = 100A/µs - 225 - ns NOTES: 2. Pulsed: pulse duration =≤ 300µs maximum, duty cycle =≤ 2%. 3. Repititive rating: pulse width limited by maximum junction temperature. RFP15N08L

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

1130 Brussels, Belgium

FIGURE 12. GATE CHARGE TEST CIRCUIT FIGURE 13. GATE CHARGE WAVEFORMS