RFM12N35 INTERSIL | Alldatasheet
Document overview
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Technical content
Features
- 12A, 350V and 400V
- r DS(ON) = 0.500Ω
Description
These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17434. Symbol Packaging JEDEC TO-204AA
Ordering Information
RFM12N35 TO-204AA RFM12N35 RFM12N40 TO-204AA RFM12N40 NOTE: When ordering, use the entire part number. G D S DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) September 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 File Number 1787.1 RFM12N35, RFM12N40 12A, 350V and 400V, 0.500 Ohm, N-Channel Power MOSFETs [ /Title (RFM12 N35, RFM12 N40) /Sub- ject (12A, 350V and 400V , 0.500 Ohm, N-Chan- nel Power MOS- FETs) /Author /Key- words (12A, 350V and 400V , 0.500 Ohm, N-Chan- nel Power MOS- FETs) /Cre- ator () /DOCIN
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFM12N35 RFM12N40 UNITS Maximum Temperature for Soldering CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250mA, VGS = 0V RFM12N35 350 - - V RFM12N40 400 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 8) 2 - 4 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS, VGS = 0 - - 1 µA VDS = 0.8 x Rated BVDSS, VGS = 0, TC = 125oC --2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) ID = 12A, VGS = 10V, (Figures 6, 7) - - 0.500 Ω Drain to Source On Voltage (Note 2) V DS(ON) ID = 6A, VGS = 10V - - 3 V ID = 12A, VGS = 10V - - 6.0 V Turn-On Delay Time t d(ON) ID ≈ 6A, VDS = 200V, RG = 50Ω, VGS = 10V, RL = 33Ω, (Figures 10, 11, 12) -3 05 0 n s Rise Time t r - 105 150 ns Turn-Off Delay Time t d(OFF) - 480 750 ns Fall Time t f - 140 200 ns Input Capacitance C ISS VGS = 0V, VDS = 25V, f = 1MHz (Figures 9) - - 3000 pF Output Capacitance C OSS - - 900 pF Reverse Transfer Capacitance C RSS - - 400 pF Thermal Resistance Junction to Case R θJC - - 0.83 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = 6A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 4A, dISD /dt = 100A/µs - 950 - ns NOTE: 2. Pulse test: pulse width≤ 300µs, duty cycle≤ 2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. RFM12N35, RFM12N40
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. SATURATION CHARACTERISTICS FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs DRAIN