RFM10N45 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 10A, 450V and 500V
  • r DS(ON) = 0.600Ω

Description

These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated cir- cuits. Formerly developmental type TA17435. Symbol Packaging JEDEC TO-204AA

Ordering Information

RFM10N45 TO-204AA RFM10N45 RFM10N50 TO-204AA RFM10N50 NOTE: When ordering, include the entire part number. G D S DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) September 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 File Number 1788.1 RFM10N45, RFM10N50 10A, 450V and 500V, 0.600 Ohm, N-Channel Power MOSFETs [ /Title (RFM10 N45, RFM10 N50) /Subject (10A, 450V and 500V , 0.600 Ohm, N- Channel Power MOS- FETs) /Author /Key- words (Harris Semi- conduc- tor, N- Channel Power MOS- FETs, TO- 204AA) /Creator /DOCIN FO pdf- mark [ /Page- Mode

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFM10N45 RFM10N50 UNITS Maximum Temperature for Soldering CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS VGS = 0V, ID = 250µA RFM10N45 450 - - V RFM10M50 500 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 8) 2.0 - 4.0 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS , VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 10A, (Figures 6, 7) - - 0.600 Ω Drain to Source On Voltage (Note 2) VDS(ON) VGS = 10V, ID = 10A 6.0 V Turn-On Delay Time t d(ON) VDS = 250, ID ≈ 5A, VGS = 10V, RG = 50Ω, R L = 50Ω, (Figures 10, 11, 12) -2 6 6 0n s Rise Time t r - 50 100 ns Turn-Off Delay Time t d(OFF) - 525 900 ns Fall Time t f - 105 180 ns Input Capacitance C ISS VGS = 0V, VDS = 25V, f = 1.0MHz, (Figure 9) - - 3000 pF Output Capacitance C OSS - - 600 pF Reverse Transfer Capacitance C RSS - - 200 pF Thermal Impedance Junction to Case R θJC - - 0.83 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) VSD ISD = 5A - - 1.4 V Reverse Recovery Time t rr ISD = 4A, dISD /dt = 100A/µs - 950 - ns NOTE: 2. Pulse test: pulse width≤ 300µs, duty cycle≤ 2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. RFM10N45, RFM10N50

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Harris Application Notes AN7254 and AN7260. FIGURE 10. NORMALIZED SWITCHING WAVEFORMS FOR

0.5 ON RESISTANCE

FIGURE 11. SWITCHING TIME TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS