RFL4N12 INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 4

Technical content

Features

  • 4A, 120V and 150V
  • r DS(ON) = 0.400Ω
  • SOA is Power Dissipation Limited
  • Nanosecond Switching Speeds
  • Linear Transfer Characteristics
  • High Input Impedance
  • Majority Carrier Device

Description

These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA9192. Symbol Packaging JEDEC TO-205AF

Ordering Information

NOTE: When ordering, use the entire part number. G D S DRAIN (CASE) SOURCE GATE CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 File Number 1462.2 RFL4N12, RFL4N15 4A, 120V and 150V, 0.400 Ohm, N-Channel Power MOSFETs [ /Title (RFL4N 12, RFL4N1 /Subject (4A, 120V and 150V , 0.400 Ohm, N- Channel Power MOS- FETs) /Author /Key- words (Harris Semi- conduc- tor, N- Channel Power MOS- FETs, TO- 205AF) /Creator /DOCIN FO pdf- mark

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFL4N12 RFL4N15 UNITS Maximum Temperature for Soldering CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V RFL4N12 120 - - V RFL4N15 150 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA (Figure 8) 2-4V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS --1 µA VDS = 0.8 x Rated BVDSS , TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On-Voltage (Note 2) V DS(ON) ID = 4A, VGS = 10V - - 1.6 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 4A, VGS = 10V (Figures 6, 7) - - 0.400 Ω Turn-On Delay Time t d(ON) VDD = 75V, ID ≈ 2A, RG = 50Ω , VGS = 10V (Figures 10, 11, 12) -4 0 6 0 n s Rise Time t r - 165 250 ns Turn-Off Delay Time t d(OFF) - 90 135 ns Fall Time t f - 90 135 ns Input Capacitance C ISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 9) - - 850 pF Output Capacitance C OSS - - 230 pF Reverse-Transfer Capacitance C RSS - - 100 pF Thermal Resistance Junction to Case R θJC -- 1 5 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) VSD ISD = 2A 1.4 V Reverse Recovery Time t rr ISD = 2A, dISD /dt = 100A/µs 200 - ns NOTE: 2. Pulse Test: pulse duration≤ 300µs max, duty cycle≤ 2%. RFL4N12, RFL4N15