RFL1N18 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 1A, 180V and 200V
  • r DS(ON) = 3.65Ω
  • SOA is Power Dissipation Limited
  • Nanosecond Switching Speeds
  • Linear Transfer Characteristics
  • High Input Impedance
  • Majority Carrier Device
  • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Description

These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA09289. Symbol Packaging JEDEC TO-205AF

Ordering Information

NOTE: When ordering, use the entire part number. G D S DRAIN (CASE) SOURCE GATE January 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1997 File Number 1442.2 RFL1N18, RFL1N20 1A, 180V and 200V, 3.65 Ohm, N-Channel Power MOSFETs

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFL1N18 RFL1N20 UNITS Maximum Temperature for Soldering 300 260 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0V RFL1N18 180 - - V RFL1N20 200 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 8) 2 - 4 V Zero Gate Voltage Drain Current I DSS VDS = 0.8 x Rated BV DSS TC = 25oC- - 1 µA TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On-Voltage (Note 2) V DS(ON) ID = 1A, VGS = 10V - - 3.65 V ID = 2A, VGS = 10V - - 8.3 V Drain to Source On Resistance (Note 2) rDS(ON) ID = 1A, VGS = 10V, (Figures 6, 7) - - 3.65 Ω Forward Transconductance (Note 2) g fs ID = 1A, VDS = 10V, (Figure 10) 400 - - S Turn-On Delay Time t d(ON) ID ≈ 1A, VDD = 100V RGS = 50Ω , VGS = 10V, (Figures 11, 12, 13) -1 52 5 n s Rise Time t r -2 03 0 n s Turn-Off Delay Time t d(OFF) -2 54 0 n s Fall Time t f -3 05 0 n s Input Capacitance C ISS VGS = 0V, VDS = 25V, f = 1MHz, (Figure 9) - - 200 pF Output Capacitance C OSS - - 60 pF Reverse Transfer Capacitance C RSS - - 25 pF Thermal Resistance Junction to Case R θJC --1 5 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) VSD ISD = 1A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 2A, dISD /dt = 50A/µs - 200 - ns NOTE: 2. Pulse test: pulse width≤ 300µs maximum, duty cycle≤ 2%. RFL1N18, RFL1N20

FIGURE 12. SWITCHING TIME TEST CIRCUIT FIGURE 13. RESISTIVE SWITCHING WAVEFORMS