RFL1N12L INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 1A, 120V and 150V
  • r DS(ON) = 1.900Ω

Description

These are N-Channel enhancement mode silicon gate power field effect transistors specifically designed for use with logic level (5V) driving sources in applications such as programmable controllers, automotive switching, and sole- noid drivers. This performance is accomplished through a special gate oxide design which provides full rated conduc- tion at gate biases in the 3V to 5V range, thereby facilitating true on-off power control directly from logic circuit supply voltages. Formerly developmental type TA09528. Symbol Packaging JEDEC TO-205AF

Ordering Information

RFL1N12L TO-205AF RFL1N12L RFL1N15L TO-205AF RFL1N15L NOTE: When ordering, use the entire part number. G D S DRAIN (CASE) SOURCE GATE September 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1998 RFL1N12L, RFL1N15L 1A, 120V and 150V, 1.900 Ohm, Logic Level, N-Channel Power MOSFETs File Number 1513.2 [ /Title (RFL1N 12L, RFL1N1 5L) /Subject (1A, 120V and 150V , 1.900 Ohm, Logic Level, N-Chan- nel Power MOS- FETs) /Author /Key- words (Harris Semi- conduc- tor, Logic Level, N-Chan- nel Power MOS- FETs, TO- 205AF)

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFL1N12L RFL1N15L UNITS Maximum Temperature for Soldering CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0 RFL1N12L 120 - - V RFL1N15L 150 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA, (Figure 8) 1 - 2 V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS --1 µA VDS = 0.8 x Rated BVDSS , TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±10V, VDS = 0 - - ±100 µA Drain to Source On Resistance (Note 2) rDS(ON) ID = 1A, VGS = 5V, (Figures 6, 7) - - 1.900 Ω Drain to Source On Voltage (Note 2) V DS(ON) ID = 1A, VGS = 5V - - 1.9 V Turn-On Delay Time t d(ON) ID ≈ 1A, VDD = 75V, RG = 6.25Ω , R L = 75Ω , VGS = 5V, (Figures 10, 11, 12) -1 0 2 5 n s Rise Time t r -1 0 4 5 n s Turn-Off Delay Time t d(OFF) -2 4 4 5 n s Fall Time t f -3 0 5 0 n s Input Capacitance C ISS VGS = 0V, VDS = 25V, f = 1MHz,(Figure 9) - - 200 pF Output Capacitance C OSS - - 80 pF Reverse Transfer Capacitance C RSS - - 35 pF Thermal Resistance Junction to Case R θJC -- 1 5 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = 1A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 1A, dISD/dt = 50A/µs - 150 - ns NOTES: 2. Pulse test: width ≤300µs duty cycle≤ 2%. 3. Repetitive rating: pulse witdh limited by maximum junction temperature. RFL1N12L, RFL1N15L