RFK25N18 INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • 25A, 180V and 200V
  • r DS(ON) = 0.150Ω Symbol Packaging JEDEC TO-204AE

Ordering Information

RFK25N18 TO-204AE RFK25N18 RFK25N20 TO-204AE RFK25N20 NOTE: When ordering, use the entire part number. G D S DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) October 1998 File Number 1500.3Data Sheet

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFK25N18 RFK25N20 UNITS Maximum Temperature for Soldering CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical SpecificationsTC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS ID = 250µA, VGS = 0 RFK25N18 180 - - V RFK25N20 200 - - V Gate Threshold Voltage V GS(TH) VGS = VDS , ID = 250µA 2-4V Zero Gate Voltage Drain Current I DSS VDS = Rated BVDSS , VGS = 0V - - 1 µA VDS = 0.8 x Rated BVDSS ,VGS = 0V, TC = 125oC- - 2 5 µA Gate to Source Leakage Current I GSS VGS =±20V, VDS = 0V - - ±100 nA Drain to Source On Resistance (Note 2) rDS(ON) ID = 25A, VGS = 10V (Figures 6, 7) - - 0.150 Ω Drain to Source On Voltage (Note 2) V DS(ON) ID = 25A, VGS = 10V - - 3.75 V Turn On Delay Time t d(ON) ID ≈ 12.5A, VDD = 100V, RG = 50 , VGS = 10V R L = 8 , (Figures 10, 11, 12) -4 0 8 0 n s Rise Time t r - 150 225 ns Turn-Off Delay Time t d(OFF) - 300 400 ns Fall Time t f - 120 200 ns Input Capacitance C ISS VGS = 0V, VDS = 25V f = 1MHz (Figure 9) - - 3500 pF Output Capacitance C OSS - - 900 pF Reverse Transfer Capacitance C RSS - - 400 pF Thermal Resistance Junction to Case R θJC - - 0.83 oC/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage (Note 2) V SD ISD = 12.5A - - 1.4 V Diode Reverse Recovery Time t rr ISD = 4A, dISD /dt = 100A/µs - 300 - ns NOTES: 2. Pulse test: pulse width ≤300µs Duty Cycle ≤2%. 3. Repetitive rating: pulse width is limited by maximum junction temperature. RFK25N18, RFK25N20

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS FIGURE 13. GATE CHARGE TEST CIRCUIT FIGURE 14. GATE CHARGE WAVEFORMS