RFG60P06E FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

  • 60A, 60V DS(ON) = 0.030 Ω
  • Temperature Compensating PSPICE Model
  • 2kV ESD Rated
  • Peak Current vs Pulse Width Curve
  • UIS Rating Curve
  • 175 o C Operating Temperature
  • Related Literature Symbol Packaging JEDEC STYLE TO-247

Ordering Information

RFG60P06E TO-247 RFG60P06E NOTE: When ordering use the entire part numberr RFG60P06E. D G S DRAIN (BOTTOM SIDE METAL) SOURCE DRAIN GATE Data Sheet January 2002

©2002 Fairchild Semiconductor Corporation RFG60P06E Rev. B Absolute Maximum Ratings T C = 25 o C RFG60P06E UNITS DSS -60 V DGR -60 V GS 20 V D DM Refer to Peak Current Curve A AS Refer to UIS Curve SD MIL-STD-883, Category B(2) 2K V D Derate Above 25 o 215 1.43 W o C J , T STG -55 to 175 o C Maximum Temperature for Soldering L pkg 300 260 o C o C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. T J = 25 o C to 150 o Electrical Specifications T C = 25 o C, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BV DSS I D = 250 µ A, V GS = 0V -60 - - V Gate To Threshold Voltage V GS(TH) V GS = V DS , I D = 250 µ A - 2-- 4 V Zero Gate Voltage Drain Current I DSS V DS = -60V, V GS = 0V T C = 25 o C- - - 1 µ A T C = 150 o C - - -50 µ A Gate to Source Leakage Current I GSS V GS 20V - - 100 nA Drain to Source On Resistance r DS(ON) I D = 60A, V GS = -10V - - 0.030 Ω Turn-On Time t ON V DD = -30V, I D = 30A, R L = 1.0 Ω , V GS = -10V, R GS = 2.5 Ω - - 125 ns Turn-On Delay Time t d(ON) -2 0- n s Rise Time t r -6 0- n s Turn-Off Delay Time t d(OFF) -6 5- n s Fall Time t f -2 0- n s Turn-Off Time t OFF - - 125 ns Total Gate Charge Q g(TOT) V GS = 0 to -20V V DD = -48V, I D = 60A, R L = 0.8 Ω - - 450 nC Gate Charge at -10V Q g(-10) V GS = 0 to -10V - - 225 nC Threshold Gate Charge Q g(TH) V GS = 0 to -2V - - 15 nC Input Capacitance C ISS V DS = -25V, V GS = 0V, f = 1MHz - 7200 - pF Output Capacitance C OSS - 1700 - pF Reverse Transfer Capacitance C RSS - 325 - pF Thermal Resistance Junction to Case R θ JC - - 0.70 o C/W Thermal Resistance Junction to Ambient R θ JA -- 8 0 o C/W Source to Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source to Drain Diode Voltage V SD I SD = 45A - - 1.5 V Diode Reverse Recovery Time t rr I SD = 45A, dI SD /dt = 100A/ µ s - - 125 ns NOTES: 2. Pulse test: pulse width 300 µ s maximum, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). RFG60P06E

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

175 T C–

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

0.75 BVDSS

0.50 BVDSS

0.25 BVDSS

FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation RFG60P06E Rev. B .SUBCKT RFG60P06E 2 1 3; REV 9/20/94 CA 12 8 1.01e-8 CB 15 14 1.05e-8 CIN 6 8 6.9e-9 DBODY 5 7 DBDMOD DBREAK 7 11 DBKMOD DPLCAP 10 6 DPLCAPMOD EBREAK 5 11 17 18 -76.35 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTO 20 6 8 18 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 7.9e-9 LSOURCE 3 7 4.18e-9 MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 5 16 RDSMOD 12.83e-3 RGATE 9 20 1.5 RIN 6 8 1e9 RSOURCE 8 7 RDSMOD 3.25e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 -0.83 .MODEL DBKMOD D (RS=1.11e-1 TRS1=1.34e-3 TRS2=4.46e-12) .MODEL DPLCAPMOD D (CJO=15e-10 IS=1e-30 N=10) .MODEL MOSMOD PMOS (VTO=-3.71 KP=31.5 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=9.42e-4 TC2=0) .MODEL RDSMOD RES (TC1=5.85e-3 TC2=7.69e-6) .MODEL RVTOMOD RES (TC1=-3.39e-3 TC2=1.07e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.6 VOFF=2.6) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.6 VOFF=4.6) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.16 VOFF=-3.84) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.84 VOFF=1.16) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley. MOS1 DPLCAP RDRAIN DBREAK LDRAIN DRAIN SOURCE LSOURCE DBODY RBREAK RVTO VBAT 19IT RSOURCE EBREAK MOS2 EDSEGS RIN CIN VTO ESG S1A S2A S2BS1B CBCA EVTORGATEGATE LGATE 1817 2091 12 15 136 + - RFG60P06E

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Formative or In Design First Production Full Production Not In Production OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ Rev. H4 ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET STAR*POWER is used under license VCX™