REF102 TI | Alldatasheet
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Technical content
SBVS022B – SEPTEMBER 2000 – REVISED JUNE 2009
FEATURES
G +10V ±0.0025V OUTPUT G VERY LOW DRIFT: 2.5ppm/ °C max G EXCELLENT STABILITY: 5ppm/1000hr typ G EXCELLENT LINE REGULATION: 1ppm/V max G EXCELLENT LOAD REGULATION: 10ppm/mA max G LOW NOISE: 5 µVPP typ, 0.1Hz to 10Hz G WIDE SUPPLY RANGE: 11.4VDC to 36VDC G LOW QUIESCENT CURRENT: 1.4mA max G PACKAGE OPTIONS: PLASTIC DIP, SO-8 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000-2009, Texas Instruments Incorporated 10V Precision Voltage Reference Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
APPLICATIONS
G PRECISION-CALIBRATED VOLTAGE STANDARD G D/A AND A/D CONVERTER REFERENCE G PRECISION CURRENT REFERENCE G ACCURATE COMPARATOR THRESHOLD REFERENCE G DIGITAL VOLTMETER G TEST EQUIPMENT G PC-BASED INSTRUMENTATION
DESCRIPTION
The REF102 is a precision 10V voltage reference. The drift is laser-trimmed to 2.5ppm/°C max C-grade over the indus- trial temperature range. The REF102 achieves its precision without a heater. This results in low power, fast warm-up, excellent stability, and low noise. The output voltage is extremely insensitive to both line and load variations and can be externally adjusted with minimal effect on drift and stability. Single-supply operation from 11.4V to 36V and excellent overall specifications make the REF102 an ideal choice for demanding instrumentation and system reference applications. A R 2 R 3 R 4 R 6 R 1 R 5 50kΩ 22kΩ 7kΩ 4kΩ 8kΩ DZ 1 Noise Reduction Common VOUT V+Trim 14kΩ REF102 REF102 www.ti.com
SBVS022Bwww.ti.com MAX INITIAL MAX DRIFT PACKAGE PACKAGE PRODUCT ERROR (mV) (PPM/ °C) PACKAGE-LEAD DESIGNATOR MARKING REF102AU ±10 ±10 SO-8 D REF102AU REF102AP ±10 ±10 DIP-8 P REF102AP REF102BU ±5 ±5 SO-8 D REF102BU REF102BP ±5 ±5 DIP-8 P REF102BP REF102CU ±2.5 ±2.5 SO-8 D REF102CU REF102CP ±2.5 ±2.5 DIP-8 P REF102CP PIN CONFIGURATIONS Top View DIP, SO Operating Temperature Storage Temperature Range NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ABSOLUTE MAXIMUM RATINGS (1) ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI website at www.ti.com. NC = Not Connected Noise Reduction NC V OUT Trim NC Com NC
SBVS022B www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C and VS = +15V power supply, unless otherwise noted. REF102A REF102B REF102C PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS OUTPUT VOLTAGE vs Temperature(1) 10 5 2.5 ppm/ °C vs Supply (Line Regulation) V S = 11.4V to 36V 2 1 1 ppm/V vs Output Current (Load Regulation) I L = 0mA to +10mA 20 10 10 ppm/mA IL = 0mA to –5mA 40 20 20 ppm/mA vs Time T A = +25°C M Package 5 ✻✻ ppm/1000hr P, U Packages(2) 20 ✻ ppm/1000hr Trim Range(3) ±3 ✻✻ % Capacitive Load, max 1000 ✻✻ pF NOISE 0.1Hz to 10Hz 5 ✻✻ µVPP OUTPUT CURRENT +10, –5 ✻✻ mA INPUT VOLTAGE RANGE +11.4 +36 ✻✻ ✻ ✻ V QUIESCENT CURRENT IOUT = 0 +1.4 ✻✻ mA WARM-UP TIME (4) To 0.1% 15 ✻✻ µs TEMPERATURE RANGE Specification ✻ Specifications same as REF102A. NOTES: (1) The box method is used to specify output voltage drift vs temperature; see the Discussion of Performance section. (2) Typically 5ppm/1000hrs after 168hr powered stabilization. (3) Trimming the offset voltage affects drift slightly. See Installation and Operating Instructions for details. (4) With noise reduction pin floating. See Typical Characteristics for details.
SBVS022Bwww.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VS = +15V, unless otherwise noted. POWER TURN-ON RESPONSE VOUT VIN Time (5µs/div) Power Turn-On POWER TURN-ON RESPONSE with 1 µF CN VOUT VIN Time (10ms/div) Power Turn-On POWER SUPPLY REJECTION vs FREQUENCY 130 120 110 100 1 100 1k 10k Frequency (Hz) Power Supply Rejection (dB) LOAD REGULATION +1.5 +1.0 +0.5 −0.5 −1.0 −1.5 –5 0 +5 +10 Output Current (mA) Output Voltage Change (mV) RESPONSE TO THERMAL SHOCK 30 45 60150 +600 +300 –300 –600 TA = +25°C REF102C Immersed in +85°C Fluorinert Bath Output Voltage Change (µV) Time (s) TA = +85°C QUIESCENT CURRENT vs TEMPERATURE 1.6 1.4 1.2 1.0 0.8 −50 −25 0 +25 +50 +75 +100 +125 Temperature (°C) Quiescent Current (mA) −75
FIGURE 7. +10V Reference With Output Current Boosted to: a) ±20mA, b) +100mA, and c) IL (TYP) +10mA, –5A.
350 Strain
See SBVA007 for more details. See SBVA001 for more details and ISINK Circuit. FIGURE 8. Strain Gauge Conditioner for 350Ω Bridge. FIGURE 9. ±10V Reference. FIGURE 10. Positive Precision Current Source.
SBVS022Bwww.ti.com
Revision History
DATE REVISION PAGE SECTION DESCRIPTION Absolute Maximum Ratings Deleted lead temperature rating. Package/Ordering Information Changed Package Ordering Information table. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 26/09 B
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) REF102AU Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR - REF 102U A REF102AU.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U A REF102AU/2K5 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR - REF 102U A REF102AU/2K5.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U A REF102BU Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U B REF102BU.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U B REF102CU Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U C REF102CU.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -25 to 85 REF 102U C REF102CU/2K5 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes Call TI Level-2-260C-1 YEAR -25 to 85 REF 102U C REF102CU/2K5.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes Call TI Level-2-260C-1 YEAR -25 to 85 REF 102U C (1) Status: For more details on status, see our product life cycle. Addendum-Page 1
www.ti.com 23-May-2025 (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REF102AU/2K5 SOIC D 8 2500 356.0 356.0 35.0 REF102CU/2K5 SOIC D 8 2500 356.0 356.0 35.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) REF102AU D SOIC 8 75 506.6 8 3940 4.32 REF102AU.A D SOIC 8 75 506.6 8 3940 4.32 REF102BU D SOIC 8 75 506.6 8 3940 4.32 REF102BU.A D SOIC 8 75 506.6 8 3940 4.32 REF102CU D SOIC 8 75 506.6 8 3940 4.32 REF102CU.A D SOIC 8 75 506.6 8 3940 4.32 Pack Materials-Page 3
www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800
www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM
www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5
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