REF02BU.A

REF02 TI | Alldatasheet

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Technical content

+5V Precision VOLTAGE REFERENCE

FEATURES

G OUTPUT VOLTAGE: +5V ±0.2% max G EXCELLENT TEMPERATURE STABILITY: 10ppm/ °C max (–40°C to +85°C) G LOW NOISE: 10 µVPP max (0.1Hz to 10Hz) G EXCELLENT LINE REGULATION: 0.01%/V max G EXCELLENT LOAD REGULATION: 0.008%/mA max G LOW SUPPLY CURRENT: 1.4mA max G SHORT-CIRCUIT PROTECTED G WIDE SUPPLY RANGE: 8V to 40V G INDUSTRIAL TEMPERATURE RANGE: –40°C to +85°C G PACKAGE OPTIONS: DIP-8, SO-8

APPLICATIONS

G CONSTANT CURRENT SOURCE/SINK G DIGITAL VOLTMETERS G V/F CONVERTERS G A/D AND D/A CONVERTERS G PRECISION CALIBRATION STANDARD G TEST EQUIPMENT

DESCRIPTION

The REF02 is a precision 5V voltage reference. The drift is laser trimmed to 10ppm/°C max over the extended industrial and military temperature range. The REF02 provides a stable 5V output that can be externally adjusted over a ±6% range with minimal effect on temperature stability. The REF02 operates from a single supply with an input range of 8V to 40V with a very low current drain of 1mA, and excellent temperature stability due to an improved design. Excellent line and load regulation, low noise, low power, and low cost make the REF02 the best choice whenever a 5V voltage reference is required. Available package options are DIP-8 and SO-8. The REF02 is an ideal choice for portable instrumentation, temperature transducers, Analog-to-Digital (A/D) and Digital- to-Analog (D/A) converters, and digital voltmeters. VOUT REF02 VIN Trim GND +5V Reference with Trimmed Output R POT 10kΩ (Optional) Output

3 Temp

SBVS003B – JANUARY 1993 – REVISED JANUARY 2005 www.ti.com PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1993-2005, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

SBVS003Bwww.ti.com SPECIFICATIONS ELECTRICAL At TA = +25°C and VIN = +15V power supply, unless otherwise noted. REF02A REF02B PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Change with Temperature(1, 2) (∆VOT ) –40°C to +85°C 0.05 0.19 0.05 0.13 % OUTPUT VOLTAGE DRIFT (3) –40°C to +85°C (TCVO )4 1 5 4 1 0 ±ppm/°C LONG-TERM STABILITY 2000h Test First 1000h 100 100 ±ppm Second 1000h 50 50 ±ppm OUTPUT ADJUSTMENT RANGE R POT = 10kΩ (6) ±3 ±6 ✻✻ % CHANGE IN V O TEMP COEFFICIENT WITH OUTPUT ADJUSTMENT (–55°C to +125°C) R POT = 10kΩ 0.7 ✻ ppm/% OUTPUT VOLTAGE NOISE 0.1Hz to 10Hz(5) 41 0 ✻✻ µVPP LINE REGULATION (4) VIN = 8V to 33V 0.006 0.010 ✻✻ %/V –40°C to +85°CV IN = 8.5V to 33V 0.008 0.012 ✻✻ LOAD REGULATION (4) IL = 0mA to +10mA 0.005 0.010 ✻ 0.008 %/mA –40°C to +85°CI L = 0mA to +10mA 0.007 0.012 ✻ 0.010 TURN-ON SETTLING TIME To ±0.1% 5 ✻ µs of Final Value QUIESCENT CURRENT No Load 1.0 1.4 ✻✻ mA LOAD CURRENT (SOURCE) 10 21 ✻✻ mA LOAD CURRENT (SINK) –0.3 –0.5 ✻✻ mA SHORT-CIRCUIT CURRENT VOUT = 0 30 ✻ mA POWER DISSIPATION No Load 15 21 ✻✻ mW TEMPERATURE VOLTAGE OUTPUT (7) 630 ✻ mV TEMPERATURE COEFFICIENT of Temperature Pin Voltage –55°C to +125°C 2.1 mV/ °C TEMPERATURE RANGE Specification REF02A, B, C –40 +85 ✻✻ °C NOTES: (1) ∆VOT is defined as the absolute difference between the maximum output and the minimum output voltage over the specified temperature range expressed as a percentage of 5V: ∆V VV VO MAX MIN= − ×5 100 (2) ∆VOT specification applies trimmed to +5.000V or untrimmed. (3) TCVO is defined as ∆VOT divided by the temperature range. (4) Line and load regulation specifications include the effect of self heating. (5) Sample tested. (6) 10kΩ potentiometer connected between VOUT and ground with wiper connected to Trim pin. See figure on page 1. (7) Pin 3 is insensitive to capacitive loading. The temperature voltage will be modified by 7mV for each µA of loading.

SBVS003B www.ti.com Operating Temperature Storage Temperature Range ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS Top View DIP/SO NC VIN Temp GND NC NC V OUT Trim ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instru- ments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) PACKAGE SPECIFICATION MAX DRIFT DRAWING TEMPERATURE PRODUCT V OUT at 25°C (ppm/ °C) PACKAGE DESIGNATOR RANGE REF02AU 5V ±15mV ±15 SO-8 D –40°C to +85°C REF02BU 5V ±10mV ±10 SO-8 D –40°C to +85°C REF02AP 5V ±15mV ±15 DIP-8 P –40°C to +85°C REF02BP 5V ±10mV ±10 DIP-8 P –40°C to +85°C NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or see the TI website at www.ti.com.

SBVS003Bwww.ti.com TYPICAL PERFORMANCE CURVES AT TA = +25°C, unless otherwise noted. OUTPUT WIDEBAND NOISE vs BANDWIDTH (0.1Hz to frequency indicated) Frequency (Hz) Output Noise (µVPP ) 10 100 1k 10k 100k 1M 100 OUTPUT CHANGE DUE TO THERMAL SHOCK Time (s) Percent Change in Output Voltage (%) 0.035 0.03 0.025 0.02 0.015 0.01 0.005 –1 0 0 1 02 03 04 05 0 6 0 Device immersed in 75°C oil bath TA = 25°C TA = 75°C VIN = 15V MAXIMUM LOAD CURRENT vs INPUT VOLTAGE Maximum Load Current (mA) Input Voltage (V) 5 1 0 1 52 02 5 500mW Maximum Dissipation Short Circuit Protection TA = +25°C LINE REGULATION vs SUPPLY VOLTAGE Input Voltage (V) Line Regulation (%/V) 6 6.5 7 7.5 8 8.5 9 9.5 10 85°C 25°C 125°C –55°C LINE REGULATION vs SUPPLY VOLTAGE Input Voltage (V) 0.03 0.025 0.02 0.015 0.01 0.005 Line Regulation (%/V) TA = 25°C 10 15 20 25 30 LINE REGULATION vs FREQUENCY Line Regulation (dB) Frequency (Hz) 10 100 1k 10k 100k 1M Line Regulation (%/V) 0.0003 0.001 0.003 0.01 0.031 0.1 0.31 1.0 3.1 10.0 VS = 15V TA = +25°C

SBVS003B www.ti.com TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, unless otherwise noted. NORMALIZED LOAD REGULATION ( ∆IL = 10mA) vs TEMPERATURE –60 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 Temperature (°C) –40 –20 0 20 40 60 80 100 120 140 Load Reg (T) / Load Reg (25°C) VIN = 15V NORMALIZED LINE REGULATION vs TEMPERATURE –60 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 Temperature (°C) –40 –20 0 20 40 60 80 100 120 140 Line Reg (T) / Line Reg (25°C) REF02 V OUT Temperature Volt 5.002 5.0015 5.001 5.0005 4.9995 4.999 4.9985 4.998 4.9975 –60 –40 –20 0 20 40 60 80 100 120 140 MAXIMUM LOAD CURRENT vs TEMPERATURE Temperature (°C) Maximum Load Current (mA) –60 –40 –20 0 20 40 60 80 100 120 140 VIN = 15V QUIESCENT CURRENT vs TEMPERATURE Temperature (°C) 1.1 1.08 1.06 1.04 1.02 1.0 0.98 Quiescent Current (mA) –60 –40 –20 0 20 40 60 80 100 120 140 VIN = 15V TYPICAL TEMPERATURE VOLTAGE OUTPUT vs TEMPERATURE Temperature Voltage Output (mV) Temperature (°C) –60 –40 –20 0 20 40 60 80 100 120 140 830 780 730 680 630 580 530 480 430 VIN = 15V

SBVS003Bwww.ti.com TYPICAL PERFORMANCE CURVES (Cont.) At TA = +25°C, unless otherwise noted. LONG-TERM STABILITY (1st 1000h) Hours 0 24 48 72 96 168 192 240 336 408 504 576 696 744 864 9121008 ppm 200 150 100 –50 –100 –150 –200 –250 LONG-TERM STABILITY (2nd 1000h) Hours 1008 1080 1176 1272 1344 1440 1536 1608 1680 1776 1848 1944 ppm 200 150 100 –50 –100 –150 –200 –250 0 1944 1008504 LONG TERM STABILITY (2000h) Hours ppm 300 200 100 –100 –200 –300

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) REF02AU Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02AU REF02AU.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02AU REF02AU/2K5 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02AU REF02AU/2K5.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02AU REF02BU Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02BU REF02BU.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02BU REF02BU/2K5 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02BU REF02BU/2K5.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 REF 02BU (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Addendum-Page 1

www.ti.com 23-May-2025 Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REF02AU/2K5 SOIC D 8 2500 356.0 356.0 35.0 REF02BU/2K5 SOIC D 8 2500 356.0 356.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) REF02AU D SOIC 8 75 506.6 8 3940 4.32 REF02AU.A D SOIC 8 75 506.6 8 3940 4.32 REF02BU D SOIC 8 75 506.6 8 3940 4.32 REF02BU.A D SOIC 8 75 506.6 8 3940 4.32 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

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