R5107G

R5107G RICOH | Alldatasheet

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Microprocessor Supervisory Circuit R5107G SERIES NO. EA-170-070908 OUTLINE The R5107G Series are CMOS-based µ con supervisory circuit, or high accuracy and ultra low supply current voltage detector with built-in delay and watchdog timer. When the VDD voltage is down across the threshold, or the watchdog timer does not detect the system clock from the µ con, the reset output is generated. The voltage detector circuit is used for the system reset, etc. The detector threshold is fixed internally, and the tolerance is ±1.0%. The released delay time (Power-on Reset Delay) circuit is built-in, and output delay time is adjustable with an external capacitor. When the VDD supply voltage becomes higher than the released voltage, the reset state will be maintained during the delay time. The time out period of the watchdog timer can be also set with an external capacitor. The output type of the reset is selectable, Nch open-drain, or CMOS. The function to stop supervising clock by the watchdog timer (INH function) and manual reset function are built in this IC. The package is small SSOP-8G.

FEATURES

• Built-in a watchdog timer's time out period accuracy ±30%
• Timeout period for watchdog and generating a reset signal can be set by an external capacitor
• Power-on reset delay time of the voltage detector can be set with an external capacitor. APPLICATION
• Supervisory circuit for equipment with using microprocessors.

R5107G(Preliminary) BLOCK DIAGRAMS R5107Gxx1A R5107Gxx1C TW GND VDD SCK RESETB CLOCK DETECTOR WATCHDOG TIMER INH MR CD TW GND VDD SCK RESETB CLOCK DETECTOR WATCHDOG TIMER INH MR CD

R5107G(Preliminary) SELECTION GUIDE The selection can be made with designating the part number as shown below: R5107Gxx1x-TR ← part Number ↑↑ ↑ ↑ ab c d Code Descriptions a Designation of Package Type; G: SSOP8G (2.9mmx4.0mm) b Designation of Detector Threshold Voltage (-VDET) 0.1V stepwise setting is possible in the range from 1.5V to 5.5V c Designation of the output type of RESETB A: Nch Open-drain C: CMOS Output d Designation of Taping Type PIN CONFIGURATION SSOP8G (0.65mm pitch) PIN DESCRIPTION Pin No Symbol Pin Description

1 RESETB

Output Pin for Reset signal of Watchdog timer and Voltage Detector. (Output “L” at detecting Detector Threshold and Watchdog Timer Reset.)

2 MR Manual Reset Pin (Active at "L")

3 CD External Capacitor Pin for Setting Delay Time of Voltage Detector

4 GND Ground Pin

5 SCK Clock Input Pin from Microprocessor

6 INH Inhibit Pin ("L": Inhibit the watchdog timer)

7 TW External Capacitor Pin for Setting Reset and Watchdog Timeout

8 VDD Power supply Pin

R5107G(Preliminary) ABSOLUTE MAXIMUM RATINGS Topt=25°C, VSS=0V Symbol Item Rating Unit VIN Supply Voltage -0.3∼7.0 V VCD Voltage of C D Pin -0.3∼VIN+0.3 V VTW Voltage of TW Pin -0.3∼VIN+0.3 V VRESETB Output Voltage Voltage of RESETB Pin -0.3∼7.0 V VSCK Voltage of SCK Pin -0.3∼7.0 V VINH Voltage of INH Pin -0.3∼7.0 V VMR Input Voltage Voltage of MR Pin -0.3∼7.0 V IRESETB Output Current Current of RESETB Pin 20 mA PD Power Dissipation 300 mW Topt Operating Temperature Range -40∼+105 °C Tstg Storage Temperature Range -55∼+125 °C

ELECTRICAL CHARACTERISTICS

R5107GxxxA/C Unless otherwise specified, VIN=6.0V, CTW=0.1uF, CD=0.1uF, Rpull-up=100kΩ (R5107GxxxA) The number of Bold font applied to the temperature range from -40°C to 105°C ( T o p t = 2 5 °C) Symbol Item Conditions Min. Typ. Max. Unit VIN Operating Voltage 0.9 6.0 V Iss Supply Current VIN=(-VDET)+0.5V Clock Pulse Input 11 15 µA Voltage Detector -VDET Detector Threshold SENSE pin Threshold x0.990 x0.972 x1.010 x1.015 V ∆-VDET/ ∆Topt Detector Threshold Temperature Coefficient -40°C≤Topt≤105°C ±100 ppm/ VHYS Detector Threshold Hysteresis (-VDET) x0.03 (-VDET) x0.05 (-VDET)x 0.07 V tpLH Output Delay Time CD=0.1µF 340 370 467 ms IDOUTN Output Current (RESETB Output pin) Nch, VDD=1.2V, VDS=0.1V 0.38 0.80 mA IDOUTP Output Current (RESETB Output pin) Nch, VDD=6.0V, VDS=0.5V(R5108GxxxC) 0.65 0.90 mA VMRH MR Input "H" 1.0 6.0 V VMRL MR Input "L" 0.00 0.35 V MRW MR Input Pulse Width (*Note1) 2 us RMR MR Pull-up Resistance 60 110 164 kΩ Watchdog Timer TWD Watchdog Timeout period C TW=0.1uF 230 310 450 ms TWR Reset Hold Time of WDT C TW=0.1uF 29 34 48 ms

R5107G(Preliminary) Symbol Item Conditions Min. Typ. Max. Unit VSCKH SCK Input "H" VINx0.8 6.0 V VSCKL SCK Input "L" 0.0 VINx0.2 V VINHH INH Input "H" 1.0 6.0 V VINHL INH Input "L" 0.00 0.35 V RINH INH pull-up Resistance 60 110 164 kΩ TSCKW SCK Input Pulse Width VSCKL=VINx0.2, VSCKH=VINx0.8 500 ns *Bold Type value is guaranteed by design. *Note1: MR input pulse width specification guarantee the minimum input pulse width of MR pin for output "L" from RESETB pin. If the "L" pulse width of MR is short, tpLH may be short. Refer to the timing diagram for details. TYPICAL APPLICATIONS Power supply SW R C TWC CD SW R5107GxxxA Series GND V DD C D RESETB SCK TW MR INH µ P VDD I/O RESET Power supply SW C TWC CD SW R5107GxxxC Series GND V DD C D RESETB SCK TW MR INH µ P VDD I/O RESET

R5107G(Preliminary) TEST CIRCUIT Supply Current Test Circuit Clock Input R5107GxxxA/C Series GND V DD C D RESETB SCK TW MR INH C CD C TW R(R5107Gx xxA) A

R5107G(Preliminary) TIMING DIAGRAM (R5107GxxxA/R5107GxxxC) (Nch open-drain, RESETB pin is pulled up to V DD.) VDD TW SCK VrefH VrefL ＩNＨ RESETB tpLH +VDET TWR -VDET tpHL MR CD VTCD TWD tpLH TWD TWR TWDI TMR

R5107G(Preliminary) OPERATION /G4d When the VDD pin voltage becomes more than the released voltage (+V DET), after the released delay time (or the power on reset time tpLH), the output of RESETB becomes “H” level. /G4e When the SCK pulse is input, the watchdog timer is cleared, and TW pin mode changes from discharge mode to charge mode. When the TW pin voltage becomes higher than VREFH, the mode will change into discharge, and next watchdog time count starts. /G4f Unless the SCK pulse is input, WDT will not be cleared, and during the charging period of TW pin, RESETB="L". /G50 When the VDD pin becomes lower than the detector threshold voltage, RESETB outputs "L". /G51 If "L" signal is input to the MR pin, the RESETB outputs "L", regardless the SCK clock state and V IN voltage. /G52 When the signal to the MR pin is set from "L" to "H", the watchdog starts supervising the system clock. MR C D RESETB Complete Discharge Power on Reset operation with MR pin Input ( tpLH1 < tpLH ) +V TCD -V TCD tpLHtpLH1 Incomplete Discharge tpLH VDD C D RESETB Complete Discharge DET +V +V TCD TCD tpLH1 Power on Reset Operation against the input glitch (tpLH1 < tpLH ) Incomplete Discharge -V DET

R5107G(Preliminary) ∗ Watchdog Timeout period/Reset hold time The watchdog timeout period and reset hold time can be set with an external capacitor to TW pin. The next equations describe the relation between the watchdog timeout period and the external capacitor value, or the reset holding time and the external capacitor value. t tWR(s)=tWD/9 The watchdog timer (WDT) timeout period is determined with the discharge time of the external capacitor. During the watchdog timeout period, if the clock pulse from the system is detected, WDT is cleared and the capacitor is charged. When the charge of the capacitor completes, another watchdog timeout period starts again. During the watchdog timeout period, if the clock pulse from the system is not detected, during the next reset hold time RESETB pin outputs "L". After starting the watchdog timeout period, (just after from the discharge of the external capacitor) even if the clock pulse is input during the time period "TWDI", the clock pulse is ignored. TWDI[s]=TWD/10 Released Delay Time (Power-on Reset delay time) The released delay time can be set with an external capacitor connected to the CD pin. The next equation describes the relation between the capacitance value and the released delay time (tpLH). tpLH(s)=3.7×10 6× C(F) Note that the temperature dependence graph in the typical characteristics does not contain the temperature characteristics of the external capacitor. When the VDD voltage becomes equal or lower than -V DET, discharge of the capacitor connected to CD pin starts. In case that the discharge is not enough, if the V DD voltage returns equal or more than (+V DET), the delay time tpLH will be shorter than expected. Minimum Operating V oltage (VINL) We specified the minimum operating voltage as the minimum input voltage in which the condition of RESETB pin being 0.1V or lower than 0.1V . (Herein, pull-up resistance is set as 100kΩ in the case of the Nch open-drain output type. Inhibit (INH) Function If INH pin is set at "L", the watchdog timer stops monitoring the clock, and the RESETB output will be dominant by the voltage detector's operation. Therefore, if the equal or more than the detector threshold level is input, RESETB outputs "H" regardless the clock pulse. INH pin is pulled up with a resistor (TYP. 110kΩ ) internally. Manual Reset Function By setting MR pin as "L", the output of RESETB can be forced to set "L". After pull-down the MR pin to "L", the delay time (DMR) to the output "L" from RESETB is 1us as maximum. MR pin is pulled-up via the built-in resister. (Typ. 110kΩ ). If MR pin voltage> VIN voltage, a current flows into MR pin. However, the current value is limit by the pull-up resister, therefore there is not bad impact on the operation. When the "L" signal is input to MR pin, the discharge of CD pin capacitor (CCD) starts. If the term of "L" for MR pin is short, C CD will not be discharged enough. As a result, the delay time after setting "H" for MR pin will be shorter than expected. Because of this, confirm the operation under the same conditions as users' applications. For example, in case of C CD is set at 0.1uF, and the condition to maintain the delay time value after MR pin's returning to "H", is described as the minimum "L" term of MR pin, or 150us. RESETB Output RESETB pin's output type is selectable either the Nch open-drain output or CMOS output. If the Nch open-drain type output is selected, the RESETB pin is pulled up with an external resistor to an appropriate voltage source.

R5107G(Preliminary) Clock Pulse Input Built-in watchdog timer is cleared with the SCK clock pulse within the watchdog timeout period. APPLICATION NOTES If a resistor is connected to the VDD pin, the operation might be unstable with the supply current of IC itself. TYPICAL CHARACTERISTICS 1) Supply Current vs. Input Voltage 2) Detector Threshold vs. Temperature Connection examples affected by the conduction current R5108 VDD VIN RESETB R5108 VDD VIN RESETB VIN R5108 CMOS Output VDD RESETB R510xN151A/C, R510xG151A/C 0 1 23456 SUPPLY VOLTAGE [V] CURRENT Iss [uA] 25℃ 105℃ -50℃ R510xN301A/C, R510xG301A/A 0 1 23456 SUPPLY VOLTAGE [V] CURRENT Iss [uA] 25℃ -50℃ 105℃

R5107G(Preliminary) 3) Detector Threshold Hysteresis vs. Temperature R510xN151A/C, R510xG151A/C 1.470 1.480 1.490 1.500 1.510 1.520 1.530 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] DETECT VOLTAGE [V] R510xN271A/C, R510xG271A/C 2.660 2.670 2.680 2.690 2.700 2.710 2.720 2.730 2.740 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] DETECT VOLTAGE [V] R510xN421A/C R510xG421A/C 4.120 4.140 4.160 4.180 4.200 4.220 4.240 4.260 4.280 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] DETECT VOLTAGE [V] R510xN151A/C R510xG151A/C 3.0 4.0 5.0 6.0 7.0 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] HYSTERESIS [%] R510xN271A/C R510xG271A/C 3.0 4.0 5.0 6.0 7.0 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] HYSTERESIS [%]

R5107G(Preliminary) R510xN421A/C R510xG421A/C 3.000 4.000 5.000 6.000 7.000 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] HYSTERESIS [%]

R5107G(Preliminary) 4) Nch Driver Output Current vs. V DS Topt=25°C 5) Nch Driver Output Current vs. V DD 6) Pch Driver Output Current vs. VDD R510xN, R510xG VDS [V] OUTPUT CURRENT [mA] VDD=1.0V VDD=6.0V VDD=5.0V VDD=4.0V VDD=3.0V VDD=2.0V VDD=1.5V R510xN, R510xG 0 1 23456 SUPPLY VOLTAGE VDD [V] OUTPUT CURRENT [mA] Vds=0.3V 105℃ 25℃ Topt=-40℃ R510xN, R510xG 0 1 23456 SUPPLY VOLTAGE VDD [V] OUTPUT CURRENT [mA] Vds=0.5V 105℃ 25℃Topt=-40℃ R510xN, R510xG 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 23456 SUPPLY VOLTAGE [V] OUTPUT CURRENT [mA] VDS=0.3V 105℃ 25℃ -40℃ R510xN, R510xG 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 23456 SUPPLY VOLTAGE [V] OUTPUT CURRENT [mA] VDS=0.5V 105℃ 25℃ -40℃

R5107G(Preliminary) 7) Released Delay Time vs. Input Voltage 8) Released Delay Time vs. Temperature 9) Detector Output Delay Time vs. Temperature 10) WDT Reset Timer vs. Temperature R510xN, R510xG 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 1 23456 SUPPLY VOLTAGE [V] OUTPUT CURRENT [mA] VDS=1.0V 105℃ 25℃ -40℃ R510xN, R510xG 300 320 340 360 380 400 420 440 460 480 500 -50 -25 0 25 50 75 100 125 150 TEMPERATURE [℃] POWER ON RESET DELAY tpLH[ms] VDD=6V R510xN, R510xG 300 320 340 360 380 400 420 440 460 480 500 -50 -25 0 25 50 75 100 125 150 TEMPERATURE [℃] POWER ON RESET DELAY tpLH[ms] VDD=6V R510xN, R510xG 100 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] TIME [usec] (-VDET)+1 (-VDET)-1 1us INPUT R510xN, R510xG -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] RESET TIME [msec]

R5107G(Preliminary) 11) WDT Timeout Period vs. Temperature 12) WDT Reset Timer vs. Input V oltage 13) WDT Timeout Period vs. Input V oltage R510xN, R510xG 280 300 320 340 360 380 400 420 440 460 480 -50 -25 0 25 50 75 100 125 TEMPERATURE [℃] Timeout Period [msec] R510xN, R510xG 1 23456 SUPPLY VOLTAGE [V] RESET TIME [msec] R510xN, R510xG 280 300 320 340 360 380 400 420 440 460 480 1 23456 SUPPLY VOLTAGE [V] Timeout Period [msec]