R2A20132SP

R2A20132SP RENESAS | Alldatasheet

Document overview

• Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 9

Technical content

Features

• Maximum ratings ⎯ Supply voltage Vcc: 24 V ⎯ Operating junction temperature Tj-opr: –40 to +150°C
• Electrical characteristics ⎯ VREF output voltage VREF: 5.0 V ± 1.5% ⎯ UVLO operation start voltage Vuvlh: 10.5 V ± 0.7 V ⎯ UVLO operation shutdown voltage Vuvll: 9.3 V ± 0.5 V ⎯ UVLO hysteresis voltage Hysuvl: 1.2 V ± 0.5 V
• Functions ⎯ Boost converter control with critical conduction mode ⎯ Interleaving control with slave drop (SD) function at light load ⎯ Off time control (OTC) function: Switching loss is decreased at light load. ⎯ Brownout function ⎯ Double OVP: Two line sense for over voltage protection ⎯ Dynamic under voltage protection (DUVP): Sense for under voltage protection ⎯ AC Hi voltage detection (ACDET) ⎯ Feedback loop open detection ⎯ ZCD signal open detection ⎯ Master and Slave independenced over current protection ⎯ 140 μs restart timer ⎯ Package lineup: Pb-free SOP-20

Ordering Information

Part No. Package Name Package Code Taping Spec. R2A20132SPW0 FP-20DAV PRSP0020DD-B 2000 pcs./one taping product

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 2 of 8 Pin Arrangement ZCD-M ZCD-S BO VREF SD1 ACDET RT RAMP SD2 COMP VCC GD-M GND GD-S OCP-M OCP-S OCT FB(+) OVP2 FB(–) (Top view) Pin Functions Pin No. Pin Name Input/Output Function

1 ZCD-M Input Master converter zero current detection input terminal

2 ZCD-S Input Slave converter zero current detection input terminal

3 BO Input Brownout input terminal

4 VREF Output Reference voltage output terminal

5 SD1 Input Slave drop threshold voltag e input terminal (for Lo line: 100 V)

6 ACDET Output AC hi voltage detection output terminal

7 RT Input/Output Oscillator frequency setting terminal

8 RAMP Input/Output Ramp waveform setting terminal

9 SD2 Input Slave drop threshold voltag e change terminal (for Hi line: 200 V)

10 COMP Output Error amplifier output terminal

11 FB(–) Input Error amplifier input (–) terminal

12 OVP2 Input Over voltage detection terminal

13 FB(+) Input Error amplifier input (+) terminal

14 OTC Input Off time control input terminal

15 OCP-S Input Slave converter over current detection terminal

16 OCP-M Input Master converter over current detection terminal

17 GD-S Output Slave converter Power MOSFET drive terminal

18 GND — Ground

19 GD-M Output Master converter Power MOSFET drive terminal

20 VCC Input Supply voltage terminal

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 3 of 8 Block Diagram Clamp 0 V to 6.4 V ON: 10.5 V OFF: 9.3 V 0.31 V Vzcd_lo = 1.4 V 300 mVhys 0 V to 6.4 V Hi: ON 7.7 μA 7.7 μA 3.6 V/3.0 V 1.3 V 1.4 V VCC VCC Clamp LOGIC VREF: 5 V UVLO OCP COMP1 OCP COMP2 VCC GD-M ZCD-M ZCD-S RT VREF BO ACDET SD2 SD1 RAMP COMP OCP-M OCP-M GD-S GND OCP-S Stop GD Hi: OFF Hi: ON Hi: SD1 Slave off ZCD open detector Slave Control OVP2 FB(–) FB(–) COMP Discharge Error Amp OCP-S COMP Iramp FB(+) OTC OVP BLOCK 1.3 V 9.1 V VCC GD Disable OVP2

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 4 of 8 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Note Supply voltage VCC –0.3 to 24 V GD peak current Ipk-gd –300 +1200 mA 3 GD DC current Idc-gd –15 +60 mA ZCD terminal current Izcd +10 –10 mA BO terminal current Ibom 300 μA RT terminal current Irt –200 μA Vref terminal current Iref –5 mA COMP terminal current Icomp ±1 mA ACDET terminal current Iacdetm 500 μA Vt-group1 –0.3 to Vcc V 4 Terminal voltage Vt-group2 –0.3 to Vref V 5 Vref terminal voltage Vt-ref –0.3 to Vref + 0.3 V Power dissipation Pt 1 W 6 Operating junction temperature Tj-opr –40 to +150 °C Storage temperature Tstg –55 to +150 °C Notes: 1. Rated voltages are with reference to the GND terminal. 2. For rated currents, inflow to the IC is indicated by (+), and outflow by (–). 3. Shows the transient current when driving a capacitive load. 4. This is the rated voltage for the following pins: RAMP, ACDET 5. This is the rated voltage for the following pins: FB(+), FB(–), OCP-M, OCP-S, OVP2, SD1, SD2, OTC 6. In case of R2A20132SP (SOP): θja = 120°C/W This value is a thing mounting on 40 × 40 × 1.6 [mm], a glass epoxy board of wiring density 10%.

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 5 of 8

Electrical Characteristics

(Ta = 25C, VCC = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, FB(+) = 2.5 V, FB(–) = COMP, BO = 5 V, OVP2 = GND, SD1 = SD2 = GND) Item Symbol Min Typ Max Unit Test Conditions UVLO turn-on threshold Vuvlh 9.8 10.5 11.2 V UVLO turn-off threshold Vuvll 8.8 9.3 9.8 V UVLO hysteresis Hysuvl 0.7 1.2 1.7 V Standby current Istby — 150 230 μA VCC = 8.9 V, ZCD = OPEN Supply Operating current Icc — 5.2 7.5 mA FB(–) = open BO threshold voltage Vbo 1.33 1.40 1.47 V Brownout BO pin hysteresis current Ibo 6.9 7.7 8.5 μA BO = 1 V Output voltage Vref 4.925 5.000 5.075 V Isource = –1 mA Line regulation Vref-line — 5 20 mV Isource = –1 mA, Vcc = 10 V to 24 V Load regulation Vref-load — 5 20 mV Isource = –1 mA to –5 mA VREF Temperature stability dVref — ±80 — ppm/°C Ta = –40 to +125°C * Feedback voltage Vfb(–) 2.462 2.500 2.538 V FB(–)-COMP Short, RAMP = 0 V Input bias current1 Ifb(–) –0.5 –0.3 –0.1 μA Measured pin: FB(–), FB(–) = 3 V Input bias current2 Ifb(+) 0.1 0.3 0.5 μA Measured pin: FB(+), FB(+) = 3 V Open loop gain Av — 50 — dB *1 Upper clamp voltage Vclamp-comp 8.0 9.1 10.6 V FB(–) = 2.0 V, COMP: Open Low voltage Vl-comp — 0.1 0.3 V FB(–) = 3.0 V, COMP: Open Source current1 Isrc-comp1 — –120 — μA FB(–) = 0 V to 1.5 V, COMP = 2.5 V Source current2 Isrc-comp2 — –1 — mA FB(–) = 3 V to 1.5 V, COMP = 2.5 V Sink current Isnk-comp — 300 — μA FB(–) = 3.5 V, COMP = 2.5 V * Error amplifier Transconductance gm 100 180 270 μs FB(–) = 2.45 V ↔ 2.55 V, COMP = 2.5 V RAMP charge current1 Ic-ramp1 72 82 92 μA RAMP = 0 V to 7 V, FB(–) = 2 V, COMP = 2 V, SD2 = 2.5 V RAMP charge current2 Ic-ramp2 150 165 180 μA RAMP = 0 V to 7 V, FB(–) = 2 V, COMP = 5 V, SD2 = 2.5 V RAMP discharge current Id-ramp 7 15 29 mA FB(–) = 3 V, COMP = 2 V, RAMP = 1 V RAMP Low voltage Vl-ramp — 17 200 mV FB(–) = 3 V, COMP = 3 V, Isink = 100 μA Upper clamp voltage Vzcdh 5.8 6.4 7.0 V Isource = –3 mA Lower clamp voltage Vzcdl –0.5 0 0.5 V Isink = 3 mA ZCD low threshold voltage Vzcd-lo 0.95 1.40 1.65 V *1 ZCD hysteresis Hyszcd 180 300 390 mV *1 Zero current detector Input bias current Izcd –14 –10 –6 μA 1.2 V < Vzcd <5 V Note: 1. Design spec.

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 6 of 8 Electrical Characteristics (cont.) (Ta = 25C, VCC = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, FB(+) = 2.5 V, FB(–) = COMP, BO = 5 V, OVP2 = GND, SD1 = SD2 = GND) Item Symbol Min Typ Max Unit Test Conditions Restart Restart time delay Tstart 105 140 175 μs FB(–) = 2.0 V, COMP = 5 V * ACDET current Iacdet 0 1 2 μA Vacdet = 12 V, Vbo = 3.3 V ACDET voltage Vacdet 0.2 0.4 0.6 V Iacdet = 500 μA, Vbo = 3.7 V High threshold voltage Vacdet-hi 3.2 3.6 4.0 V Measured Pin: BO ACDET Low threshold voltage Vacdet-lo 2.6 3.0 3.4 V Measured Pin: BO Phase delay Phase 160 180 200 deg *1, *3 Slave control On time ratio Ton-ratio –5 — 5 % *1, *3 Isd1 –1.0 –0.5 1.0 μA SD1 = 1 V, COMP = 4 V, FB(–) = 0 V Input bias current Isd2 –1.0 –0.5 1.0 μA SD2 = 1 V, COMP = 4 V, FB(–) = 0 V Slave drop SD pin hysteresis current Isd-hys –8.5 –7.7 –6.9 μA SD1 = 2 V, BO = 2 V, COMP = 2 V, FB(–) = 0 V Off time control Input bias current Iotc –1.0 0 1.0 μA OTC = 3 V Note: 1. Design spec. Tstart (140 μs) [A period without ZCD-M trigger] Restart pulse Vzcd-lo (1.4 V: provide 300 mV hysteresis) GD-M ZCD-M Ton-ratio = Ton-s Ton-m × 100 [%]1 – Tperiod (25 μs) Tdelay Ton-m (17 μs) Ton-s Phase = Tdelay Tperiod × 360 [deg] GD-M GD-S

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 7 of 8 Electrical Characteristics (cont.) (Ta = 25C, VCC = 12 V, RT = 22 kΩ, OCP = GND, CRAMP = 680 pF, FB(+) = 2.5 V, FB(–) = COMP, BO = 5 V, OVP2 = GND, SD1 = SD2 = GND) Item Symbol Min Typ Max Unit Test Conditions Master gate drive rise time tr-gdm — 30 100 ns GD-M: 1.2 V to 10.8 V, CL = 100 pF Slave gate drive rise time tr-gds — 30 100 ns GD-S: 1.2 V to 10.8 V, CL = 100 pF Master gate drive fall time tf-gdm — 5 30 ns GD-M: 10.8 V to 1.2 V, CL = 100 pF Slave gate drive fall time tf-gds — 5 30 ns GD-S: 10.8 V to 1.2 V, CL = 100 pF Vol1-gdm — 0.02 0.1 V Isink = 2 mA Master gate drive low voltage Vol2-gdm — 0.01 0.2 V Isink = 1 mA, VCC = 5 V Master gate drive high voltage Voh-gdm 11.5 11.9 — V Isource = –2 mA Vol1-gds — 0.02 0.1 V Isink = 2 mA Slave gate drive low voltage Vol2-gds — 0.01 0.2 V Isink = 1 mA, VCC = 5 V Gate drive Slave gate drive high voltage Voh-gds 11.5 11.9 — V Isource = –2 mA * Over current protection OCP threshold voltage Vocp 0.28 0.31 0.34 V Dynamic OVP threshold voltage Vdovp VFB(+) ×1.035 VFB(+) ×1.050 VFB(+) ×1.065 V COMP = OPEN OVP1 threshold voltage Vovp1 VFB(+) ×1.075 VFB(+) ×1.090 VFB(+) ×1.105 V COMP = OPEN OVP1 hysteresis Hys-ovp1 50 100 150 mV COMP = OPEN FB(–) open detect threshold voltage Vfbopen 0.45 0.50 0.55 V COMP = OPEN FB(–) open detect hysteresis Hysfbopen 0.16 0.20 0.24 V COMP = OPEN OVP2 threshold voltage Vovp2 2.635 2.685 2.735 V COMP = OPEN, VFB(–) = 2.5 V OVP2 hysteresis Hys-ovp2 50 100 150 mV COMP = OPEN, VFB(–) = 2.5 V OVP2 pin input bias current Iovp2 –0.5 0 0.5 μA Measured pin: OVP2 Over voltage protection Dynamic UVP threshold voltage Vduvp VFB(+) ×0.89 VFB(+) ×0.92 VFB(+) ×0.95 V COMP = OPEN ZCD open detector Slave ZCD open minimum detect delay time tzcds — 100 — ms COMP = 5 V, Gate drive 10 kHz * Note: 1. Design spec.

REJ03D0921-0100 Rev.1.00 Oct 02, 2009 Page 8 of 8 Package Dimensions 0.80 0.15 1.27 7.50 8.00 0.400.34 13.0 MaxNomMin Dimension in Millimeters Symbol Reference 2.20 0.900.700.50 5.50 0.200.100.00 0.46 0.250.200.15 7.80 8°0° 0.12 1.15 12.60 Z HE y x θ c bp E D e e L A 20 11 F p Mx y E Index mark D E H b Z A Terminal cross section ( Ni/Pd/Au plating ) p c b Detail F L L A θ NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. MASS[Typ.] FP-20DAVPRSP0020DD-B RENESAS CodeJEITA Package Code Previous Code

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