TDA4940 ETC | Alldatasheet
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© Good limiting characteristics @ PLL circuit, eliminates alignment of pilot tone decoder @ Few external components Maximum ratings Supply voltage Vs 165 v Input voltage line flyback Vis | Vs v Input voltage mono compulsory Vy Vs v Junction temperature T | 150 °C Storage temperature range Tete | ~40t0 125 °C Thermal resistance (system-air) Rinsa 70 Kw Operating range Supply voltage Vs 10 to 15.8 Vv Ambient temperature Ty 0 to 70 °c 545 ea a
Vs =12 V; Ty = 25°C min typ max | total current consumption Ise 16 26 34 mA Reference voltage Vace 5 5.2 6 68 lv FM section f= 5.74 MHz; Qs ~ 25; Vie =1 mV; Af = +30 KHZ; fog =1 KHZ Limiter threshold Vie rons 20 40 uv Input resistance Rios 600 800 1000 |Q AM suppression (m = 30%) aa 42 ead Signal-to-noise ratio (Vjj¢=10 mV) asin 85 a8 Total harmonic distortion THD 1 3 | % Demodulator input resistance Rit9-20 4 54 7 kQ AF output voltage (Af=12.5 kHz) Vorarms | 200 | 300 400 | mv AF output resistance Rae 100 ;aQ Pilot carrier decoding Output voltage stereo Ve 10.5 Ys |v mono Ve 6 v dual audio Vg 0 15 \\v Input mono compulsory low Vy ) 07 Vv high v, 1.3 jy lv pulse width TH 500 jus Input voltage line flyback Vaspp 45 | | Vs v Input resistance Ris 133 | ka Circuit description FM section The TDA 4940 includes an 8-stage limiter amplifier, an FM coincidence demodulator as well as an AF output. Deemphasis is provided by an external RC circuit. Pilot carrier decoding A PLL synthesizer generates the pilot carrier frequency f, = 3.5 x fy. The line flyback pulse is used as reference frequency. Via a high-pass filter, the modulated pilot cartier is routed from the AF output to the synchronous demodulator. However, the internal pllot carrier is synchronized with a phase regulating circuit. Via the external band-pass filter, the synchro- nously demodulated identifying signals are forwarded to the decoding circuit. Decoding is performed with a frequency-selective, phase-resistant RMS rectifier of very narrow bandwidth as well as a comparator. The “stereo” status (fr = f,/133), as well as the “dual audio” (for = fy/87) and the “mono” status (fy = 0) are evaluated during multiplex operations. The current operating status is provided via a tristate output. It is possible to set “mono” with a positive pulse edge at input 7. for =fey = dual tone pilot carrier tsr = stereo tone pilot carrier fy = mono pilot carrier fy =horizontal deflection frequency 546 1° wterm ee eee
The TDA 4940 has been designed for demodulating the second sound carrier of a TV channel as well as for decoding the pilot signal of “stereo tone” and “dual audio” status. The component comprises 4 functional sections: — FM section (amplifier, demodulator) — Reference frequency generator (for decoding the pilot tone) — Pilot frequency demodulator — Signal decoder FM section The FM section corresponds to that of type TBA 120 T or TBA 120 U without VTR and volume functions. Demodulator The demodulator can be used with a ceramic phase shitter as well as circuit with an LC network in case of external coupling capacitors, Under extreme conditions, the LC network is advantageous with respect to the intercarrier signal-to-noise ratio, since it shows alignment capability Pin 18 The AF output is formed by an emitter follower with typically 2 mA quiescent AF output current. Due to the rectifying effect, high capacitive load may result in harmonic distortion, which, however, can be reduced to a minimum by increasing the quiescent current (resistance of pin 18 to ground). At the AF output the mean value of the DC voltage with THD, is approx. 6 V. Internal reference frequency generation Pin 13 For decoding the stereo and dual audio signai, the reference frequencies Horizontal 3.5x15.625 kHz, 15,625 kHz/133 and 15.625 kHz/57 are required. They pulse are derived from the horizontal frequency with the aid of a PLL. Pin 13 is the input for the horizontal pulse (“trequency standard” of the TDA 4940), which can be offered to the component in both polarities. The internal switching threshold is typically +2 V (0.7 Vain; +4.5 Vga,). The level of the applied signal must ensure that one switching threshold is definitely exceeded, but not both. Pin 12 The PLL filter is connected to pin 12. The voltage of this pin internally PUL controls the VCO of the PLL. The DC voltage value of the PLL ranges filter from 1.4 V to 5.5 V and amounts to typically 3.5 Vin locked current conditions. Pilot frequency demodulation Pin 17; Pin 17 is the demodulator input for the pilot frequency, pin 16 the ‘$4 kHz input Corresponding demodulator output. The peak-to-peak voltage at pin 17 pin 16; is to amount to 150 mV, the rms output voltage of the identification Outbut OF signal is then typically 120 mv. internally, the demodulator is controlled identification signal; by the 54.68 kHz rectangular signal, which is derived from the line signal. phase control circuit 547 ron a ee
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