STD2NC45-1 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

N-CHANNEL 450V - 4.1Ω - 1.5 A IPAK / TO-92 SuperMESH™Power MOSFET ■ TYPICAL R DS (on) = 4.1Ω ■ EXTREMELY HIGH dv/dt CAPABILITY ■ 100% AVALANCHE TESTED ■ GATE CHARGE MINIMIZED ■ NEW HIGH VOLTAGE BENCHMARK

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip- based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. Such series comple- ments ST full range of high voltage MOSFETs in- cluding revolutionary MDmesh™ products.

APPLICATIONS

■ SWITCH MODE LOW POWER SUPPLIES (SMPS) ■ LOW POWER, LOW COST CFL (COMPACT FLUORESCENT LAMPS) ■ LOW POWER BATTERY CHARGERS

ORDERING INFORMATION

TYPE V DSS R DS(on) ID Pw STD2NC45-1 STQ1NC45 450 V 450 V < 4.5Ω < 4.5Ω 1.5 A 0.5 A 30 W 3.1 W SALES TYPE MARKING PACKAGE PACKAGING STD2NC45-1 D2NC45 IPAK TUBE STQ1NC45 Q1NC45 TO-92 BULK STQ1NC45-AP Q1NC45 TO-92 AMMOPAK IPAK TO-92 TO-92 (Ammopack) INTERNAL SCHEMATIC DIAGRAM

STD2NC45-1, STQ1NC45 ABSOLUTE MAXIMUM RATINGS (/circle6 ) Pulse width limited by safe operating area (1) ISD ≤0.5A, di/dt≤100A/µs, VDD ≤ V(BR)DSS ,Tj≤ TJMAX. THERMAL DATA AVALANCHE CHARACTERISTICS Symbol Parameter Value Unit STD2NC45-1 STQ1NC45 VDS Drain-source Voltage (VGS =0 ) 450 V VDGR Drain-gate Voltage (RGS =2 0kΩ ) 450 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 1.5 0.5 A ID Drain Current (continuos) at TC = 100°C 0.95 0.315 A IDM (/circle6 ) Drain Current (pulsed) 6 2 A PTOT Total Dissipation at TC = 25°C 30 3.1 W Derating Factor 0.24 0.025 W/°C dv/dt (1) Peak Diode Recovery voltage slope 3 V/ns Tj Tstg Operating Junction Temperature Storage Temperature -65 to 150 -65 to 150 IPAK TO-92 Rthj-case Thermal Resistance Junction-case Max 4.1 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 120 °C/W Rthj-lead Thermal Resistance Junction-lead Max 40 °C/W Tl Maximum Lead Temperature For Soldering Purpose 275 260 °C Symbol Parameter Max Value Unit IPAK TO-92 IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tjmax) 1.5 A EAS Single Pulse Avalanche Energy (starting Tj= 25 °C, ID =IAR ,VDD =5 0V ) 25 mJ

STD2NC45-1, STQ1NC45 ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF DYNAMIC SWITCHING ON SWITCHING OFF SOURCE DRAIN DIODE Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 450 V IDSS Zero Gate Voltage Drain Current (VGS =0 ) VDS = Max Rating VDS = Max Rating, TC = 125 °C µA µA IGSS Gate-body Leakage Current (VDS =0 ) VGS = ± 30V ±100 nA VGS(th) Gate Threshold Voltage VDS =V GS ,ID = 250µA 2.3 3 3.7 V R DS(on) Static Drain-source On Resistance VGS =1 0 V ,ID = 0.5 A 4.1 4.5 Ω Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs(1) Forward Transconductance V DS >ID(on)xR DS(on)max, ID = 0.5 A 1.1 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS =2 5 V ,f=1M H z ,VGS =0 160 27.5 4.7 pF pF pF Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay Time Rise Time VDD =2 2 5V ,ID = 0.5 A R G = 4.7Ω VGS =1 0V (Resistive Load see, Figure 3) 6.7 ns ns Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD =3 6 0 V ,ID = 1.5 A, VGS =1 0 V ,RG = 4.7Ω 1.3 3.2 10 nC nC nC Symbol Parameter Test Conditions Min. Typ. Max. Unit t r(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time V DD = 360V, ID = 1.5 A, R G =4 . 7Ω, VGS = 10V (Inductive Load see, Figure 5) 8.5 ns ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit I SD ISDM (2) Source-drain Current Source-drain Current (pulsed) 1.5 6.0 A A VSD (1) Forward On Voltage ISD = 1.5 A, VGS =0 1.6 V trr Q rr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 1.5 A, di/dt = 100A/µs VDD =1 0 0 V ,Tj=1 5 0 ° C (see test circuit, Figure 5) 225 530 4.7 ns µC A

STD2NC45-1, STQ1NC45 Safe Operating Area For IPAK Thermal Impedance For TO-92Safe Operating Area For TO-92 Thermal Impedance For IPAK Output Characteristics Transfer Characteristics

STD2NC45-1, STQ1NC45 Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Gate Charge vs Gate-source Voltage Transconductance Static Drain-source On Resistance Capacitance Variations

STD2NC45-1, STQ1NC45 Maximum Avalanche Energy vs TemperatureMax Id Current vs Tc Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature

STD2NC45-1, STQ1NC45 Fig. 5:Test Circuit For Inductive Load Switching And Diode Recovery Times Fig. 4:Gate Charge test Circuit Fig. 2:Unclamped Inductive WaveformFig. 1:Unclamped Inductive Load Test Circuit Fig. 3:Switching Times Test Circuit For Resistive Load

STD2NC45-1, STQ1NC45 DIM. mm inch A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 0.033 B5 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A C H D LL2 1 3 = = B E G = = = = TO-251 (IPAK) MECHANICAL DATA 0068771-E

STD2NC45-1, STQ1NC45 DIM. mm. inch A 4.32 4.95 0.170 0.194 b 0.36 0.51 0.014 0.020 D 4.45 4.95 0.175 0.194 E 3.30 3.94 0.130 0.155 e 2.41 2.67 0.094 0.105 e1 1.14 1.40 0.044 0.055 L 12.70 15.49 0.50 0.610 R 2.16 2.41 0.085 0.094 S1 0.92 1.52 0.036 0.060 W 0.41 0.56 0.016 0.022 V5 ° 5 ° TO-92 MECHANICAL DATA

STD2NC45-1, STQ1NC45

STD2NC45-1, STQ1NC45 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com