PXIE-SCP5104 NI | Alldatasheet

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Expandable PXI bundle based on PXIe-5172 Oscilloscope, 100 MHz, 14 bits, 8 Channels, 1.5 GB Specifications PXIe-1083 and PXIe-5172

Module cooling Forced air circulation (positive pressurization) through one 150 CFM fan Module slo t airflow direction Bottom of module to top of module Module intake Bottom of chassis Module exhaust Top, right side of chassis Slot cooling capacity 58 W; slot 6 supports 58 W cooling with high fan mode Power supply cooling Forced air circulation through integrated fans Power supply intake Front and left side chassis Power supply exhaust Rear of chassis Minimum chassis cooling clearances Above 44.45 mm (1.75 in.) Rear 44.45 mm (1.75 in.) Sides 44.45 mm (1.75 in.) Below Rack 44.45 mm (1.75 in.) Desktop 25.4 mm (1.00 in.) © National Instruments 5 PXIe-1083 Specifications

Maximum altitude 2,000 m (6,560 ft.), 800 mbar (at 25 °C ambient , high fan mode) Pollution Degree 2 Indoor use only. Operating Envir onment Ambient temperature range When all peripheral modules requir e ≤38 W cooling capacity per slot 0 °C to 50 °C (IEC 60068-2-1 and IEC 60068-2-2.)2 Meet s MIL-PRF-28800F Class 3 low temperature limit and high temperature limit. When any peripheral module requir es >38 W cooling capacity per slot 0 °C to 40 °C (IEC 60068-2-1 and IEC 60068-2-2.)2 Meet s MIL-PRF-28800F Class 3 low temperature limit and MIL- PRF-28800F Class 4 high temperature limit. Relative humidity range 20% to 80%, noncondensing Storage Environment Ambient temperature range –40 °C to 71 °C (IEC-60068-2-1 and IEC-60068-2-2.) [3] Meet s MIL- PRF-28800F Class 3 limits. Relative humidity range 10% to 95%, noncondensing ni.com6 PXIe-1083 Specifications

Operational shock 30 g peak, half-sine, 11 ms pulse (IEC-60068-2-27.)3 Meet s MIL- PRF-28800F Class 2 limits. Operational random vibration 5 t o 500 Hz, 0.3 grms Non-operating vibration 5 t o 500 Hz, 2.4 grms (IEC 60068-2-64.)3 Non-operating t est profile exceeds the requirements of MIL-PRF-28800F, Class 3. Acoustic Emissions Sound Pressur e Level (at Operator Position) (Tested in accordance with ISO 7779. Meets MIL-PRF-28800F requirements.)

38 W Profile

Auto fan (up to 30 °C ambient) 33.7 dBA High fan 50.8 dBA

58 W Profile

Auto fan (up to 30 °C ambient) 54.7 dBA High fan 55.3 dBA Sound Power Level © National Instruments 7 PXIe-1083 Specifications

Figure 2. PXIe-1083 Chassis Dimensions (Side) Figure 3. PXIe-1083 Chassis Dimensions (Bottom) 1 The operating r ange is guaranteed by design.

2 This product meets the requirements of the environmental standards for electrical

equipment for measurement, control, and laboratory use.

3 This produc t meets the requirements of the environmental standards for electrical

equipment for measurement, control, and laboratory use. © 2022 National Instruments Corporation.

These specifications apply t o the PXIe-5172 with 4 channels and the PXIe-5172 with 8 channels. Definitions Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty. Warranted specifications account for measurement uncertainties, temperature drift, and aging. Warranted specifications are ensured by design or verified during production and calibration. Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty. ■ Typical specifications describe the performance met by a majority of models. ■ Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing. ■ Measured specifications describe the measured performance of a representative model. Specifications are Nominal unless otherwise noted. Conditions Specifications are valid under the following conditions unless otherwise noted. ■ All vertical ranges ■ All bandwidths and bandwidth limiting filters ■ Sample rate set to 250 MS/s ■ Onboard sample clock locked to onboard reference clock © National Instruments 3 PXIe-5172 Specifications

■ PXIe -5172 module warmed up for 15 minutes at ambient temperature.[1] ■ Calibration IP used pr operly when using LabVIEW Instrument Design Libraries for Reconfigurable Oscilloscopes (instrument design libraries) to create FPGA bitfiles. Refer to the NI Reconfigurable Oscilloscopes Help for more information about the calibration API. Warranted specifications are valid under the following conditions unless otherwise noted. ■ Ambient temperature range of 0 °C to 45 °C ■ Chassis configured: [2] ■ PXI E xpress chassis fan speed set to HIGH ■ Foam fan filters removed if present ■ Empty slots contain PXI chassis slot blockers and filler panels ■ External calibration cycle maintained ■ External calibration performed at 23 °C±3 °C Typical specifications are valid under the following conditions unless otherwise noted. ■ Ambient temperature range of 0 °C to 45 °C Nominal and Measured specifications are valid under the following conditions unless otherwise noted. ■ Room temperature, approximately 23 °C Vertical Analog Input Number of channels PXIe-5172 (4 CH) Four (simultaneously sampled) ni.com4 PXIe-5172 Specifications

Figure 1. 50 Ω Volt

100 M1 M 25 M 50 M 75 M

Figure 2. 50 Ω Input Re turn Loss, Measured Table 1. 50 Ω FS Input R ange and Vertical Offset Range

10 V [3] 0

Table 2. 1 MΩ FS Input R ange and Vertical Offset Range

40 V ±20

80 V 0

40 MHz noise filter

80 MHz noise filter[11]

Figure 3. 50 Ω Full Bandwidth F requency Response, 1.4 Vpk-pk, Measured

25 M 50 M 75 M 100 M0

Table 5. Spurious-F ree Dynamic Range (SFDR), 50 Ω and 1 MΩ[15]

0.2 V -70 dBc

0.7 V -78 dBc

1.4 V -71 dBc

5 V -80 dBc

Table 6. Total Harmonic Distortion (THD), 50 Ω and 1 MΩ[16]

0.2 V -74 dBc

0.7 V -77 dBc

1.4 V -70 dBc

5 V -77 dBc

Table 7. Effectiv e Number of Bits (ENOB), 50 Ω and 1 MΩ[15] Figure 4. 50 Ω Single- Tone Spectrum, 1.4 Vpk-pkInput Range, Full Bandwidth,

9.9 MHz Input Tone at -1 dBFS, Measured

Table 8. RMS Noise, 50 Ω and 1 MΩ, Warr anted

Figure 5. 50 Ω Av erage Noise Density, 1.4 Vpk-pk Range, Measured

25 M 50 M 75 M0

Figure 6. 50 Ω Av erage Noise Density, 0.2 Vpk-pk Range, Measured

Internal Onboard clock (internal VCXO) External AUX 0 CLK IN (front panel MHDMR connector) PXIe_DS tarA (backplane connector) Sample rate range, real-time[19] 3.815 kS/s to 250 MS/s Sample clock jitter[20] 700 fs RMS Timebase frequency Internal (softwar e-selectable) 250 MHz

200 MHz

150 MHz

External 150 MHz to 250 MHz Timebase accuracy Phase-locked to onboard clock ±25 ppm, warranted Phase-locked to external clock Equal to the external clock accuracy DC accuracy sampling drift, ±(% of |Re ading|) per MHz from 250 MHz[21] ±0.0127 Duty cycle tolerance 45% to 55% Phase-Locked Loop (PLL) Reference Clock Sources ni.com12 PXIe-5172 Specifications

Internal None (internal VCXO) Onboar d clock (internal VCXO) PXI_Clk10 (backplane connector) External (10 MHz)[22] AUX 0 CLK IN (front panel MHDMR connector) Duty cycle tolerance 45% to 55% External Sample Clock Source AUX 0 CLK IN (front panel MHDMR connector) Impedance 50 Ω Coupling AC Input voltage range As a 250 MHz sine wave 1 dBm through 18 dBm As a fast slew rate input (square wave, Vpk-pk) 0.4 V t o 5 V Maximum input overload As a 250 MHz sine wave 20 dBm As a fast slew rate input (square wave, Vpk-pk) 6 V © National Instruments 13 PXIe-5172 Specifications

External Reference Clock In Source AUX 0 CLK IN (front panel MHDMR connector) Impedance 50 Ω Coupling AC Frequency[23] 10 MHz Input voltage range As a 250 MHz sine wave 1 dBm through 18 dBm As a fast slew rate input (square wave, Vpk-pk) 6 V Duty c ycle tolerance 45% to 55% Reference Clock Out Source PXI_Clk10 (backplane connector) Destination AUX 0 CLK OUT Output impedance 50 Ω Logic type 3.3 V LVCMOS Maximum current drive ±8 mA ni.com14 PXIe-5172 Specifications

PXIe_DStarA Source System timing slot Destinations Onboard clock (internal VCXO) FPGA P XI_Clk10 Source PXI backplane Destination Reference clock PXI_Clk100 Source PXI backplane Destination FPGA Trigger[24] Supported triggers Reference (stop) trigger Ref erence (arm) trigger Start trigger Advance trigger Trigger types Edge © National Instruments 15 PXIe-5172 Specifications

Table 9. Analog Trigg er Time Resolution and Rearm Time

Input range (Vpk-pk): 0.7 V, 1.4 V, 5 V 0.5% of F S Trigger jitter[25] 15 ps RMS Minimum threshold duration[26] Sample clock period Digital Trigger Sources AUX 0 PFI <0..7> PXI_T rig <0..6> Time resolution Sample clock period × 2 Rearm time Sample clock period × 84 Software Trigger Des tinations Reference (stop) trigger Ref erence (arm) trigger Start trigger Advance trigger Time resolution Sample clock period × 2 Rearm time Sample clock period × 84 © National Instruments 17 PXIe-5172 Specifications

Programmable Function Interface Connector AUX 0 PFI <0..7> (front panel MHDMR connector) Direction Bidirectional per channel Direction control latency 125 ns As an input (trigger) Destinations FPGA diagram St art trigger (acquisition arm) Reference (stop) trigger Arm Reference trigger Advance trigger Input impedance 49.9 kΩ VIH 2 V VIL 0.8 V Maximum input overload 0 V to 3.3 V (5 V tolerant) Minimum pulse width 10 ns As an output (event) Sources FPGA diagram Re ady for Start ni.com18 PXIe-5172 Specifications

Start trigger (acquisition arm) Re ady for Reference Reference (stop) trigger End of Record Ready for Advance Advance trigger Done (End of Acquisition) Output impedance 50 Ω Logic type 3.3 V CMOS Maximum current drive 12 mA Minimum pulse width 10 ns Power Output (+3.3 V) Connector AUX 0 +3.3 V (front panel MHDMR connector) Voltage output 3.3 V ±10% Maximum current drive 200 mA Output impedance <1 Ω © National Instruments 19 PXIe-5172 Specifications

Figure 7. Allocated Onbo ard Memory Per Record

■ Correc ts for gain and offset errors of the onboard references used in self- calibration. ■ Adjusts timebase accuracy. ■ Compensates the 1 MΩ ranges. All calibration constants are stored in nonvolatile memory. Self-Calibration Self-calibration is done on software command. The calibration corrects for the following aspects: ■ Gain ■ Offset ■ Intermodule synchronization errors Refer to the NI High-Speed Digitizers Help for information about when to self- calibrate the device. Calibration Specifications Interval for external calibration 2 years Warm-up time [28] 15 minutes Software Driver Software This device was first supported in NI-SCOPE17.1 and LabVIEW Instrument Design Libraries for Reconfigurable Oscilloscopes17.1. LabVIEW Instrument Design Libraries for Reconfigurable Oscilloscopes is an IVI-compliant driver that allows you to configure, control, and calibrate the device. NI-SCOPE provides application programming interfaces for many development environments. ni.com22 PXIe-5172 Specifications

+3.3 V DC 6.5 W, typical +12 V DC 13.75 W, typical Total power 20.25 W, typical PXIe-5172 (8 CH) power consumption +3.3 V DC 8.5 W, typical +12 V DC 18 W, typical Total power 26.5 W, typical Total maximum power allowed 38.25 W Physical Dimensions 3U, one-slot, PXI Express Gen 2 x8 Module 18.5 cm × 2.0 cm × 13.0 cm Weight PXIe-5172 (4 CH) 449 g (15.8 oz) PXIe-5172 (8 CH) 461 g (16.3 oz) © National Instruments 25 PXIe-5172 Specifications

Maximum altitude 2,000 m (800 mbar) (at 25 °C ambient temperature) Pollution Degree 2 Indoor use only. Operating Envir onment Ambient temperature range 0 °C to 45 °C Relative humidity range 10% to 90%, noncondensing Storage Environment Ambient temperature range -40 °C to 71 °C Relative humidity range 5% to 95%, noncondensing Shock and Vibration Operating shock 30 g peak, half-sine, 11 ms pulse Random vibration Operating 5 Hz to 500 Hz, 0.3 grms Nonoperating 5 Hz to 500 Hz, 2.4 grms ni.com26 PXIe-5172 Specifications

7 Measur ed on one channel with test signal applied to another channel, with the

same range setting on both channels. 8 Normalized t o 50 kHz. 9 Verified using a 50 Ω sour ce and 50 Ω feedthrough terminator. 10 Only available using NI- SCOPE. 11 Av ailable at sample rates ≥200 MS/s. 12 Verified using a 50 Ω sour ce. 13 50% FS input pulse. 14 For 1 MΩ, v erified using a 50 Ω source and 50 Ω feedthrough terminator. 15 -1 dBFS input signal c orrected to FS. 358 Hz resolution bandwidth. 16 -1 dBFS input signal c orrected to FS. Includes the 2nd through the 5th harmonics. 17 Verified using a 50 Ω t erminator connected to input. 18 For input fr equencies <90 MHz. 19 Divide by n decimation from 250 MS/s. For more information about the sample clock and decimation, refer to the NI Reconfigurable Oscilloscopes Help at ni.com/ manuals. 20 Inte grated from 100 Hz to 10 MHz. Includes the effects of the converter aperture uncertainty and the clock circuitry jitter.

21 Used t o calculate additional DC accuracy error when using a base sample clock

that is less than 250 MHz. To calculate the additional error, take the difference of the base sample clock rate from 250 MHz, divide by 1,000,000, and multiply by the DC accuracy sampling drift. 22 The PLL ref erence clock must be accurate to ±25 ppm. ni.com30 PXIe-5172 Specifications

23 The PLL ref erence clock must be accurate to ±25 ppm. 24 Trigg er specifications are always valid when programming with NI-SCOPE. When programming with the instrument design libraries, trigger specifications are valid only if the design of the custom triggers, as implemented in an FPGA bitfile, is sufficient to meet the specifications. 25 For input fr equencies <90 MHz.

26 Data mus t exceed each corresponding trigger threshold for at least the minimum

duration to ensure analog triggering. 27 Onboar d memory is shared among all enabled channels.

28 Warm-up be gins after the chassis and controller or PC is powered, the PXIe-5172

is recognized by the host, and the PXIe-5172 is configured using the instrument design libraries or NI-SCOPE. In some RIO applications, the power consumed by the PXIe-5172 can be significantly higher than the default image for the module. In these cases, you can improve performance by loading your image and configuring the device before warm-up time begins. Self-calibration is recommended following the specified warm-up time. 29 Caused by clock and analog p ath delay differences. No manual adjustment performed. Tested with a PXIe-1082 chassis with a maximum slot-to-slot skew of 100 ps. Valid within ±1 °C of self-calibration. © National Instruments 31 PXIe-5172 Specifications © 2022 National Instruments Corporation.