PX5524 ZARLINK | Alldatasheet
Document overview
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Technical content
Features
- 4-channel integrated transimpedance and liming amplifier operates up to 4.25 Gb/s
- 8 uAPP receiver sensitivity for 10-12 BER
- Single +3.3V supply dissipating 105 mW per channel
- Individual channel signal detect compares input signal strength (OMA) with adjustable threshold
- Global signal detect compares quiescent photocurrent with adjustable threshold
- Squelch automatically disables output when input signal strength falls below programmable threshold
- Serial digital interface for controlling channel enable and signal detect features
- Reconfigurable I/O provides access to serial digital interface and dedicated channel signal detect outputs
- 250-micron channel pitch matches optical ribbon fiber and photodiode arrays
Applications
- 10GbE LX-4 optical modules
- 4-lane 4GFC, OC-48 VSR, InfinibandTM parallel optical modules
- Proprietary parallel optical modules and CWDM
- Proprietary 4-lane intra-system parallel optics
Description
The g rowing u se of the Internet has created increasingly h igher de mand for multi-Gb/s I/O performance. The demand for 40+ Gb/s W AN bandwidth fu els the growth of short-reach 10 Gb/s infrastructures within h igh-end te lco an d datacom routers, s witches, se rvers and other proprietary chassis-to-chassis links. The Za rlink PX5524 4 Gb/s TIA/LA Receiver is a four-channel TIA/LA optical receiver designed for various 4x4 Gb/s pa rallel op tics and C WDM PMD applications. It consists of a D C-coupled transimpedance a mplifier and an AC-coupled differential limiting amplifier. The transimpedance amplifier achieves a nominal
3 GH z bandwidth over a w ide range of
photodiode input capacitance. Excellent channel- to-channel isolation ensures data integrity at the receiver sensitivity limits. A global signal detect circuit provides the ph otodiode reverse b ias voltage supply and senses a verage photocurrent supplied to the photodiode array. The transimpedance amplifier is AC -coupled internally to a h igh-gain, high-bandwidth differential limiting amplifier. T he limitin g amplifier pro vides a diff erential back-terminated CML output that can be u sed to drive 4 Gb/s per channel transceivers or other C ML co mpatible clock and data recovery c ircuits. The limit ing amplifier features an ad justable signal detect circuit that senses optica l modulation a mplitude (OMA) to provide a received signal indication for each channel. April 2006
Zarlink Semiconductor Inc. PX5524 Product Brief Figure 1: Representative electrical data pattern from the PX5524 IC output. Input OMA of –14.5 dBm received through a commercially-available photodiode at 3.0 Gb/s with a PRBS23 pattern. Figure 2: Application block diagram utilizing the PX5514 VCSEL driver and the PX5524 optical receiver Optical Fiber TX Data
50 Ohms
TX_OUT0 TX_OUT1 TX_OUT3TX_IN3_P TX_IN3_N TX_IN1_P TX_IN1_N TX_IN0_P TX_IN0_N RX_IN0 RX_IN1 RX_IN3 RX_OUT1_P RX_OUT0_P RX_OUT0_N RX_OUT1_N RX_OUT3_P RX_OUT3_N PX5514 PX5524 RX Data CLK D_OUT STB OPTIONAL MICRO CONTROLLER STB DATA CLKDATA CLK 2-Wire Interface 4-Wire Interface DATA D_IN D_OUT MICRO CONTROLLER DATA DATA CLK 2-Wire Interface 4-Wire Interface DATA D_IN CLK STBSTB CLK TX_IN1_P TX_IN1_N TX_OUT2 GND GND GND GND RX_OUT2_P RX_OUT2_N RX_IN2 DET_BIAS0 DET_BIAS1 DET_BIAS2 DET_BIAS3
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