TXV0106-Q1 TI | Alldatasheet

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Technical content

TXV0106-Q1 Automotive 6-Bit Fix Direction Low-Skew, Low-Jitter Voltage Translator or Buffer

1 Features

  • AEC-Q100 qualified for automotive applications
  • Integrated damping output resistor
  • Fixed direction voltage level shifter and buffer for general and skew sensitive applications
  • Meets RGMII 2.0 standard timing specifications: – < 750 ps rise and fall time – < 400 ps channel to channel skew – < ± 5% duty cycle distortion
  • Fully configurable symmetric dual-rail design allows each port to operate from 1.65 V to 3.6 V
  • Supports up to 320-Mbps for 1.65 V to 3.6 V – 250-Mbps maximum to meet RGMII timing specs
  • High drive strength (up to 12 mA at 3.6 V)
  • Low power consumption: – 10-µA maximum (25°C) – 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22: – 2000-V Human-Body Model – 1000-V Charged-Device Model

2 Applications

  • Medium or short range radar
  • ADAS domain controller
  • HVAC controller design
  • Machine vision camera
  • Rack sever motherboard
  • IP telephone

3 Description

The TXV0106-Q1 is a 6-bit, dual-supply fixed- direction low-skew, low jitter voltage translation device. This device can be used for buffering or redriving and voltage translation on transmitting skew sensitive interfaces, such as RGMII signals between MAC and PHY. Ax pins and enable pin ( OE) are referenced to V CCA logic levels, and Bx pins are referenced to V CCB logic levels. This device has an improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions. For the high-impedance state during power up or power down, tie OE to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. See Device Functional Modes for a summary of the operation of the control logic.

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) TXV0106-Q1 BQB (WQFN, 16) 3.5 mm × 2.5 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. (2) The package size (length × width) is a nominal value and includes pins, where applicable. TXV0106-Q1 TX_CLK TX_CTRL TX_DATA0 VCCA VCCB A2 B2 1.8V 3.3V TX_DATA1 TX_DATA2 TX_DATA3 SOC PHY MAC TXV010x-Q1 in RGMII Applications ADVANCE INFORMATION TXV0106-Q1 SCES956 – AUGUST 2023 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice.

10.2 Receiving Notification of Documentation Updates..17

11 Mechanical, Packaging, and Orderable

4 Revision History

August 2023 * Initial Release TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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5 Pin Configuration and Functions

Figure 5-1. BQB Package, 16-Pin WQFN (Top View) Table 5-1. Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. VCCA 1 — A-port supply voltage. 1.8 V ≤ VCCA ≤ 3.6 V. Make sure VCCA is powered up before VCCB A1 2 I/O Input/output A1. Referenced to VCCA. A2 3 I/O Input/output A2. Referenced to VCCA. A3 4 I/O Input/output A3. Referenced to VCCA. A4 5 I/O Input/output A4. Referenced to VCCA. A5 6 I/O Input/output A5. Referenced to VCCA. A6 7 I/O Input/output A6. Referenced to VCCA. GND 8 — Ground. OE 9 I Output Enable. Pull to GND to enable all outputs. Pull to VCCA to place all outputs in high-impedance mode. Referenced to VCCA. B6 10 I/O Input/output B6. Referenced to VCCB. B5 11 I/O Input/output B5. Referenced to VCCB. B4 12 I/O Input/output B4. Referenced to VCCB. B3 13 I/O Input/output B3. Referenced to VCCB. B2 14 I/O Input/output B2. Referenced to VCCB. B1 15 I/O Input/output B1. Referenced to VCCB. VCCB 16 — B-port supply voltage. 1.8 V ≤ VCCB ≤ 3.6 V. Make sure VCCA is powered up before VCCB Thermal pad — Thermal pad. Can be grounded (recommended) or left floating. (1) I = input, O = output www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TXV0106-Q1

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VCCA Supply voltage A –0.5 4.6 V VCCB Supply voltage B –0.5 4.6 V VI Input Voltage(2) I/O Ports (A Port) –0.5 4.6 VI/O Ports (B Port) –0.5 4.6 Control Inputs –0.5 4.6 VO Voltage applied to any output in the high-impedance or power-off state(2) A Port –0.5 4.6 V B Port –0.5 4.6 VO Voltage applied to any output in the high or low state(2) (3) A Port –0.5 VCCA + 0.5 V B Port –0.5 VCCB + 0.5 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current –50 50 mA Continuous current through VCC or GND –100 100 mA Tj Junction Temperature 150 °C Tstg Storage temperature –65 150 °C (1) Operation outside the Absolute Maximum Rating may cause permanent device damage. Absolute Maximum Rating do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Condition. If used outside the Recommended Operating Condition but within the Absolute Maximum Rating, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per AEC Q100-002(1) HBM ESD classification level 2 ±2000 V Charged device model (CDM), per AEC Q100-011 CDM ESD classification level C3 ±1000 V (1) AEC Q100-002 indicates that HBM stressing must be in accordance with the ANSI/ESDA/JEDEC JS-001 specification TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCCA Supply voltage A 1.65 3.6 V VCCB Supply voltage B 1.65 3.6 V VIH High-level input voltage Data Inputs (Ax, Bx), OE (Referenced to VCCI) VCCI = 1.65 V – 3.6 V VCCI x 0.7 V VIL Low-level input voltage Data Inputs (Ax, Bx), OE (Referenced to VCCI) VCCI = 1.65 V – 3.6 V VCCI x 0.3 V IOH High-level output current VCCO = 1.65 V – 1.95 V –8 mA High-level output current VCCO = 2.3 V – 2.7 V –9 mA High-level output current VCCO = 3 V – 3.6 V –12 mA IOL Low-level output current VCCO = 1.65 V – 1.95 V 8 mA Low-level output current VCCO = 2.3 V – 2.7 V 9 mA Low-level output current VCCO = 3 V – 3.6 V 12 mA VI Input voltage 0 3.6 V VO Output voltage Active State 0 VCCO V Tri-State 0 3.6 Δt/Δv Input transition rise and fall time 5 ns/V TA Operating free-air temperature –40 125 °C (1) VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port.

6.4 Thermal Information

THERMAL METRIC(1) TXV0106-Q1 UNITBQB (WQFN)

16 PINS

RθJA Junction-to-ambient thermal resistance TBD °C/W RθJC(top) Junction-to-case (top) thermal resistance TBD °C/W RθJB Junction-to-board thermal resistance TBD °C/W YJT Junction-to-top characterization parameter TBD °C/W YJB Junction-to-board characterization parameter TBD °C/W RθJC(bottom) Junction-to-case (bottom) thermal resistance TBD °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics app report. www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TXV0106-Q1

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1) (2) PARAMETER TEST CONDITIONS VCCA VCCB Operating free-air temperature (TA) UNIT–40°C to 125°C MIN TYP MAX VIL Data Input_Negative threshold VCCA V VIH Data Input_Positive VCCA V VOH High-level output voltage (3) IOH = –8 mA 1.65 V 1.65 V 1.2 V IOH = –9 mA 2.3 V 2.3 V 1.8 V IOH = –12 mA 3 V 3 V 2.4 V VOL Low-level output voltage (4) IOL = 8 mA 1.65 V 1.65 V 0.27 V IOL = 9 mA 2.3 V 2.3 V 0.23 V IOL = 12 mA 3 V 3 V 0.26 V II Input leakage current Data Inputs (Ax, Bx) VI = VCCI or GND IOZ Tri-state output current (5) A or B Port: VI = VCCI or GND VO = VCCO or GND OE = VIH 3.6 V 3.6 V –0.16 0.35 µA ICCA VCCA supply current VI = VCCI or GND IO = 0 1.65 V – 3.6 V 1.65 V – 3.6 V 14 µA

3.6 V 0 V 11

ICCB VCCB supply current VI = VCCI or GND IO = 0 1.65 V – 3.6 V 1.65 V – 3.6 V 12 µA 3.6 V 0 V –0.036 ICCA + ICCB Combined supply current VI = VCCI or GND IO = 0 1.65 V – 3.6 V 1.65 V – 3.6 V 22 µA Ci Control Input Capacitance VI = 3.3 V or GND 3.3 V 3.3 V 3.9 pF Cio Data I/O Capacitance OE = VCCA, VO = 1.65V DC +1 MHz -16 dBm sine wave 3.3 V 3.3 V 2.7 pF (1) VCCI is the VCC associated with the input port. (2) VCCO is the VCC associated with the output port. (3) Tested at VI = VIH. (4) Tested at VI = VIL. (5) For I/O ports, the parameter IOZ includes the input leakage current. TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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6.6 Switching Characteristics, VCCA = 1.8 ± 0.15 V Minimum and maximum limits apply over the recommended temperature range at CL =15 pF and 250Mbps, unless otherwise indicated. PARAMETER FROM TO B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B 5 3.7 3.1 ns tdis Disable time OE B 7.6 5.7 6.7 ns ten Enable time OE B 4.4 3.2 2.9 ns tSKO Output Channel-to- channel skew A B 490 320 360 ps TR Rise time (20% to 80%) A B 1.42 1 0.87 ns TF Fall time (20% to 80%) A B 1.42 1 0.9 ns Duty Cycle Duty cycle variation A B 45 50 55 45 50 55 45 50 55 % TR_5 pF Rise time (20% to 80%) (1) A B 0.83 0.59 0.47 ns TF_5 pF Fall time (20% to 80%) (1) A B 0.83 0.61 0.48 ns tSKO_5 pF Output Channel-to- channel skew (1) A B 320 290 335 ps Duty Cycle_5 pF Duty cycle variation (1) A B 45 50 55 45 50 55 45 50 55 % (1) Parameters tested under RGMII input transition rise and fall time. CLOAD = 5 pF www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TXV0106-Q1

6.7 Switching Characteristics, VCCA = 2.5 ± 0.2 V Minimum and maximum limits apply over the recommended temperature range at CL =15 pF and 250Mbps, unless otherwise indicated. PARAMETER FROM TO B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B 5 3.6 3 ns tdis Disable time OE B 6.8 5.2 6.3 ns ten Enable time OE B 3.8 2.6 2.2 ns tSKO Output Channel-to- channel skew A B 480 320 360 ps TR Rise time (20% to 80%) A B 1.4 1 0.85 ns TF Fall time (20% to 80%) A B 1.4 1 0.84 ns Duty Cycle Duty cycle variation A B 45 50 55 45 50 55 45 50 55 % TR_5 pF Rise time (20% to 80%) (1) A B 0.82 0.59 0.47 ns TF_5 pF Fall time (20% to 80%) (1) A B 0.83 0.61 0.48 ns tSKO_5 pF Output Channel-to- channel skew (1) A B 321 290 334 ps Duty Cycle_5 pF Duty cycle variation (1) A B 45 50 55 45 50 55 45 50 55 % (1) Parameters tested under RGMII input transition rise and fall time. CLOAD = 5 pF TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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6.8 Switching Characteristics, VCCA = 3.3 ± 0.3 V Minimum and maximum limits apply over the recommended temperature range at CL =15 pF and 250Mbps, unless otherwise indicated. PARAMETER FROM TO B-Port Supply Voltage (VCCB) MIN TYP MAX MIN TYP MAX MIN TYP MAX tpd Propagation delay A B 4.1 2.8 2.3 ns tdis Disable time OE A 7.6 7.6 7.6 ns ten Enable time OE A 4.4 4.4 4.4 ns tSKO Output Channel-to- channel skew A B 310 190 150 ps TR Rise time (20% to 80%) A B 1.4 1 0.84 ns TF Fall time (20% to 80%) A B 1.4 1 0.84 ns Duty Cycle Duty cycle variation A B 45 50 55 45 50 55 45 50 55 % TR_5 pF Rise time (20% to 80%) (1) A B 0.8 0.59 0.47 ns TF_5 pF Fall time (20% to 80%) (1) A B 0.8 0.61 0.48 ns tSKO_5 pF Output Channel-to- channel skew (1) A B 180 130 120 ps Duty Cycle_5 pF Duty cycle variation (1) A B 45 50 55 45 50 55 45 50 55 % (1) Parameters tested under RGMII input transition rise and fall time. CLOAD = 5 pF www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TXV0106-Q1

7 Parameter Measurement Information

7.1 Load Circuit and Voltage Waveforms

Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:

  • f = 1 MHz
  • ZO = 50 Ω
  • Δt/ΔV ≤ 1 ns/V Output Pin Under Test CL (1) RL RL GND Open 2 x VCCO Measurement Point A. CL includes probe and jig capacitance. Figure 7-1. Load Circuit Table 7-1. Load Circuit Conditions Parameter VCCO RL CL S1 VTP tpd Propagation (delay) time 1.65 V – 3.6 V 2 kΩ 15 pF Open N/A ten, tdis Enable time, disable time 1.65 V – 3.6 V 2 kΩ 15 pF 2 × VCCO 0.15 V ten, tdis Enable time, disable time 1.65 V – 3.6 V 2 kΩ 15 pF GND 0.15 V Input A, B VCCI (1) VCCI / 2 0 V Output B, A VOH (2) VOL (2) tpd tpd VCCI / 2 VCCI / 2 V CCI / 2 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 7-2. Propagation Delay VCCI (1) 0 V 100 kHz 500 ps/V ± 1 s/V VOH (2) VOL (2) Ensure Monotonic Rising and Falling EdgeOutput B, A Input A, B 1. VCCI is the supply pin associated with the input port. 2. VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1 Figure 7-3. Input Transition Rise and Fall Rate TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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Output(1) tdis GND VCCA / 2 VCCO (3) VOL (4)VOL + VTP ten VCCO / 2 Output(2) VOH (4) GND VOH - VTP VCCO / 2 OE A. Output waveform on the condition that input is driven to a valid Logic Low. B. Output waveform on the condition that input is driven to a valid Logic High. C. VCCO is the supply pin associated with the output port. D. VOH and VOL are typical output voltage levels with specified RL, CL, and S1. Figure 7-4. Enable Time and Disable Time www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TXV0106-Q1

8 Detailed Description

8.1 Overview

The TXV0106-Q1 is an 6-bit translating transceiver that uses two individually configurable power-supply rails. The device is operational with both V CCA and VCCB supplies as low as 1.65 V and as high as 3.6 V. Additionally, the device can be operated with VCCA = VCCB. The Ax port is designed to track VCCA, and the Bx port is designed to track VCCB. The TXV0106-Q1 device is designed for asynchronous communication between data buses, and transmits data in a fixed direction from the A bus to the B bus. The output-enable input ( OE) is used to disable the outputs so the buses are effectively isolated. The output-enable pin ( OE) of the TXV0106-Q1 is referenced to V CCA. To enable the high-impedance state of the level shifter I/Os during power up or power down, the OE pin should be tied to VCCA through a pullup resistor.

8.2 Functional Block Diagram

Figure 8-1. Functional Block Diagram of the TXV0106-Q1 TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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8.3 Feature Description

8.3.1 Balanced High-Drive CMOS Push-Pull Outputs

A balanced output allows the device to sink and source similar currents. The high drive capability of this device creates fast edges into light loads so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all times.

8.3.2 Over-Voltage Tolerant Inputs

Input signals to this device can be driven above the supply voltage so long as they remain below the maximum input voltage value specified in the Recommended Operating Conditions.

8.3.3 Negative Clamping Diodes

The inputs and outputs to this device have negative clamping diodes as depicted in Figure 8-2 CAUTION Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to the device. The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. GND Level Shifter Input or I/O configured as input VCCA Device -IIK -IOK VCCB I/O configured as output Figure 8-2. Electrical Placement of Clamping Diodes for Each Input and Output

8.3.4 Fully Configurable Dual-Rail Design

Both the VCCA and VCCB pins can be supplied at any voltage from 1.65 V to 3.6 V, making the device suitable for translating between any of the voltage nodes (1.8 V, 2.5 V, and 3.3 V).

8.3.5 Supports High-Speed Translation

The TXV0106-Q1 device can support high data rate applications. The translated signal data rate can support up to 320Mbps when the signal is translated from 1.8 V to 3.3 V. For the device to meet RGMII 2.0 timing specifications (rise or fall time, skew, and duty cycle distortion) the data rate will need to be lowered to 250Mbps.

8.4 Device Functional Modes

Table 8-1. Function Table CONTROL INPUTS (1) PORT STATUS OPERATION OE A PORT B PORT L Input (Hi-Z) Output (Enabled) A data to B bus H Input (Hi-Z) Input (Hi-Z) Isolation (1) Input circuits of the data I/Os are always active and should be kept at a valid logic level. VCCA must be powered up before VCCB www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TXV0106-Q1

9 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

9.1 Application Information

The TXV0106-Q1 device can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. The TXV0106-Q1 device is an excellent choice for use in applications where a push-pull driver is connected to the data I/Os. The maximum data rate can be up to 320Mbps when device translates a signal from 1.8 V to 3.3 V.

9.2 Typical Application

TX_CLK TX_CTRL TXD3 1.8V 1.8V VCCA VCCB A2 B2 MACMAC PHY TXV0106-Q1 VCCB VCCA B2 A2 TXD2 TXD1 TXD0 RX_CLK RX_CTRL RXD3 RXD2 RXD1 RXD0 1 F0.1 F0.1 F1 F 3.3V 3.3V Figure 9-1. RGMII Application (Interfacing Between MAC and PHY)

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 9-1. Table 9-1. Design Parameters DESIGN PARAMETERS EXAMPLE VALUES Input voltage range 1.8 V to 3.3 V Output voltage range 1.8 V to 3.3 V Frequency 125 MHz Load Capacitance 5 pF Input Transition Rise/Fall Time < 2 ns/V

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

  • Input voltage range – Use the supply voltage of the device that is driving the TXV0106-Q1 device to determine the input voltage range. For a valid logic-high, the value must exceed the positive-going input-threshold voltage (Vt+) of the input port. For a valid logic low the value must be less than the negative-going input-threshold voltage (Vt-) of the input port. TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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  • Output voltage range – Use the supply voltage of the device that the TXV0106-Q1 device is driving to determine the output voltage range.
  • RGMII Compliant – For the TXV0106-Q1 to meet RGMII timing specifications, parameters like frequency, CLOAD and input rise or fall transition have to be met. Make sure each channel does not exceed a maximum frequency of 125 MHz, use a CLOAD no greater than 5 pF, and use an input rise or fall translation no greater than 2 ns/V.

9.2.3 Application Curves

Figure 9-2. TXV0106-Q1 Timing Measurements

9.3 Power Supply Recommendations

The TXV0106-Q1 uses two separate configurable power supply rails, V CCA and V CCB. The A port and B port are designed to track V CCA and VCCB, respectively, allowing for low-voltage fixed translation between any of the 1.8-V, 2.5-V and 3.3-V voltage nodes. The output-enable OE input circuit is designed to be supplied by V CCA. When the OE input is high, all outputs are placed in the high-impedance state. For a high-impedance state to occur on the outputs during power up or power down, the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until V CCA and VCCB are fully ramped and stable. For proper device functionality, power up VCCA before VCCB. www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TXV0106-Q1

9.4 Layout

9.4.1 Layout Guidelines

For device reliability, follow common printed-circuit board layout guidelines such as the following:

  • Use short trace lengths to avoid excessive.
  • Use bypass capacitors on the power supply pins and place them as close to the device as possible.
  • A 0.1-µF bypass capacitor is recommended, but transient performance can be improved by having both 1-µF and 0.1-µF capacitors in parallel with the smallest value capacitor placed closest to the power pin.
  • The high drive capability of this device creates fast edges into light loads. Routing and load conditions should be considered to prevent ringing.

9.4.2 Layout Example

B G Legend MAC PHY TXV0106-Q1 0.1µF 0201 Thermal Pad VCCA VCCB GND OEGG 0.1µF 0201 GG A B Figure 9-3. Layout Example – TXV0106-Q1 TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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10 Device and Documentation Support

10.1 Documentation Support

10.1.1 Related Documentation

For related documentation, see the following:

  • Texas Instruments, Understanding Schmitt-Triggers application brief

10.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

10.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

10.4 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

10.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

10.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TXV0106-Q1

11.1 Tape and Reel Information

Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PTXV0106QWBQBRQ1 WQFN BQB 16 3000 180 12.4 2.8 3.8 1.2 4 12 Q1 TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PTXV0106QWBQBRQ1 WQFN BQB 16 3000 210 185 35 www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TXV0106-Q1

11.2 Mechanical Data

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. PACKAGE OUTLINE 4226135/A 08/2020 www.ti.com WQFN - 0.8 mm max height INDSTNAME BQB0016B A 0.08 C

0.1 C A B

0.05 C B SYMM SYMM 2.6 2.4 3.6 3.4

0.8 MAX

0.05 0.00 SEATING PLANE C (0.2) TYP 2X 0.5 2.5 10X 0.5 1.1 0.9 2.1 1.9 16X 0.5 0.3 16X 0.3 0.2 SYMM 8 9 PIN 1 ID (OPTIONAL) PIN 1 INDEX AREA (0.16)

0.1 MIN

(0.13) SECTION A-A TYPICAL TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. EXAMPLE BOARD LAYOUT 4226135/A 08/2020 www.ti.com WQFN - 0.8 mm max heightBQB0016B INDSTNAME SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X (1) (2) 16X (0.6) 16X (0.25) 2X (0.5) 10X (0.5) (2.3) (3.3) 2X (0.75) 1 16 8 9 (Ø 0.2) VIA TYP (R0.05) TYP www.ti.com TXV0106-Q1 SCES956 – AUGUST 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TXV0106-Q1

NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. EXAMPLE STENCIL DESIGN 4226135/A 08/2020 www.ti.com WQFN - 0.8 mm max heightBQB0016B INDSTNAME SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 85% PRINTED COVERAGE BY AREA SCALE: 20X SYMM SYMM (0.95) (1.79) 16X (0.6) 16X (0.25) 2X (0.5) 10X (0.5) (2.3) (3.3) 2X (0.75) 1 16 8 9 (R0.05) TYP METAL TYP TXV0106-Q1 SCES956 – AUGUST 2023 www.ti.com ADVANCE INFORMATION

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www.ti.com 26-Aug-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTXV0106QWBQBRQ1 ACTIVE WQFN BQB 16 3000 TBD Call TI Call TI -40 to 125 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

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