PTXH0137DQPWRQ1

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TXH0137D-Q1 TI | Alldatasheet

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TXH0137D-Q1 Automotive 7-Bit Fixed Direction Voltage-Level Translator with Inverted Open-drain Outputs

1 Features

This information is only for the automotive device
Wide voltage-level translation range: – 1.5 V ↔ 30 V up and down translation or level shifting
High drive strength (up to 100 mA IOL per channel)
High-voltage tolerant I/O (up to 30 V)
Low power consumption: – 30 µA ICC maximum – 10 nA I/O leakage
Overshoot protection with output clamp diode
Inputs with integrated static pull-down and series resistors allowing for slow, floating or noisy inputs
Inputs are TTL compatible
AEC-Q100 qualified with the following results: – Device temperature grade 1: –40°C to +125°C ambient operating temperature range – Device HBM ESD Classification Level 2 – Device CDM ESD Classification Level C4B

2 Applications

High voltage translation or level shifting
Infotainment and cluster
Hybrid, electric, and powertrain systems
Body electronics and lighting
ADAS
LED and LCD driver

3 Description

The TXH0137D-Q1 is a 7-bit, single supply inverting fixed direction voltage level translation device. This device has open-drain outputs that support voltages up to 30 V and currents up to 100 mA per channel. These outputs can be used in parallel for even higher current capabilities. Due to these very high currents, the outputs are more susceptible to large overshoots caused by the load reactance. To combat this, the outputs are equipped with overshoot-protection diodes that clamp. The TXH0137D-Q1 has inputs with improved noise immunity along capable of supporting a wide range of input transition rates. The inputs are also over-voltage tolerant with integrated static 1-MΩ pull-downs.

Package Information

PART NUMBER PACKAGE(1) PACKAGE SIZE(2) TXH0137D-Q1 PW (TSSOP, 16) 5 mm × 6.4 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. (2) The package size (length × width) is a nominal value and includes pins, where applicable. TXH0137D-Q1 16A1 GND VCC 24 V 12 V 5 V 1.8 V 24-V Subsystem 30 V 1.8-V Subsystem 12-V Subsystem Fault Detec on Signal 5-V I/O 3.3-V I/O 24-V I/O * VCC must be 6.5 V or the highest Vo Simple Application Schematic ADVANCE INFORMATION TXH0137D-Q1 SCES955 – SEPTEMBER 2023 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice.

9 Mechanical, Packaging, and Orderable Information..15

4 Revision History

September 2023 * Initial Release TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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5 Pin Configuration and Functions

Figure 5-1. PW Package, 16-Pin TSSOP (Top View) Table 5-1. Pin Functions PIN TYPE] DESCRIPTION NAME NO. A(X) I Low Leakage Inputs GND 8 — Ground pin VCC 9 — Supply pin that must be tied to 6.5 V or higher for proper operation (for more information, see Power Supply Recommendations). Y(X) O Inverted Open-drain Outputs (1) I = input, O = output www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TXH0137D-Q1

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted) (1) MIN MAX UNIT VO Voltage applied to any output in the low or high-impedance state –0.3 32 V VOK Output clamp diode reverse voltage –0.3 32 V VCC Supply voltage –0.3 32 V VI Input Voltage –0.3 30 V IO Continuous output current(2) (3) 200 mA IOK Output clamp current 500 mA Continuous current through VCC or GND –1 1 A TJ Operating junction temperature –40 150 °C Tstg Storage temperature –65 150 °C (1) Operation outside the Absolute Maximum Rating may cause permanent device damage. Absolute Maximum Rating do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Condition. If used outside the Recommended Operating Condition but within the Absolute Maximum Rating, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime. (2) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. (3) The package thermal impedance is calculated in accordance with JESD 51-7.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 VCharged-device model (CDM), per AEC Q100-011 All pins ±500 Corner pins (1, 8, 9, 16) ±750 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over operating temperature range MIN MAX UNIT VCC Supply voltage 6.5 30 V VIH High-level input voltage 1.5 V VIL Low-level input voltage 0.9 V IOL Low-level output current 0 100 mA VI Input voltage 1.5 30 V VO Output voltage 0 30 V TA Operating free-air temperature –40 125 °C TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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6.4 Thermal Information

THERMAL METRIC(1) TXH0137D-Q1 UNITTSSOP (PW)

16 PINS

θJA Junction-to-ambient thermal resistance 113.1 °C/W θJCtop Junction-to-case (top) thermal resistance 46.5 °C/W θJB Junction-to-board thermal resistance 58.6 °C/W ψJT Junction-to-top characterization parameter 7 °C/W ψJB Junction-to-board characterization parameter 58 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

TJ= –40°C to +125°C; Typical Values at TA= 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOL Low-level output voltage VI ≥ 1.5 V IOL = 100 mA 210 450 mV IOZ Hi-z output current VO = 30 V, VI ≤ 0.9 V 10 500 nA VF Clamp forward voltage IF = 100 mA 1 V II Input leakage current VI = 0 V – 5 V 10 μA ICC Supply current VCC = 6.5 V – 30 V 17 30 μA

6.6 Switching Characteristics

Typical Values at TA= 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output VI ≥ 1.5 V, Vpull-up = 30 V, Rpull-up = 480 Ω 250 ns tPHL Propagation delay time, high- to low-level output VI ≥ 1.5 V, Vpull-up = 30 V, Rpull-up = 480 Ω 250 ns Ci Input capacitance VI = 0, f = 100 kHz 5 pF www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TXH0137D-Q1

50%Input 50% VCC 0 V 50% 50% VOH VOL tPLH (*) tPHL (*) VOH VOL tPHL (*) tPLH (*) Output Output 50% 50% CL (*) RLFrom Output Under Test VCCTest Point * CL includes probe and test- xture Capacitance * The greater between tPLH and tPHL is the same as tpd Figure 6-1. Load Circuit and Voltage Waveforms Propagation Delays TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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6.7 Typical Characteristics

Figure 6-2. Signal Integrity Captured Waveform (3.3 V to 24 V Up Translation at 100 kHz) Input Output Figure 6-3. Signal Integrity Captured Waveform (24 V to 3.3 V Down Translation at 100 kHz) IOL (mA) VOL (V) 10 20 30 40 50 60 70 80 90 100 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 1.8 V 2.5 V 3.3 V 5 V Figure 6-4. Typical (TA = 25°C) Output Low Voltage (VOL) vs Sink Current(IOL) for Lower Voltage Level Shifting Figure 6-5. Flyback Diode Forward Voltage at 25°C www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TXH0137D-Q1

7 Detailed Description

7.1 Overview

The TXH0137D-Q1 is a 7-bit device that can be used in fixed directional level-translation applications for interfacing devices or systems operating at a wide voltage range as low as 1.5 V and as high as 30 V with currents up to 100 mA per channel. The A ports are designed as inputs and the Y ports are designed as outputs. The device can operate with A(X) = Y(X). The device enables a wide range of applications with higher input or output capabilities, but more importantly it allows flexible pull-up sizing for voltage translation. Lower value resistors will enable higher frequency operation up to 1 MHz.

7.2 Functional Block Diagram

7.3 Feature Description

The TXH0137D-Q1 device is equipped with high drive open-drain outputs. These outputs are capable of sinking up to 100 mA each. In order to enable floating inputs, a 1-M Ω pull-down resistor exists on each channel. Also included at the input is a filtering circuit with a 50-k Ω series resistor to improve noise immunity and eliminate any erroneous switching. Higher drive strength is achievable when multiple outputs are paralleled. Each output is equipped with over- voltage protection (OVP) diodes clamping to VCC. The diodes connected between the output and VCC pin is used to suppress any over-shoots caused by load reactance with the high current drive of this device. TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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7.4 Device Functional Modes

7.4.1 Resistive Load Drive

When driving a resistive load, a pull-up resistor is needed to limit the current through the pass transistor for a logic level of 210 mV to 450 mV when the TXH0137D-Q1 is in the low state to about 100 mA. To calculate the pull-up resistor value use the following equation. R PU = V PU − 0.21 V

0.1 A (1)

RPU is the pull-up resistor
VPU is the pull-up voltage
0.21 V is the low logic level voltage
0.1 A is the maximum drive strength for the low logic level current Table 7-1 provides the resistor values, reference voltages and currents at 100 mA, 50 mA, 25 mA, 15 mA, and 3 mA. The resistor value shown are recommended for typical VOL or less. Table 7-1. Pull-Up Resistor Values VPU (V) Pull-Up Resistor Values (Ω) (1) 100 mA 50 mA 25 mA 15 mA 3 mA

30 V 298 596 1192 1986 9930

24 V 238 476 952 1586 7930

12 V 118 236 472 786 3930

5 V 48 96 192 319 1597

3.3 V 31 62 124 206 1030

2.5 V 23 46 92 153 763

1.8 V 16 32 64 106 530

1.5 V 13 26 52 86 430

(1) Use +10% to compensate for VPU range and resistor tolerance

7.4.2 ON State Input Current

The current into the inputs is defined in the electrical characteristics table for input voltages from 1.5 V to 5 V. At higher voltages, this leakage increases, and the input current can be estimated using the approximate clamp voltage for the overshoot-protection diode which is, 6.4 V. Equation 2 shows how to approximate input current for input voltages greater than 6.4 V: I I N O N = V I N

1 M Ω +

V I N − 6.4 V 50 k Ω (2) where

VIN is the input voltage
1 MΩ is the input pull-down resistance
50 kΩ is the input series resistance
6.4 V is the approximate clamp voltage for the OVP diode www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TXH0137D-Q1

7.4.3 High-Drive Outputs

The outputs of this device are capable of driving larger currents than the device can sustain without being damaged. Two outputs can be connected together for 2X stronger output drive strength. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all times. The maximum frequency of the TXH0137D-Q1 is dependent on the components of the system. The device can operate at speeds up to 100 kHz for up translation and < 1 MHz for down translation given the correct conditions. Mbp s da tar ate = 1 6 × R PU × C (3) where

RPU is the pull-up resistor
C is the load capacitance TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TXH0137D-Q1 is typically used to translate typical logic levels to higher voltage (up to 30 V) peripherals and vice-versa. Figure 8-1 shows a common application of the TXH0137D-Q1.

8.2 Typical Application

A common application for the TXH0137D-Q1 is to level shift up to or down from 30 V. With its high sinking currents it can also be used for other applications requiring higher current drive like operating LEDs. SW VCC SW SW SW SW SW SW TXH0137-Q1 Controller Peripheral up to 30 V GND * VCC must be 6.5 V or the highest Vo Figure 8-1. Typical Application Schematic www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TXH0137D-Q1

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 8-1 as the input parameters. Table 8-1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE VIN supply voltage 1.5 V to 30 V VCC supply voltage 6.5 V to 30 V Number of channels 7 Output current Up to 100 mA per channel CVcc 0.1 µF VPU 0 V to Vo

8.2.2 Detailed Design Procedure

When using the TXH0137D-Q1 in a voltage translation application, determine the following:

Output voltage range
Output drive current
Temperature range
Power dissipation

8.2.2.1 TTL and other Logic Inputs

The TXH0137D-Q1 inputs are specified for standard 1.8 V through 5 V CMOS logic interface and can tolerate up to 30 V. With its input threshold levels, this device can be used with TTL logic. The device features a 1-M Ω input pull-down resistor and a 50-k Ω series resistor allowing for floating or noisy inputs and eliminating the need for slew or input transition rate requirements.

8.2.2.2 High-Impedance Input Drivers

The TXH0137D-Q1 features a 1-M Ω input pull-down resistor. The presence of this resistor allows the input drivers to be tri-stated. When a high-impedance driver is connected to a channel input, the TXH0137D-Q1 detects the channel input as a low-level input and remains OFF. The input noise rejection circuit helps improve noise tolerance levels if necessary, when input drivers are in the high-impedance state.

8.2.2.3 Output Low Voltage

The output low voltage (V OL) is drain-to-source (V DS) voltage of the output NMOS transistors when the input is driven high and it is sinking current. For more information, see Electrical Characteristics or Figure 6-4.

8.2.3 Application Curve

The following image was generated with TXH0137D-Q1 for A(X) = Y(X); 30 V to 30 V, 100 kHz signal. Input Output Figure 8-2. Output Response at Maximum Voltage TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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8.3 Power Supply Recommendations

The VCC pin is the power supply pin of this device to power the gate drive circuitry. The pin must be supplied with ≥ 6.5 V or the highest output voltage for full functionality. While a bypass capacitor on this pin is recommended for sensitive power supplies, it is not required for proper operation of the device. The V CC pin is designed to supply full drive potential with any GPIOv ≥ 1.5 V. Though 6.5 V minimum is recommended for V CC, the part still functions with a reduced VCC resulting in higher Rdson.

8.4 Layout

8.4.1 Layout Guidelines

Thin traces can be used on the input due to the low current logic that is typically used to drive the TXH0137D- Q1. Take care to separate the input channels as much as possible to eliminate cross-talk. Thick traces are recommended for the output to drive high currents that may be needed. Wire thickness can be determined by the trace material's current density and desired drive current. Since all of the channels currents return to a common ground, it is best to size that trace width to be very wide. The VCC pin only draws up to 30 µA and thick traces may not be necessary.

8.4.2 Layout Example

VIA to GND Plane (Inner Layer) Polygonal Copper Pour VCC A4 Y4 TXH0137-Q1 GND 9 VCC B Bypass Capacitor Figure 8-3. Package Layout www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TXH0137D-Q1

8.4.3 Thermal Considerations

Use Equation 4 to calculate TXH0137D-Q1 on-chip power dissipation PD: P D = ∑ i = 1 N V OL i × I Li (4) where

N is the number of channels active together
VOLi is the OUTi pin voltage for the load current ILi. For reliability of TXH0137D-Q1 and the system, the on-chip power dissipation must be lower than or equal to the maximum allowable power dissipation (PD(MAX)). Equation 5 shows how PD(MAX) is calculated. P D M A X = T J M A X − T A θ J A (5) where
TJ(MAX) is the target maximum junction temperature
TA is the operating ambient temperature
θJA is the package junction to ambient thermal resistance It is recommended to limit the TXH0137D-Q1 IC’s die junction temperature to less than 125°C. The IC junction temperature is directly proportional to the on-chip power dissipation.

8.4.3.1 Improving Package Thermal Performance

θJA value depends on the PCB layout. An external heat sink and/or a cooling mechanism, like a cold air fan, can help reduce θJA and thus improve device thermal capabilities. For a general guidance on improving device thermal performance, refer to TI’s design support web page at www.ti.com/thermal. TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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8 Device and Documentation Support

8.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

8.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

8.3 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

8.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.5 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

9 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TXH0137D-Q1

9.1 Tape and Reel Information

Reel Width (W1) REEL DIMENSIONS W Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Dimension designed to accommodate the component width TAPE DIMENSIONS B0 W A0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket Quadrants Sprocket Holes Q1 Q1Q2 Q2 Q3 Q3Q4 Q4 Reel Diameter User Direction of Feed Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PTXH0137DQPWRQ1 TSSOP PW 14 2000 330 12 6.9 5.6 1.6 8 9.2 Q1 TXH0137D-Q1 SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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TAPE AND REEL BOX DIMENSIONS Width (mm) W L H Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PTXH0137DQPWRQ1 TSSOP PW 14 2000 366 364 50 www.ti.com TXH0137D-Q1 SCES955 – SEPTEMBER 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TXH0137D-Q1

9.2 Mechanical Data

SCES955 – SEPTEMBER 2023 www.ti.com ADVANCE INFORMATION

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www.ti.com 29-Sep-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTXH0137DQPWRQ1 ACTIVE TSSOP PW 14 2000 TBD Call TI Call TI -40 to 125 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

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