PTV05010W TI | Alldatasheet
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8-A, 5-V INPUT NONISOLATED WIDE-OUTPUT ADJUST SIP MODULE
FEATURES
APPLICATIONS
DESCRIPTION
www.ti.com Multivoltage Digital Systems Up to 8-A Output Current High-Density Logic Circuits 5-V Input Bus High-End Computers and Servers Wide-Output Voltage Adjust 5-V Intermediate Bus Architectures (0.8 V to 3.6 Efficiencies up to 95% On/Off Inhibit Prebias Start-Up Undervoltage Lockout Auto-Track Sequencing Output Overcurrent Protection (Nonlatching, Auto-Reset) Operating Temperature: C to C Safety Agency Approvals: UL/cUL 60950, EN60950 VDE POLA Compatible The PTV05010W is a ready-to-use nonisolated power module, and part of a new class of complete dc/dc switching regulators from Texas Instruments. These regulators combine high performance with double-sided, surface-mount construction, to give designers the flexibility to power the most complex multiprocessor digital systems using off-the-shelf catalog parts. The PTV05010W series is produced in a 8-pin, single in-line pin (SIP) package. The SIP footprint minimizes board space, and offers an alternate package option for space conscious applications. Operating from a 5-V input bus, the series provides step-down conversion to a wide range of output voltages, at up to A of output current. The output voltage can be set to any value over the range, 0.8 V to 3.6 using a single external resistor. This series includes Auto-Track Auto-Track simplifies the task of supply-voltage sequencing in a power system by enabling the output voltage of multiple modules to accurately track each other, or any external voltage, during power up and power down. Other operating inhibit, and the ability to start up into an existing output voltage or prebias. A nonlatching overcurrent trip protects against load faults. Target multivoltage, multiprocessor systems that incorporate the industry's high-speed microprocessors, bus drivers, and the TMS320 DSP family. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. POLA, Auto-Track, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
www.ti.com R #SET 0.05□W (Required) L O A D Track Inhibit GND GND C2* 10 F Ceramic (Required) /c109 C4* 10 F Ceramic (Optional) /c109 C3* 100 F (Optional) /c109 C1* 100 F (Required) /c109 *□See□the Application□Information□for□capacitor□recommendations #□R is□required□to□adjust□the□output□voltage□higher□than□its□lowest□value.SET See□the section□for□values.Application□Information 416 7PTV05010 2, 38 VI VI VO VO GNDInhibit V O Adj Track GND ABSOLUTE MAXIMUM RATINGS PACKAGE SPECIFICATIONS PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. STANDARD APPLICATION ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI website at www.ti.com. over operating free-air temperature range unless otherwise noted (1) UNIT V (Track) Track input voltage 0.3 V to V I +0.3 V T A Operating temperature range Over V I range C to C Lead temperature seconds 260 C (2) T stg Storage temperature C to 125 C V (INH) Inhibit input voltage 0.3 V to V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) This product is not compatible with surface-mount reflow solder processes. PTV05010W (Suffix AH) Weight 2.5 grams Flammability Meets UL V-O Mechanical shock Per Mil-STD-883D, Method 2002.3, ms, sine, mounted 500 G (1) Mechanical vibration Mil-STD-883D, Method 2007.2, Hz 2000 Hz G (1) (1) Qualification limit. Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com ELECTRICAL CHARACTERISTICS PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 operating at C free-air temperature, V I V O 3.3 100 µ µ µ µ and I O I O max (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I O Output current Natural convection airflow (1) A V I Input voltage range Over I O load range 4.5 5.5 V Set-point voltage tolerance (2) Temperature variation C T A C 0.5% Line regulation Over V I range mV V O Load regulation Over I O range mV Total output variation Includes set-point, line, load, C T A C (2) o Adjust range Over V I range 0.8 3.6 V R SET 698 Ω V O 3.3 V 95% R SET 2.21 k Ω V O 2.5 V 93% R SET 5.49 k Ω V O 1.8 V 90% η Efficiency I O I O max R SET 8.87 k Ω V O 1.5 V 89% R SET 17.4 k Ω V O 1.2 V 87% R SET 36.5 k Ω V O V 85% Output voltage ripple (pk-pk) 20-MHz bandwidth mV PP I O (trip) Overcurrent threshold Reset, followed by auto-recovery A 1-A/ µ s load step, to 100% I O max, 100 µ F Transient response Recovery time µ s V o over/undershoot 100 mV I IL Input low current Pin to GND 0.13 mA Track control (pin Control slew-rate limit (max) V/ms V I increasing 4.3 4.5 UVLO Undervoltage lockout V V I decreasing 3.1 3.7 V IH Input high voltage V I 0.5 Open (3) Referenced to GND V Inhibit control (pin 12) V IL Input low voltage 0.2 0.6 I IL Input low current Pin to GND 0.24 mA I I (stby) Input standby current Inhibit (pin to GND, Track (pin open mA ƒ S Switching frequency Over V I and I O ranges 550 600 650 kHz Nonceramic (C1) 100 (4) External input capacitance µ F Ceramic (C2) (4) Nonceramic 100 (5) 3300 (6) Capacitance value µ F External output capacitance (C3) Ceramic 300 Equivalent series resistance (nonceramic) (7) m Ω Per Telcordia SR-332, 50% stress, T A ground MTBF Reliability Hr benign (1) See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating. (2) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of 1%, with 100 ppm/ C or better temperature stability. (3) This control pin is internally pulled up to the input voltage, V I If this input is left open circuit, the module will operate when input power is applied. A small low-leakage 100 nA) MOSFET is recommended for control. For further information, see the related application note. (4) A 10- µ F high-frequency ceramic capacitor and 100- µ F electrolytic input capacitor are required for proper operation. The electrolytic capacitor must be rated for 300 mArms minimum ripple current. See the Application Information for further guidance on capacitor selection. (5) An external output capacitor is not required for basic operation. Adding 100 µ F of distributed capacitance at the load improves the transient response. (6) This is the calculated maximum. The minimum ESR limitation often results in a lower value. When controlling the Track pin using a voltage supervisor, C O (max) is reduced to 2200 µ See the Application Information for further guidance. (7) This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use m Ω as the minimum when using maximum-ESR values to calculate. Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com TYPICAL CHARACTERISTICS (5-V INPUT) (8) (9) V -□Output□Ripple□Voltage□-□mVO PP 0 1 2 3 4 5 6 7 8 I -□Output□Current□- AO V =□3.3□VO V =□0.8□VO 100 0 1 2 3 4 5 6 7 8 Efficiency□-□% I -□Output□Current□- AO V =□3.3□VO V =□2.5□VO V =□1.8□VO V =□0.8□VO V =□1.2□VO 0.5 1.5 2.5 0 1 2 3 4 5 6 7 8 P -□Power□Dissipation□-□WD I -□Output□Current□- AO V =□3.3□VO V =□0.8□VO 2 0 3 0 4 0 6 0 8 0 9 0 1 2 3 4 5 6 7 8 Air□Temperature□- Co I -□Output□Current□- AO 400□LFM 200□LFM 100□LFM Nat□Conv Air□Flow PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 EFFICIENCY OUTPUT VOLTAGE RIPPLE vs vs OUTPUT CURRENT OUTPUT CURRENT Figure Figure POWER DISSIPATION TEMPERATURE DERATING vs vs OUTPUT CURRENT OUTPUT CURRENT Figure Figure (8) The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure Figure and Figure (9) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. The airflow direction is parallel to the long axis of the module. Derating limits apply to modules soldered directly to a 100 mm x 100 mm, double-sided PCB with oz. copper. Applies to Figure Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com DEVICE INFORMATION PIN 1 PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 TERMINAL FUNCTIONS TERMINAL NO. V I The positive input voltage power node to the module, which is referenced to common GND. V O The regulated positive power output with respect to the GND node. This is the common ground connection for the V I and V O power connections. It is also the 0-Vdc reference for the GND control inputs. Both pins must be connected to common ground. The Inhibit pin is an open-collector/drain, active-low input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output and turns off the output voltage. When the Inhibit control is active, Inhibit the input current drawn by the regulator is significantly reduced. If the inhibit feature is not used, the control pin should be left open-circuit. The module then produces an output voltage whenever a valid input source is applied. A or 0.5% resistor must be connected directly between this pin and GND (pin is recommended) to set the output voltage of the module higher than its lowest value. The temperature stability of the resistor should be 100 ppm/ C (or better). The set-point range is 0.8 V to 3.6 The resistor value can be calculated using a formula. If V o Adjust this input is left open-circuit, the output voltage defaults to its lowest value. For further information, consult the related application note. The specification table gives the standard resistor values for a number of common output voltages. This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically ms after the input voltage has been applied, and allows direct control of the output voltage from V up to the nominal set-point voltage. Within this range, the output follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point Track voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to V I NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. Consult the related Application Information for further guidance. Front View of Module Figure Pin Terminal Locations Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com APPLICATION INFORMATION Capacitor Recommendations for the PTV05010W Power Module Input Capacitors Output Capacitor (Optional) Ceramic Capacitors Tantalum Capacitors PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 The required input capacitors are a 10- µ F ceramic and a minimum of 100- µ F electrolytic type. The 100- µ F capacitance must be rated for 300 mArms ripple current capability. See Table The above ripple current requirements are conditional that the 10- µ F ceramic capacitor is present. The 10- µ F X5R/X7R ceramic capacitor is necessary to reduce both the magnitude of ripple current through the electroytic capacitor and the amount of ripple current reflected back to the input source. Ceramic capacitors should be located within 0.5 inch. (1,3 cm) of the module's input pins. Additional ceramic capacitors can be added to reduce the RMS ripple current requirement for the electrolytic capacitor. Ripple current (rms) rating, less than 150-m Ω equivalent series resistance (ESR), and temperature are the major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitors have a recommended minimum voltage rating of (max. dc voltage ac ripple). This is standard practice to ensure reliability. Only a few tantalum capacitors were found to have sufficient voltage rating to meet this requirement. At temperatures below the ESR of aluminum electrolytic capacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered. For (sudden changes in load current), regulator response benefits from external output capacitance. The recommended output capacitance of 100 µ F allows the module to meet its transient response specification. For most applications, a high-quality computer-grade aluminum electrolytic capacitor is adequate. These capacitors provide decoupling over the frequency range, kHz to 150 kHz, and are suitable when ambient temperatures are above For operation below tantalum-, ceramic-, or Os-Con-type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than m Ω m Ω using the manufacturer's maximum ESR for a single capacitor). A list of preferred low-ESR-type capacitors are identified in Table Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. When used on the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed approximately 300 µ Also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of µ F or greater. Tantalum-type capacitors can only be used on the output bus, and are recommended for TPS, Sprague 593D/594/595 and Kemet T495/T510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered before the maximum capacitance value is reached. Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com Capacitor Table PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 Table identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. Note: This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long capacitor life. Table Input/Output Capacitors (1) Capacitor Characteristics Quantity Max ESR Max Ripple Capacitor Vendor, Vendor Working Optional Value at 100 Current at Physical Size Input Type/Series (Style) Part Number Voltage Output µ kHz C (Irms) (mm) Bus (V) Bus Ω (mA) Panasonic, Aluminum 330 0.117 555 11.5 EEUFC1A331 FC( Radial) 220 0.117 117 11,5 EEUFC1C221 FK (SMD) 6.3 470 0.16 600 10.2 EEVFK0J471P United Chemi-Con PSA,Poly-Alum (Radial) 6.3 220 0.02 3160 6.3 9.8 PSA6.3VB220MF11 LXZ, Alum (Radial) 470 0.12 555 125 LXZ10VB471M8X12LL MVZ, Alum (SMD) 680 0.09 670 MVZ16VC681MJ10TP PXA, Poly-Alum (SMD) 120 0.027 2800 6,7 PXA10VC121MH70TP Nichicon, Aluminum 270 0.09 575 12,5 UPM1C271MHH6 HD (Radial) 470 0.072 760 11,5 UHD1A471MPR Sanyo TP, Poscap 220 0.025 2400 7.3 4.3 10TPE220M SEQP, Os-Con (Radial) 120 0.035 >2500 10SEQP120M SVP, Os-Con (SMD) 6.3 100 0.04 1810 6.3 6,0 6SVP100M AVX, Tantalum, Ser III 100 0.075 >1090 7.3 5.7 4.1 N/R TPSC107M010R0075 TPS (SMD) 150 0.05 >1559 7.3 5.7 4.1 N/R TPSD157M010R0050 Kemet (SMD) T520, Poly-Tant 100 0.055 1500 7.3 4.3 T520D107M010ASE055 T530, Poly-Tant/Organic 330 0.01 >3800 7.3 4.3 T530X337M010ASE010 Vishay-Sprague 94SVP 120 0.04 2120 94SVP127X0010E7 595D, Tantalum (SMD) 220 0.14 1040 7.5 4.3 4.1 595D227X0010D2T 94SA, Os-Con (Radial) 100 0.03 2670 10.5 94SA107X0010EBP Kemet, Ceramic X5R 0.002 3225 (2) C1210C106M4PAC (SMD) 6.3 0.002 3225 (2) C1210C226K9PAC 6.3 0.002 3225 (2) C1210C476K9PAC Murata, Ceramic X5R 6.3 100 0.002 3225 (2) GRM32ER60J107M (SMD) 6.3 (2) GRM32ER60J476M (2) GRM32ER61C226K (2) GRM32DR61C106K TDK, Ceramic X5R 6.3 100 0.002 3225 (2) C3225X5R0J107MT (SMD) 6.3 (2) C3225X5R0J476MT (2) C3225X5R1C226MT (2) C3225X5R1C106MT (1) Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. (2) Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current. Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com Designing for Fast Load Transients Adjusting the Output Voltage R SET /C004310 k/C0087/C00320.8 V V O /C00420.8 V/C00422.49 k/C0087 (1) PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of µ The typical voltage deviation for this load transient is given in the data sheet specification table using the optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed that specified in the data sheet, or the total amount of load capacitance is above 3000 µ the selection of output capacitors becomes more important. The V O Adjust control (pin sets the output voltage of the PTV05010W product to a value over the range, 0.8 V to 3.6 The adjustment method requires the addition of a single external resistor, R SET that must be connected directly between the V O Adjust and the regulator's output GND (pin is recommended). Without an adjust resistor, the output voltage is set to its lowest value. Table gives the preferred value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. Figure shows the placement of the required resistor. Table Nearest Standard Values of R SET for Common Output Voltages V O R SET V O (Required) (Standard Value) (Actual) 3.3 V 698 Ω 3.309 V 2.5 V 2.21 k Ω 2.502 V V 4.12 k Ω 2.010 V 1.8 V 5.49 k Ω 1.803 V 1.5 V 8.87 k Ω 1.504 V 1.2 V 17.4 k Ω 1.202 V V 36.5 k Ω 1.005 V 0.8 V Open 0.800 V For other output voltages, the value of the required resistor can either be calculated or simply selected from the range of values given in Table Equation may be used for calculating the adjust resistor value. Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com PTV05010W GND VO VO CO AdjGND VO R ,□1%SET GND PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 Figure V O Adjust Resistor Placement Table Calculated Values of R SET for Other Output Voltages V O R SET V O R SET V O R SET 0.800 Open 1.450 9.82 k Ω 2.550 2.08 k Ω 0.825 318 k Ω 1.500 8.94 k Ω 2.600 1.95 k Ω 0.850 158 k Ω 1.550 8.18 k Ω 2.650 1.83 k Ω 0.875 104 k Ω 1.600 7.51 k Ω 2.700 1.72 k Ω 0.900 77.5 k Ω 1.650 6.92 k Ω 2.750 1.61 k Ω 0.925 61.5 k Ω 1.700 6.40 k Ω 2.800 1.51 k Ω 0.950 50.8 k Ω 1.750 5.93 k Ω 2.850 1.41 k Ω 0.975 43.2 k Ω 1.800 5.51 k Ω 2.900 1.32 k Ω 1.000 37.5 k Ω 1.850 5.13 k Ω 2.950 1.23 k Ω 1.025 33.1 k Ω 1.900 4.78 k Ω 3.000 1.15 k Ω 1.050 29.5 k Ω 1.950 4.47 k Ω 3.050 1.07 k Ω 1.075 26.6 k Ω 2.000 4.18 k Ω 3.100 998 Ω 1.100 24.2 k Ω 2.050 3.91 k Ω 3.150 914 Ω 1.125 22.1 k Ω 2.100 3.66 k Ω 3.200 843 Ω 1.150 20.4 k Ω 2.150 3.44 k Ω 3.250 775 Ω 1.175 18.8 k Ω 2.200 3.22 k Ω 3.300 710 Ω 1.200 17.5 k Ω 2.250 3.03 k Ω 3.350 647 Ω 1.225 16.3 k Ω 2.300 2.84 k Ω 3.400 587 Ω 1.250 15.3 k Ω 2.350 2.67 k Ω 3.450 529 Ω 1.300 13.5 k Ω 2.400 2.51 k Ω 3.500 473 Ω 1.350 12.1 k Ω 2.450 2.36 k Ω 3.550 419 Ω 1.400 10.8 k Ω 2.500 2.22 k Ω 3.600 367 Ω Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com Non-Isolated, Wide-Output Adjust Power Modules POLA Compatibility Soft-Start Power Up 5□V
100 F/c109
1.8□V R 5.49□k 1%,□0.05□W SET /c87
10 F/c109
L O A D 6 1 4 2,□3 V (2□V/div)I V (1□V/div)O I (2 A/div)I PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 The PTH/PTV family of non-isolated, wide-output adjustable power modules from Texas Instruments are optimized for a flexible, high-performance module that is small in size. Each of these products are POLA compatible. POLA-compatible products are produced by a number of manufacturers, and offer customers advanced, non-isolated modules with the same footprint and form factor. POLA parts are also ensured to be interoperable, thereby providing customers with true second-source availability. The Auto-Track feature allows the power up of multiple PTH/PTV modules to be directly controlled from the Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, V I (see Figure Figure Power-Up Application Circuit When the Track pin is connected to the input voltage, the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. Figure Power-Up Waveform Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com Overcurrent Protection (OCP) Output On/Off Inhibit VI L O A D 1□=□Inhibit GND GND VO BSS138 RSET C1 C3C2 PTV05010WVI VO GND GNDInhibit V AdjO Track PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 8ms to 15ms) before allowing the output voltage to rise. The output then progressively rises to the module set-point voltage. Figure shows the soft-start power-up characteristic of the PTV05010W, operating from a 5-V input bus and configured for a 1.8-V output. The waveforms were measured with a 5-A resistive load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power up is complete within ms. For protection against load faults, the modules incorporate output overcurrent protection. Applying a load that exceeds the overcurrent threshold causes the regulated output to shut down. Following shutdown, a module periodically attempts to recover by initiating a soft-start power up. This is described as a hiccup mode of operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. For control, the modules incorporate an output Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit input is left open-circuit, providing a regulated output whenever a valid source voltage is connected to V I with respect to GND. Figure shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pullup (see footnotes to electrical characteristics table). The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. Figure On/Off Inhibit Application Circuit Turning on applies a low voltage to the Inhibit control and disables the output of the module. If is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 25ms. Figure shows the typical rise in both the output voltage and input current, following the turnoff of Q1. The turnoff of corresponds to the rise in the waveform, V DS The waveforms were measured with a 5-A constant current load. Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com V (1□V/div)O I (2 A/div)II (2 A/div)I Q1□V (5□V/div)DS Auto-Track Function PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 Figure 10. Inhibit Waveform The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal family, microprocessors, and ASICs. How Auto-Track Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1) This control range is limited to between V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2) As an example, if the Track pin of a 2.5-V regulator is at the regulated output is If the voltage at the Track pin rises to the regulated output does not go higher than 2.5 Under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3) For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 Typical Auto-Track Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common track control signal. This can be an open-collector (or open drain) device, such as a power-up reset voltage supervisor IC. See in Figure To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4) enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the track inputs at power up. Figure shows how the TPS3808G50 supply voltage supervisor IC (U3) can be used to coordinate the sequenced power-up of two 5-V input Auto-Track modules. The output of the TPS3808G50 supervisor becomes active above an input voltage of 0.8 enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately ms after the input voltage has risen above U3's voltage threshold, which is 4.65 The 27-ms time period is controlled by the capacitor C3. The value of 4700 pF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure shows the output voltage waveforms from the circuit of Figure after input voltage is applied to the circuit. The waveforms, V O and V O represent the output voltages from the two power modules, (3.3 and (1.8 V), respectively. V TRK V O and V O are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is reapplied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure In order for a simultaneous power-down to occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the Auto-Track slew rate. If the Track pin is pulled low at a slew rate greater than V/ms, the discharge of the output capacitors will induce large currents which could exceed the peak current rating of the module. This will result in a reduction in the maximum allowable output capacitance as listed in the Electrical Characteristics table. When controlling the Track pin of the PTV05010W using a voltage supervisor IC, the slew rate is increased, therefore C O max is reduced to 2200 µ Notes on Use of Auto-Track The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to V/ms. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. The absolute maximum voltage that may be applied to the Track pin is the input voltage V I The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. The Auto-Track function is disabled by connecting the Track pin to the input voltage I When Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been applied. Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com Vo1 = 3.3 V C O1 PTV05010W 2. 38 Track VI VO GNDInhibit 1, 6 Adjust Vo2 = 1.8 V C O2 PTV05020W 10, 11 8 3, 45, 6 Track VI VO GNDInhibit 1, 2 Sense Adjust +5 V VCC GND SENSEMR CT RESET TPS3808G50 4700 pF R SET 710 Ω R SET 5.49 kΩ R TRK # 50 Ω 0.1 µF C I1 C I2 N = Number of Track pins connected together # RTRK = 100 Ω / N t − Time − 20 ms/div VTRK (1 V/div) V01 (1 V/div) V02 (1 V/div) t − Time − 200 µs/div VTRK (1 V/div) V01 (1 V/div) V02 (1 V/div) PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 Figure 11. Sequenced Power Up and Power Down Using Auto-Track Figure 12. Simultaneous Power Up With Auto-Track Figure 13. Simultaneous Power Down With Auto-Track Control Control Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com Prebias Start-Up Capability Start-up period V (2□V/div)I V (1□V/div)O t□=□10□ms/div V (2□V/div)I V 1□(1□V/div)O V 2□(1□V/div)O I 2□(5 A/div)O t□=□10□ms/div PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 A prebias start-up condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, such modules can sink as well as source output current. The PTH/PTV modules incorporate synchronous rectifiers but do not sink current during start-up, or whenever the Inhibit pin is held low. Start-up includes an initial delay (approximately ms), followed by the rise of the output voltage under the control of the module internal soft-start mechanism; see Figure Conditions for Prebias Holdoff In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output is allowed to rise under soft-start control. Power up under soft-start control occurs on the removal of the ground signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled (1) T he input voltage must also be greater than the applied prebias source (2) The soft-start period is complete when the output begins rising above the prebias voltage. The module then functions as normal, and sinks current if a voltage higher than its set-point value is applied to its output. Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to either the set-point voltage, or the voltage applied at the module Track control pin, whichever is lowest, to its output. Demonstration Circuit Figure shows the start-up waveforms for the demonstration circuit shown in Figure The initial rise in V O is the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the output current from the module O is negligible until its output voltage rises above the applied prebias. Figure 14. PTV05010W Start-Up Figure 15. Prebias Start-Up Waveforms NOTES: The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the voltage applied to the Track control pin, the output sinks current during the period that the track control voltage is below that of the back-feeding source. For this reason, Auto-Track should be disabled when not being used. This is accomplished by connecting the Track pin to the input voltage, V I This raises the Track pin well above the set-point voltage prior to start-up, thereby defeating the Auto-Track feature. To further ensure that the regulator output does not sink current when power is first applied (even with a ground signal applied to the Inhibit control input), the input voltage must always be greater than the applied Copyright 2005, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) PTV05010W
www.ti.com V 2□=□1.8□VO V =□5□VI 5.49□k/c87 ASIC VCORE VCCIO I 2O V 1□=□3.3□VO 698 /c87 C1+ C4+ C6+ 0 .1µF C3C2 1,□2 5,□6 3,□4 2,□38 7 6 1 4 10,□11 PTV05010WVI VO GND GNDInhibit V AdjO Track 7PTV05020WVI VO GND GNDInhibit V AdjO Track VCC GND SENSE RESETMR CT TPS3808G33 Sense PTV05010W SLTS242A FEBRUARY 2005 REVISED OCTOBER 2005 prebias source. This condition must exist throughout the power-up sequence of the power system. Figure 16. Application Circuit Demonstrating Prebias Start-Up Submit Documentation Feedback Copyright 2005, Texas Instruments Incorporated Product Folder Link(s) PTV05010W
www.ti.com 2-Jun-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) PTV05010WAH Active Production SIP MODULE (EVA) | 8 70 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 PTV05010WAH.B Active Production SIP MODULE (EVA) | 8 70 | TIW TRAY Exempt SN N/A for Pkg Type -40 to 85 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
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