PTN78000HAH

PTN78000W_08 TI | Alldatasheet

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DESCRIPTION

APPLICATIONS

(Top View) RSET (B)

0.05 W, 1 %

(Required) CI (A) Ceramic (Required) CO (A) 100 /c109F Electrolytic (Required) VO GND VI Inhibit GND PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 1.5-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR 1.5-A Output Current Wide-Input Voltage The PTN78000 is a series of high-efficiency, step-down Integrated Switching Regulators (ISR), V to (15 V to that represent the third generation in the evolution of Wide-Output Voltage Adjust the popular 78ST100 series of products. In new (2.5 V to 12.6 (11.85 V to designs it should be considered in place of the High Efficiency (Up to 95%) 78ST100, PT78ST100, PT5100, and PT6100 series of single in-line pin (SIP) products. The PTN78000 is On/Off Inhibit smaller and lighter than its predecessors, and has Undervoltage Lockout either similar or improved electrical performance Output Current Limit characteristics. The case-less, double-sided package, also exhibits improved thermal characteristics, and is Overtemperature Shutdown compatible with TI s roadmap for RoHS and lead-free Operating Temperature: C to C compliance. Surface Mount Package Available Operating from a wide-input voltage range, the PTN78000 provides high-efficiency, step-down voltage conversion for loads of up to 1.5 The General-Purpose, Industrial Controls, output voltage is set using a single external resistor. HVAC Systems, Test and Measurement, The PTN78000W may be set to any value within the Medical Instrumentation, AC/DC Adaptors, range, 2.5 V to 12.6 and the PTN78000H from Vehicles, Marine, and Avionics 11.85 V to The output voltage of the PTN78000W can be as little as V lower than the input, allowing operation down to with an output voltage of The output voltage of the PTN78000H can be as little as V lower than the input, alowing operation down to with an output voltage of The PTN78000 has undervoltage lockout and an integral on/off inhibit. The modules are suited to a wide variety of general-purpose 12-V, 24-V, or 28-V DC power. (A) See the Application Information section for capacitor recommendations. The minimum input capacitance is 2.2 µ F for PTN78000W, and 9.4 µ F x 4.7 µ for PTN78000H. (B) R SET is required to adjust the output voltage higher than 2.5 V for PTN78000W, and high than 11.824 V for PTN78000H. See the Application Information section for specific values. Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. PRODUCTION DATA information is current as of publication date. Copyright 2004 2008, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

(1) RECOMMENDED OPERATING CONDITIONS PACKAGE SPECIFICATIONS PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. over operating free-air temperature range unless otherwise noted, all voltages with respect to GND (pin 1), PTN78000W UNIT T A Operating free-air temperature Over V I range to Surface temperature of module body Horizontal TH (suffix AH) 260 Wave solder temperature or pins seconds) C Horizontal SMD (suffix AS) 235 Surface temperature of module body Solder reflow temperature or pins Horizontal SMD (suffix AZ) 260 T stg Storage temperature to 125 V I Input surge voltage, ms maximum V V INH Inhibit (pin input voltage 0.3 to (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. MIN MAX UNIT PTN78000W V I Input voltage V PTN78000H T A Operating free-air temperature C PTN78000x (Suffix AH, AS, and AZ) Weight grams Flammability Meets UL V-O Per Mil-STD-883D, Method 2002.3, ms, sine, Mechanical shock 500 G (1) mounted Horizontal T/H (suffix AH) G (1) Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz Horizontal SMD (suffix AS and AZ) G (1) (1) Qualification limit. Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 operating at C free-air temperature, V I V O I O I O (max), C I 2.2 µ C O 100 µ F (unless otherwise noted) PTN78000W PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I O Output current T A natural convection airflow 1.5 A V I Input voltage range Over I O range (1) (2) V Set-point voltage tolerance T A C (3) Temperature variation C to +85 C 0.5% Line regulation Over V I range mV V O Load regulation Over I O range mV Includes set point, line, load Total output voltage variation (3) C T A C V I V 2.5 V I V V I 15.1 V 2.5 V I 2.5 V O Adj Output voltage adjust range V 15.1 V V I V 2.5 12.6 V I V 0.1 x V I 12.6 V I R SET 732 Ω V O V 91% η Efficiency V I R SET k Ω V O V 86% V I R SET 78.7 k Ω V O 3.3 V 82% Output voltage ripple MHz bandwith V O V (PP) I O (LIM) Current limit threshold Δ V O mV 3.2 A µ s load step from 50% to 100% I O max Transient response Recovery time 100 µ s V O over/undershoot 2.5 O V I increasing 5.5 UVLO Undervoltage lockout V V I decreasing 5.2 Input high voltage IH Open (4) V Inhibit control (pin Input low voltage IL 0.1 0.3 Input low current IL 0.25 mA I I (STBY) Input standby current Pin connected to GND mA F S Switching frequency Over V I and I O ranges 440 550 660 kHz C I External input capacitance Ceramic 2.2 (5) µ F Nonceramic 100 (6) µ F C O External output capacitance Ceramic 200 Equiv. series resistance (nonceramic) (7) m Ω Per Telcordia SR-332, 50% stress, MTBF Calculated reliability 8.9 Hr T A ground benign (1) For output voltages less than the minimum input voltage is V or O whichever is greater. For output voltages of V and higher, the minimum input voltage is O 2.5) See the Application Information section for further guidance. (2) For output voltages less than 3.6 the maximum input voltage is V O See the Application Information section for further guidance. (3) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of with with 100 ppm/ C or better temperature stability. (4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltage is typically 1.5 A smal,l low-leakage 100 nA) MOSFET is recommended for control. See the Application Information section for further guidance. (5) An external 2.2- µ F ceramic capacitor is required across the input I and GND) for proper operation. Locate the capacitor close to the module. (6) 100 µ F of output capacitance is required for proper operation. See the Application Information section for further guidance. (7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use m Ω as the minimum when using maximum ESR values to calculate. Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

www.ti.com operating at C free-air temperature, V I V O I O I O (max), C I 4.7 µ C O 100 µ F (unless otherwise noted) PTN78000H PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V O V 0.1 1.5 I O Output current T A natural convection airflow V O V 0.1 1.5 (1) A V O V 0.1 (1) V I Input voltage range Over I O range (2) V Set-point voltage tolerance T A C (3) Temperature variation C to +85 C 0.5% Line regulation Over V I range mV V O Load regulation Over I O range mV Includes set point, line, load Total output voltage (3) variation C T A C V I V 11.85 V I Output voltage adjust V V I V 11.85 V I V O Adj V range V I V 11.85 V I R SET 383 k Ω V O V 91% η Efficiency V I R SET k Ω V O V 93% V I R SET 95.3 Ω V O V 94% Output voltage ripple MHz bandwith V O V (PP) I O (LIM) Current limit threshold Δ V O mV, minimum V I I O(max) A µ s load step from 50% to 100% I O max Transient response Recovery time 200 µ s V O over/undershoot O V I increasing 12.2 UVLO Undervoltage lockout V V I decreasing Input high voltage IH Open (4) V Inhibit control (pin Input low voltage IL 0.1 0.3 Input low current IL 0.25 mA I I (STBY) Input standby current Pin connected to GND mA F S Switching frequency Over V I and I O ranges 440 550 660 kHz C I External input capacitance Ceramic 9.4 (5) µ F Nonceramic 100 (6) µ F External output C O Ceramic 200 capacitance Equiv. series resistance (nonceramic) (7) m Ω Per Telcordia SR-332, 50% stress, MTBF Calculated reliability 8.9 Hr T A ground benign (1) The maximum output current is 1.5 A or the maximum output power is 22.5 whichever is less. (2) For output voltages less than the minimum input voltage is V or O whichever is greater. For output voltages of V and higher, the minimum input voltage is O See the Application Information section for further guidance. (3) The set-point voltage tolerance is affected by the tolerance and stability of R SET The stated limit is unconditionally met if R SET has a tolerance of with with 100 ppm/ C or better temperature stability. (4) This control pin has an internal pullup, and if left open circuit, the module operates when input power is applied. The open-circuit voltage is typically 1.5 A small, low-leakage 100 nA) MOSFET is recommended for control. See the Application Information section for further guidance. (5) Two external 4.7- µ F ceramic capacitors are required across the input I and GND) for proper operation. Locate the capacitor close to the module. (6) 100 µ F of output capacitance is required for proper operation. See the Application Information section for further guidance. (7) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use m Ω as the minimum when using maximum ESR values to calculate. Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

(Top□View) PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 TERMINAL FUNCTIONS TERMINAL I/O NO. This is the common ground connection for the V I and V O power connections. It is also the V dc GND I/O reference for the Inhibit and V O Adjust control inputs. V I I The positive input voltage power node to the module, which is referenced to common GND. The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-level ground signal to this input disables the module s output and turns off the output voltage. When the Inhibit I Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module will produce an output whenever a valid input source is applied. A resistor must be connected between this pin and GND (pin to set the output voltage. If left open-circuit, the output voltage defaults to its minimum adjust value. The temperature stability of the V O Adjust O resistor should be 100 ppm/ C (or better). The PTN78000W set-point range is 2.5 V to 12.6 The PTN78000H set-point range is 11.85 V to The standard resistor value for a number of common output voltages is provided in the application information. V O O The regulated positive power output with respect to the GND node. Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

(7-V INPUT) (1) (2) 100 Efficiency − % IO − Output Current − A VO = 2.5 V VO = 5 V VO = 3.3 V IO − Output Current − A − Output Voltage Ripple − mVV O PP VO = 2.5 V VO = 3.3 V VO = 5 V 60□LFM Airflow: Nat□conv I O -□Output□Current□- A V /c1635□VOTemperature□Derating□- C 0.2 0.4 0.6 0.8 − Power Dissipation − WPD IO − Output Current − A VO = 2.5 V VO = 3.3 V VO = 5 V PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com EFFICIENCY OUTPUT VOLTAGE RIPPLE vs vs OUTPUT CURRENT OUTPUT CURRENT Figure Figure POWER DISSIPATION TEMPERATURE DERATING vs vs OUTPUT CURRENT OUTPUT CURRENT Figure Figure (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer s maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

(15-V INPUT) (1) (2) 100 IO − Output Current − A − Output Voltage Ripple − mVV O PP VO = 2.5 VVO = 3.3 V VO = 9 V VO = 12 V VO = 5 V 100 Efficiency − % IO − Output Current − A VO = 12 V VO = 9 V VO = 2.5 V VO = 5 V VO = 3.3 V 0.3 0.6 0.9 1.2 1.5 − Power Dissipation − WPD IO − Output Current − A VO = 5 V VO = 9 V VO = 3.3 V VO = 2.5 V VO = 12 V 200□LFM Nat□conv IO -□Output□Current□- A 60□LFM 120□LFM Temperature□Derating□- C V /c1635□VO Airflow: Nat□conv I O -□Output□Current□- A Temperature□Derating□- C V =□12□VO PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure Figure Figure TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT OUTPUT CURRENT Figure Figure (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer s maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure and Figure Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

(24-V INPUT) (1) (2) 100 Efficiency□-□% I -□Output□Current□- AO VO =□15□VVO =□12□V VO =□3.3□V VO =□5□V VO =□2.5□V 100 120 140 I -□Output□Current□- AO V -□Output□Voltage□Ripple□-□mV O PP VO =□2.5□V VO =□3.3□V VO =□5□V VO =□12□V VO =□15□V 0.5 1.5 P -□Power□Dissip ation□-□W D I -□Output□Current□- AO VO =□12□V VO =□9□V VO =□5□V VO =□3.3□V VO =□2.5□V IO-□Output□Current□- A 60□LFM 200□LFM 120□LFM V =□5□VO Nat□conv Temperature□Derating□- C IO-□Output□Current□- A 200□LFM Nat□conv 60□LFM 120□LFM V =□3.3□VOTemperature□Derating□- C IO-□Output□Current□- A 60□LFM 200□LFM 120□LFM V =□12□VO Nat□conv Temperature□Derating□- C I -□Output□Current□- AO 200□LFM Nat□conv 60□LFM 120□LFM V =□15□VOTemperature□Derating□- C I -□Output□Current□- AO Temperature□Derating□- C V =□18□VO 60□LFM Nat□conv 200□LFM 120□LFM PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 10. Figure 11. Figure 12. TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 13. Figure 14. Figure 15. TEMPERATURE DERATING TEMPERATURE DERATING vs vs OUTPUT CURRENT OUTPUT CURRENT Figure 16. Figure 17. (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer s maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure through Figure Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

(32-V INPUT) (1) (2) 100 150 200 250 I -□Output□Current□- AO V -Output□Voltage□Ripple□-□mV O PP V =□22□VO V =□12□VO V =□5□VO V =□3.3□VO V =□9□VO 0.5 1.5 2.5 VO =□12□V VO =□5□V VO =□3.3□V VO =□15□V V =□22□VO I -□Output□Current□- AO P -□Power□Dissipation□-□WD 100 Efficiency□-□% I -□Output□Current□- AO V =□3.3□VO V =□5□VO V =□12□VO V =□22□VO V =□15□VO 200□LFM 60□LFM 120□LFM V =□3.3□VO Nat□conv I -□Output□Current□- AO Temperature□Derating□- C 200□LFM Nat□conv I -□Output□Current□- AO Temperature□Derating□- C 120□LFM 60□LFM V =□5□VO 200□LFM Nat□conv I -□Output□Current□- AO 120□LFM 60□LFM V =□12□VOTemperature□Derating□- C I -□Output□Current□- AO Temperature□Derating□- C V =□18□VO 200□LFM 60□LFM 120□LFM Nat□conv 200□LFM 60□LFM 120□LFM Nat□conv V =□15□VO I -□Output□Current□- AO Temperature□Derating□- C 0 0.2 0.4 0.6 1 0.8 I -□Output□Current□- AO Temperature□Derating□- C V =□22□VO Nat□conv 60□LFM 120□LFM 200□LFM PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 18. Figure 19. Figure 20. TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 21. Figure 22. Figure 23. TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING vs vs vs OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT Figure 24. Figure 25. Figure 26. (1) The electrical characteristic data has been developed from actual products tested at This data is considered typical for the converter. Applies to Figure Figure and Figure (2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer s maximum operating temperatures. Derating limits apply to modules soldered directly to a 100-mm x 100-mm, double-sided PCB with oz. copper. For surface mount packages, multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to Figure through Figure Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

R =□54.9□kSET /c87 /c180 1.25 V V -□VO min -□RP (1) Input Voltage Considerations PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com A resistor must be connected between the V O Adjust control (pin and GND (pin to set the output voltage. The adjustment range is from 2.5 V to 12.6 V for PTN78000W. The adjustment range is from 11.85 V to V for PTN78000H. If pin is left open, the output voltage defaults to the lowest value. Table gives the preferred value of the external resistor for several standard voltages, with the actual output voltage that the value provides. For other output voltages, the value of the required resistor can be calculated using Equation and the constants for the applicable product in Table Alternatilvey, R SET can be simply selected from the range of values given in Table Figure shows the placement of the required resistor. Table R SET Formula Constants PRODUCT V MIN (V) R P Ω PTN780x0W 2.5 6.49 PTN780x0H 11.824 6.65 The PTN78000 is a step-down switching regulator. In order that the output remains in regulation, the input voltage must exceed the output by a minimum differential voltage. (Please refer to the input voltage range requirements in the electrical characteristics table.) Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the maximum advisable ratio between the regulator input and output voltage magnitudes. As an example, for satisfactory performance, the operating input voltage range of the PTN78000x must adhere to the following requirements. For PTN78000W output voltages lower than the minimum input voltage is O V or whichever is higher. For PTN78000W output voltages equal to V and higher, the minimum input voltage is O 2.5 V For PTN78000W, the maximum input voltage is (10 x V O or whichever is less. For PTN78000H output voltages lower than the minimum input voltage is O V or whichever is higher. For PTN78000H output voltages equal to V and higher, the minimum input voltage is O V Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

0.05 W CI (Ceramic) CO (Required) PTN78000W 1 4 AdjGND VOVI

2.2 F/c109 100 F/c109

www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 As an example, Table gives the operating input voltage range for the common output bus voltages. In addition, the Electrical Characteristics define the available output voltage adjust range for various input voltages. Table Standard Values of R SET for Common Output Voltages R SET V O V O Operating PRODUCT (Standard Value) (Required) (V) (Actual) (V) V I Range (V) Ω 2.5 Open 2.5 to 3.3 78.7 3.306 to PTN780x0W 4.996 to 0.732 12.002 14.5 to 383 12.000 to 14.994 to PTN780x0H 4.42 18.023 to 0.0953 21.998 to (1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/ C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins and using dedicated PCB traces. (2) Never connect capacitors from V O Adjust to GND or V O Any capacitance added to the V O Adjust pin affects the stability of the regulator. Figure 27. PTN78000W V O Adjust Resistor Placement Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

www.ti.com Table PTN78000W Output Voltage Set-Point Resistor Values V O (V) R SET Ω V O (V) R SET Ω V O (V) R SET Ω V O (V) R SET Ω 2.50 Open 3.7 50.7 6.1 12.6 9.0 4.07 2.55 1370 3.8 46.3 6.2 12.1 9.2 3.75 2.60 680 3.9 42.5 6.3 11.6 9.4 3.46 2.65 451 4.0 39.3 6.4 11.1 9.6 3.18 2.70 337 4.1 36.4 6.5 10.7 9.8 2.91 2.75 268 4.2 33.9 6.6 10.2 10.0 2.66 2.80 222 4.3 31.6 6.7 9.85 10.2 2.42 2.85 190 4.4 29.6 6.8 9.47 10.4 2.20 2.90 165 4.5 27.8 6.9 9.11 10.6 1.98 2.95 146 4.6 26.2 7.0 8.76 10.8 1.78 3.00 131 4.7 24.7 7.1 8.43 11.0 1.58 3.05 118 4.8 23.3 7.2 8.11 11.2 1.40 3.10 108 4.9 22.1 7.3 7.81 11.4 1.22 3.15 99.1 5.0 21.0 7.4 7.52 11.6 1.05 3.20 91.5 5.1 19.9 7.5 7.24 11.8 0.889 3.25 85.0 5.2 18.9 7.6 6.97 12.0 0.734 3.30 79.3 5.3 18.0 7.7 6.71 12.2 0.585 3.35 74.2 5.4 17.2 7.8 6.46 12.4 0.442 3.40 69.8 5.5 16.4 7.9 6.22 12.6 0.305 3.45 65.7 5.6 15.6 8.0 5.99 3.50 62.1 5.7 15.0 8.2 5.55 3.55 58.9 5.8 14.3 8.4 5.14 3.60 55.9 5.9 13.7 8.6 4.76 3.65 53.2 6.0 13.1 8.8 4.40 Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 Table PTN78000H Output Voltage Set-Point Resistor Values V O (V) R SET Ω V O (V) R SET Ω V O (V) R SET Ω 11.85 2633 13.50 34.3 17.20 6.12 11.90 896 13.65 30.9 17.40 5.66 11.95 538 13.80 28.1 17.60 5.23 12.00 383 13.95 25.6 17.80 4.83 12.10 242 14.10 23.5 18.00 4.46 12.15 204 14.25 21.6 18.20 4.11 12.20 176 14.40 19.9 18.40 3.79 12.25 154 14.55 18.5 18.60 3.48 12.30 138 14.70 17.2 18.80 3.19 12.35 124 14.85 16.0 19.00 2.91 12.40 113 15.00 14.9 19.20 2.65 12.45 103 15.15 13.9 19.40 2.41 12.50 94.9 15.30 13.1 19.60 2.18 12.55 87.9 15.45 12.3 19.80 1.95 12.60 81.8 15.60 11.5 20.00 1.74 12.65 76.4 15.75 10.8 20.20 1.54 12.70 71.7 15.90 10.2 20.40 1.35 12.75 67.5 16.05 9.59 20.60 1.17 12.80 63.7 16.20 9.03 20.80 0.995 12.85 60.2 16.35 8.51 21.00 0.829 12.90 57.1 16.50 8.03 21.20 0.669 12.95 54.3 16.65 7.57 21.40 0.516 13.00 51.7 16.80 7.14 21.80 0.229 13.05 49.3 17.10 6.36 22.00 0.09 Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

www.ti.com ADJUST POWER MODULES The minimum requirement for the input of PTN78000W is 2.2 µ F of ceramic capacitance. The dielectric may be either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch (1,27 cm) of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to the required ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least 650 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at the input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in addition to the minimum required capacitance. Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum voltage rating of x (maximum dc voltage ac ripple). The rating is standard practice for regular tantalum capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximum rating of typically These can be used with input voltages up to The minimum requirement for the input of PTN78000H is 4.7 µ F of ceramic capacitance. The dielectric may be either an X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch (1,27 cm) of the regulator input pins. Electrolytic capacitors can be used at the input, but only in addition to the required ceramic capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least 350 mArms. The ripple current rating of electrolytic capacitors is a major consideration when they are used at the input. This ripple current requirement can be reduced by placing more ceramic capacitors at the input, in addition to the minimum required capacitance. Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum voltage rating of x (maximum dc voltage ac ripple). The rating is standard practice for regular tantalum capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable and are available with a maximum rating of typically These can be used with input voltages up to The minimum capacitance required to insure stability is a 100 µ Either ceramic or electrolytic-type capacitors can be used. The minimum ripple current rating for the nonceramic capacitance must be at least 150 mA rms. The stability of the module and voltage tolerances will be compromised if the capacitor is not placed near the output bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A ceramic capacitor can be also be located within 0.5 inch (1,27 cm) of the output pin. For (sudden changes in load current), the regulator response improves with additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These capacitors provide decoupling over the frequency range, kHz to 150 kHz. Aluminum electrolytic capacitors are suitable for ambient temperatures above For operation below tantalum or OS-CON type capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than m Ω (17 m Ω using the manufacturer's maximum ESR for a single capacitor). A list of capacitors and vendors are identified in Table and Table the recommended capacitor tables. Above 150 kHz the performance of aluminum electrolytic capacitors becomes less effective. To further reduce the reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added. Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator. When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance does not exceed 200 µ Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 Tantalum type capacitors may be used at the output, and are recommended for TPS, Sprague 593D/594/595, and Kemet T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not have a stated ESR or surge current rating are not recommended for power applications. When specifying OS-CON and polymer tantalum capacitors for the output, the minimum ESR limit is encountered well before the maximum capacitance value is reached. The capacitor table, Table and Table identifies the characteristics of capacitors from various vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The rms rating and ESR (at 100 kHz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of µ The typical voltage deviation for this load transient is given in the data sheet specification table using the required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the capacitors selected. If the transient performance requirements exceed those specified in the data sheet, the selection of output capacitors becomes more important. Review the minimum ESR in the characteristic data sheet for details on the capacitance maximum. Table Recommended Input/Output Capacitors (PTN78000W) CAPACITOR CHARACTERISTICS QUANTITY C CAPACITOR VENDOR/ EQUIVALENT VENDOR WORKING MAXIMUM PHYSICAL COMPONENT VALUE SERIES INPUT OUTPUT NUMBER VOLTAGE RIPPLE SIZE SERIES µ RESISTANCE BUS BUS (V) CURRENT (mm) (ESR) Ω rms (mA) Panasonic FC (Radial) 180 0.119 850 x EEUFC1H181 FC (SMD) 100 0.150 670 x 10,2 (1) EEVFC1V101P United Chemi-Con PXA (SMD) 180 0.016 4360 x (1) PXA16VC180MF60 LXZ 120 0.160 620 x x 12,5 LXZ50VB121M10X12LL MVY50VC101M10X10TP MVY (SMD) 100 0.300 500 x (1) O 5.5 Nichicon UWG1H101MNR1GS UWG (SMD) 100 0.300 500 x (1) O 5.5 F55 (Tantalum) 100 0.055 2000 7,7 x 4,3 N/R (1) (2) F551A107MN O HD (Radial) 100 0.074 724 x 11,5 UHD1H101MPR (1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the regulator at a higher input voltage, select a capacitor with the next higher voltage rating. (2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage O To operate at a higher output voltage, select a capacitor with a higher voltage rating. Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

www.ti.com Table Recommended Input/Output Capacitors (PTN78000W) (continued) CAPACITOR CHARACTERISTICS QUANTITY C CAPACITOR VENDOR/ EQUIVALENT VENDOR WORKING MAXIMUM PHYSICAL COMPONENT VALUE SERIES INPUT OUTPUT NUMBER VOLTAGE RIPPLE SIZE SERIES µ RESISTANCE BUS BUS (V) CURRENT (mm) (ESR) Ω rms (mA) Sanyo OS-CON 20SVP100M SVP (SMD) 100 0.024 2500 x (3) I and V O SP 100 0.032 2890 (3) 16SP100M I and V O 7,3 x 4,3 x TPSV107M020R0085 100 0.085 1543 N/R (4) 4,1 O AVX Tantalum TPS (SMD) 7,3 x 4,3 x TPSE107M020R0200 100 0.200 817 N/R (4) 4,1 O GRM32ER60J107M Murata X5R Ceramic 6.3 100 0.002 1000 3225 N/R (3) O 5.5 C3225X5R0J107MT TDK X5R Ceramic 6.3 100 0.002 1000 3225 N/R (3) O 5.5 GRM32ER61C476M Murata X5R Ceramic 0.002 1000 3225 (3) I and V O 13.5 C1210C476K9PAC Kemet X5R Ceramic 6.3 0.002 1000 3225 N/R (3) O 5.5 C3225X5R0J476MT TDK X5R Ceramic 6.3 0.002 1000 3225 N/R (3) O 5.5 GRM422X5R476M6.3 Murata X5R Ceramic 6.3 0.002 1000 3225 N/R (3) O 5.5 C3225X7R1E225KT/MT TDK X7R Ceramic 2.2 0.002 1000 SMD (5) I and V O GRM32RR71E225K Murata X7R Ceramic 2.2 0.002 1000 3225 (5) I and V O C1210C225K3RAC Kermet X7R Ceramic 2.2 0.002 1000 3225 (4) I and V O 12103C225KAT2A AVX X7R Ceramic 2.2 0.002 1000 (4) I and V O Kemet X7R Ceramic 0.002 1000 SMD (6) C1210C105K5RAC Murata X7R Ceramic 4.7 0.002 1000 GRM32ER71H475KA88L TDK X7R Ceramic 2.2 0.002 1000 C3225X7R1H225KT Murata X7R Ceramic 0.002 1000 3225 (6) GRM32RR71H105KA01L TDK X7R Ceramic 0.002 1000 3225 (6) C3225X7R1H105KT 5,1 x 7,6 Kemet Radial Through-hole 0.002 1000 (6) C330C105K5R5CA 9,1 Murata Radial Through-hole 2.2 0.004 1000 x RPER71H2R2KK6F03 (3) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the regulator at a higher input voltage, select a capacitor with the next higher voltage rating. (4) Not reccomended (N/R). The voltage rating does not meet the minimum operating limits in most applications. (5) The maximum rating of the ceramic capacitor limits the regulator s operating input voltage to Select a alternative ceramic component to operate at a higher input voltage. (6) A total capacitance of µ F is an acceptable replacement value for a single 2.2- µ F ceramic capacitor. Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 Table Recommended Input/Output Capacitors (PTN78000H) CAPACITOR CHARACTERISTICS QUANTITY C CAPACITOR VENDOR/ EQUIVALENT VENDOR WORKING MAXIMUM PHYSICAL COMPONENT VALUE SERIES INPUT OUTPUT NUMBER VOLTAGE RIPPLE SIZE SERIES µ RESISTANCE BUS BUS (V) CURRENT (mm) (ESR) Ω rms (mA) Panasonic FC (Radial) 100 0.162 615 12,5 EEUFC1H1081 FK (SMD) 150 0.180 670 10,2 EEVFK1H151P FC (SMD) 100 0.150 670 10,2 (1) EEVFC1V101P I United Chemi-Con 25PS100MJ12 PS (Radial) 100 0.020 4320 12,5 (1) I and V O LXZ 120 0.160 620 12,5 LXZ50VB121M10X12LL MVY (SMD) 100 0.300 500 MVY50VC101M10X10TP Nichicon UWG (SMD) 100 0.300 500 UWG1H101MNR1GS F55 (Tantalum) 100 0.055 2000 7,7 4,3 N/R (1) (2) F551A107MN O HD (Radial) 100 0.074 724 11,5 UHD1H101MPR Sanyo OS-CON 20SVP100M SVP (SMD) 100 0.024 2500 (1) I and V O SP 120 0.024 3110 10,5 (1) 20SP120M I and V O GRM32ER61C476M Murata X5R Ceramic 0.002 1000 3225 (1) O 13.5 C3225X7R1E225KT/MT TDK X7R Ceramic 2.2 0.002 1000 SMD (3) I and V O GRM32RR71E225K Murata X7R Ceramic 2.2 0.002 1000 3225 (3) I and V O C1210C225K3RAC Kemet X7R Ceramic 2.2 0.002 1000 3225 (3) I and V O 12103C225KAT2A AVX X7R Ceramic 2.2 0.002 1000 (3) I and V O Kemet X7R Ceramic 0.002 1000 SMD (4) C1210C105K5RAC Murata X7R Ceramic 4.7 0.002 1000 GRM32ER71H475KA88L TDK X7R Ceramic 3.3 0.002 1000 CKG45NX7R1H335M Kemet Radial 5,1 7,6 4.7 0.003 1000 C350C475K5R5CA Through-hole 9,1 Murata Radial 3.3 0.003 1000 12,5 12,5 RPER71H3R3KK6F03 Through-hole (1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the regulator at a higher input voltage, select a capacitor with the next higher voltage rating. (2) The maximum voltage rating of the capacitor must be selected for the desired set-point voltage O To operate at a higher output voltage, select a capacitor with a higher voltage rating. (3) The maximum rating of the ceramic capacitor limits the regulator s operating input voltage to Select a alternative ceramic component to operate at a higher input voltage. (4) A total capacitance of µ F is an acceptable replacement value for a single 2.2- µ F ceramic capacitor Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

V (5□V/div)I I (0.5 A/div)I V (2□V/div)O Undervoltage Lockout Current Limit Protection Overtemperature Protection PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com When configured per the standard application, the PTN78000 power module produces a regulated output voltage following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source. The soft-start circuitry introduces a short time delay (typically ms ms) into the power-up characteristic. This is from the point that a valid input source is recognized. Figure shows the power-up waveforms for a PTN78000W, operating from a 12-V input and with the output voltage adjusted to The waveforms were measured with a 1.5-A resistive load. Figure 28. Power-Up Waveforms The undervoltage lockout (UVLO) circuit prevents the module from attempting to power up until the input voltage is above the UVLO threshold. This prevents the module from drawing excessive current from the input source at power up. Below the UVLO threshold, the module is held off. The PTN78000 modules protect against load faults with a continuous current limit characteristic. Under a load fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds the current limit value causes the module to progressively reduce its output voltage. Current is continuously supplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. When limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the temperature increase is excessive, the module's overtemperature protection begins to periodically turn the output voltage completely off. A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current-limit condition. If the junction temperature of the internal control IC rises excessively, the module turns off, reducing the output voltage to zero. The module instantly restarts when the sensed temperature decreases by a few degrees. Note: Overtemperature protection is a last resort mechanism to prevent damage to the module. It should not be relied on as permanent protection against thermal stress. Always operate the module within its temperature derated limits, for the worst-case operating conditions of output current, ambient temperature, and airflow. Operating the module above these limits, albeit below the thermal shutdown temperature, reduces the long-term reliability of the module. Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

L O A D 1 4 GNDInh Adj C I 2.2 /C0109F Ceramic BSS138 VI = 12 V PTN78000W VI VO VO = 5 V C O 100 /C0109FR SET 21 k/C0087 0.05 W VO (2□V/div) II (0.5 A/div) Q1□VGS (10□V/div) PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 For control, the PTN78000 power module incorporates an output on/off Inhibit control (pin 3). The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to V I with respect to GND. Figure shows the the circuit used to demonstrate the inhibit function. Note the discrete transistor (Q1). Turning on applies a low voltage to the Inhibit control pin and turns the module off. The output voltage decays as the load circuit discharges the capacitance. The current drawn at the input is reduced to typically mA. If is then turned off, the module executes a soft-start power up. A regulated output voltage is produced within ms Figure shows the typical rise in the output voltage, following the turn off of Q1. The turn off of corresponds to the fall in the waveform, V GS The waveforms were measured with a 1.5-A resistive load. Figure 29. On/Off Inhibit Control Circuit Figure 30. Power Up Response From Inhibit Control Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

UDG−05086 VOVI VOVI Inhibit 2.2 µF 50 V Ceramic 2.2 µF 50 V Ceramic (Required) 100 µF (Required) 2.2 µF CeramicR SET VO Adjust π Filters PTN78000W PTN78000H SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 www.ti.com Power modules include internal input and output ceramic capacitors in all their designs. However, some ripple/noise. This application note describes various filters and design techniques found to be successful in reducing both input and output ripple/noise. The easiest way to reduce output ripple and noise is to add one or more µ F ceramic capacitors, such as shown in Figure Ceramic capacitors should be placed close to the output power terminals. A single µ F capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than (Note: is recommended to improve the regulators transient response and does not reduce output ripple and noise.) Switching regulators draw current from the input line in pulses at their operating frequency. The amount of reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power source including the impedance of any input lines. The addition of C1, minimum µ F ceramic capacitor, near the input power pins, reduces reflected conducted ripple/noise by 30% to 50%. Figure 31. Adding High-Frequency Bypass Capacitors To The Input and Output If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π (pi) filter, employing a ferrite bead (Fair-Rite part number 2673000701 or equivalent) in series with the input or output terminals of the regulator reduces the ripple/noise by at least db (see Figure and Figure In order for the inductor to be effective in reduction of ripple and noise ceramic capacitors are required. (Note: see Capacitor Recommendations for the PTN78000W for addtional information on vendors and component suggestions.) These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching frequency (650 kHz MHz). The placement of this filter is critical. It must be located as close as possible to the input or output pins to be efffective. The ferrite bead is small (12,5 mm x mm), easy to use, low cost, and has low dc resistance. Fair-Rite also manufactures a surface-mount bead (part number 2773021447), through hole (part number 2673000701) rated to but in this application, it is effective to A on the output bus. Inductors in the range of µ H to µ H can be used in place of the ferrite inductor bead. Submit Documentation Feedback Copyright 2004 2008, Texas Instruments Incorporated Product Folder Link(s): PTN78000W PTN78000H

UDG−05087 1 µH to 5 µH 1 µH to 5 µH 2.2 µF 50 V Ceramic 2.2 µF 50 V Ceramic (Required) R SET 2.2 µF Ceramic 100 µF (Required) VIVI 0 0.5 1 1.5 2 2.5 3

1 MHz

Attenuation − dB Load Current − A PTN78000W PTN78000H www.ti.com SLTS230C NOVEMBER 2004 REVISED SEPTEMBER 2008 Figure 32. Adding π Filters O Figure 33. π -Filter Attenuation vs. Load Current Copyright 2004 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): PTN78000W PTN78000H

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) PTN78000HAH ACTIVE DIP MOD ULE EUS 5 56 Pb-Free (RoHS) Call TI N / A for Pkg Type PTN78000HAS ACTIVE DIP MOD ULE EUT 5 49 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTN78000HAST ACTIVE DIP MOD ULE EUT 5 250 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTN78000HAZ ACTIVE DIP MOD ULE EUT 5 49 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTN78000HAZT ACTIVE DIP MOD ULE EUT 5 250 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTN78000WAH ACTIVE DIP MOD ULE EUS 5 56 Pb-Free (RoHS) Call TI N / A for Pkg Type PTN78000WAS ACTIVE DIP MOD ULE EUT 5 49 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTN78000WAST ACTIVE DIP MOD ULE EUT 5 250 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTN78000WAZ ACTIVE DIP MOD ULE EUT 5 49 Pb-Free (RoHS) Call TI Level-3-260C-168 HR PTN78000WAZT ACTIVE DIP MOD ULE EUT 5 250 Pb-Free (RoHS) Call TI Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2008 Addendum-Page 1

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