PTN36043 NXP | Alldatasheet

Document overview

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Technical content

  1. General description PTN36043 is a very small, low power 2 differential channel 2 to 1 active multiplex/demultiplexer switch with integrated SuperSpeed USB 3.1 Gen 1 (also known as USB 3.0) redriver IC that can switch two differential signals to one of two locations. The active switch has optimized performance with minimized crosstalk, as required by the high-speed serial interface for USB Type-C connector. PTN36043 allows expansion of existing high-speed ports for very low power consumption. With integrated USB 3.1 Gen 1 redriver, signal q uality is enhanced by performing receive equalization on the deteriorated input signal followed by transmit de-emphasis maximizing system link performance. With its superior differential signal conditioning and enhancement capability, the device delivers significant flexibility and performance scaling for various systems with different PCB characteristics and cable channel conditions and still benefit from optimum power consumption. PTN36043 has built-in advanced power management capability that enables significant power savings under various different USB 3.1 Gen 1 Low-power modes (U2/U3). It can detect link electrical conditions and can dynamically activate/de-activate internal circuitry and logic. The device performs these actions without host software intervention and conserves power. PTN36043 is powered from a 1.8 V supply and is available in a small DHX2QFN18 2. Features and benefits  2 bidirectional differential channel, 2 : 1 multiplex/demultiplexer switch, supports USB

3.1 Gen 1 specification (SuperSpeed only)

 Compliant to SuperSpeed USB 3.1 Gen 1 standard  Pin out data flow matches USB Type -C connector pin assignments  Two control pins for each channel to select optimized signal conditions  Receive equa lization on each channel to recover from InterSymbol Interference (ISI) and high-frequency losses, with provision to choose equalization gain settings per channel  Transmit de-emphasis on each channel delivers pre-compensation suited to cha nnel conditions  Output swing adju stment  Integrated termination resistors provide impedance matching on both transmit and receive sides  Automatic receiver t ermination detection  Low active power: 203 mW/113 mA (typical) for VDD = 1.8 V PTN36043 USB Type-C SuperSpeed active switch Rev. 2 — 19 February 2018 Product data sheet

4.1 Ordering options

Table 1. Ordering information Table 2. Ordering options

10000 Tamb = 40 C to +85 C

Product data sheet Rev. 2 — 19 February 2018 3 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 5. Block diagram Fig 1. Block diagram of PTN36043 aaa-017471 PTN36043 VDD = 1.8 V EMPHASIS FILTER DEVICE CONTROL AND MANAGEMENT SIGNAL DETECTION RX_AP_+ RX_AP_− TX_AP_+ TX_CON_1+ TX_CON_1− TX_CON_2+ TX_CON_2− RX_CON_1+ RX_CON_1− RX_CON_2+ RX_CON_2− TX_AP_− EMPHASIS FILTER SEL CH1_SET1 CH1_SET2 CH2_SET1 CH2_SET2 equalizer SIGNAL DETECTION line driver equalizer RX TERMINATION DETECTION line driver RX TERMINATION DETECTION line driver equalizer

6.1 Pinning

6.2 Pin description

14 TX_AP_-

Table 3. Pin description

thru low ohmic resistor (50 ). thru low ohmic resistor (50 ). Table 3. Pin description …continued

Refer to Figure 1 “Block diagram of PTN36043”. flexible and versatile enough for use under a variety of system environments.

7.1 Receive equalization, transmitter de-emphasis and output swing level

gains prepare the system to cover up to losses further down the link. Table 5 lists DE/OS/EQ configuration options of the channel toward connector side. Table 4. Application Processor side DE/OS/EQ configuration options

7.2 Device states and power management

  • Active state wherein device is fully operational, USB data is transported on either port 1 or port 2 in Figure 1. In this state, USB connection exists and the Receive Termination indication remains active. But there is no need for Receive Termination detection.
  • Power-saving state wherein either port 1 or port 2 is kept enabled. In this state, squelching, detection and/or Receive termination detection circuitry are active. Based on USB connection, there are two possibilities: – No USB connect ion. – A USB connection exists and the link is in USB 3.1 Gen 1 U2/U3 mode.
  • Off state when PTN36043 is not being powered (i.e., VDD1V8 = 0 V), special steps shou ld be done to prevent back-current issues on control pins such SEL or CH1/2_SET1/2 pins when these pins' states are not low. These pins can be controlled through two different ways. – pull-up/pull-down resistors - make sure these pull-up resistors' VDD is the same p ower source as to power PTN36043. When power to PTN36043 is off, power to these pull-up resistors will be off as well. – external processor's GPIO - if PTN36043 is turned off when the external processor's power stays on, processor should configure these GPIOs connected to these control pins as output low (< 0.4 V) or tri-state mode (configure GPIOs as input mode). This will make sure no current will be flowing into PTN36043 through these control pins.

Table 5. Connector side DE/OS/EQ configuration options

7.3 SEL input pin

and RX_CON_2± by changing the SEL input state.

  1. Application guideline for Contro l of CHx_SETx and SEL input pins

For all control pins except SEL, all 3 pin conditions are applicable. unconnected (OPEN), the internal logic treats it as LOW. external pull-up resistor is 30 k. Table 6. SEL input setting

0 TX_CON_2± and RX_CON_2± are connected to TX_AP_± and RX_AP_±

TX_CON_1± and RX_CON_1± are connected to VDD thru low ohmic resistor (50 ).

1 TX_CON_1± and RX_CON_1± are connected to TX_AP_± and RX_AP_±

TX_CON_2± and RX_CON_2± are connected to VDD thru low ohmic resistor (50 ).

[1] All voltage values (except differential voltages) are with respect to network ground terminal. atic Discharge Association, Rome, NY, USA. Electrostatic Discharge Association, Rome, NY, USA.

  1. Recommended operating conditions

Table 7. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 8. Operating conditions

11.1 Device characteristics

Table 9. Device characteristics

Product data sheet Rev. 2 — 19 February 2018 11 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch Fig 3. Propagation delay Fig 4. LFPS electrical idle transitions in U0/U1 modes in tPD(dif) 002aag025 out tPD(dif) td(idle-act) 002aag026 VDC_CM VDC_CM td(act-idle) IN+ IN− OUT+ OUT− V SQTH Fig 5. U2/U3 exit behavior channel A, RX channel A, TX channel B, RX channel B, TX block active td(pwrsave-act) 002aag028 U2 exit LFPS U2 exit LFPS RECOVERY RECOVERY U2 exit handshake LFPS U2 exit handshake LFPS RECOVERY RECOVERY

11.2 Receiver AC/DC characteristics

Table 10. Receiver AC/DC characteristics

1250 MHz to 2500 MHz 8 10 - dB

2500 MHz to 3000 MHz 7 9 - dB

11.3 Transmitter AC/DC characteristics

Table 11. Transmitter AC/DC characteristics

2500 MHz to 3000 MHz 9 10 - dB

11.4 Ternary control inputs

[1] See Section 8 for application guidelines for the Ternary control pins. Table 12. Ternary control inputs CHx_SETx characteristics [1] Table 13. Ternary control input SEL characteristics [1]

[1] See Section 8 for application guidelines for the Ternary control pins. Table 13. Ternary control input SEL characteristics [1] …continued

Product data sheet Rev. 2 — 19 February 2018 16 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 12. Package outline Fig 7. Package outline SOT1442-1 (DHX2QFN18) 5HIHUHQFHV2XWOLQH YHUVLRQ (XURSHDQ SURMHFWLRQ ,VVXHGDWH ,(& -('(& -(,7$ 627 VRWBSR 8QLW PP PD[ QRP PLQ 'LPHQVLRQV PPDUHWKHRULJLQDOGLPHQVLRQV $ $ /' ( K HH E K H Y NZ N $ $ VFDOH PP GHWDLO; WHUPLQDO LQGH[DUHD WHUPLQDO LQGH[DUHD H $&%‘Y &‘ZE H H \\&\\ H '+;4)1 SODVWLFGXDOLQOLQHFRPSDWLEOHWKHUPDOHQKDQFHGVXSHUWKLQTXDGIODWSDFNDJH QROHDGV WHUPLQDOV ERG\\[[PP 627

Product data sheet Rev. 2 — 19 February 2018 17 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 13. Packing information

13.1 SOT1442-1 (DHXQFN18); Reel dry pack, SMD, 13" Q1/T1 standard

product orientation; Orderable part number ending ,518 or Y; Ordering code (12NC) ending 518

13.1.1 Packing method

Fig 8. Reel dry pack for SMD DDD 5HODWLYHKXPLGLW\\ LQGLFDWRU %DUFRGHODEHO %DJ (6'SULQW 0RLVWXUHFDXWLRQ SULQW 'U\\DJHQW 'U\\SDFN,'VWLFNHU 6SDFHIRUDGGLWLRQDO ODEHO 3UHSULQWHG(6' ZDUQLQJ %DUFRGHODEHO %DUFRGHODEHO (6'HPERVVHG 5HHODVVHPEO\\ 3ULQWHGSODQRER[ *XDUGEDQG 7DSH &RYHUWDSH &LUFXODUVSURFNHWKROHVRSSRVLWHWKH ODEHOVLGHRIUHHO &DUULHUWDSH 4$VHDO 3ULQWHGSODQRER[

[1] d = reel diameter; w = tape width. [2] Packing quantity dependent on specific product type. View ordering and availability details at NXP order portal, or contact your local NXP representative.

13.1.1.1 Product orientation

13.1.1.2 Carrier tape dimensions

Table 14. Dimensions and quantities Table 15. Carrier tape dimensions In accordance with IEC 60286-3.

13.1.1.3 Reel dimensions

Table 16. Reel dimensions In accordance with IEC 60286-3.

13.1.1.4 Barcode label

Table 17. Barcode label dimensions

Product data sheet Rev. 2 — 19 February 2018 21 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”.

14.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.

14.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:

  • Through-hole components
  • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless pa ckages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an inc reased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by compon ent placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
  • Board specifications, including the board finish, solder masks and vias
  • Package footprints, including solder thieves and orientation
  • The moisture sensitivity level of the packages
  • Package placement
  • Inspection and repair
  • Lead-free soldering versus SnPb soldering

14.3 Wave soldering

Key characteristics in wave soldering are:

  • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave
  • Solder bath specifications, including temperature and impurities

14.4 Reflow soldering

  • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 13) than a SnPb process, thus reducing the process window
  • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board
  • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 18 and 19 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow solder ing, see Figure 13.

Table 18. SnPb eutectic process (from J-STD-020D) Table 19. Lead-free process (from J-STD-020D)

Product data sheet Rev. 2 — 19 February 2018 23 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. MSL: Moisture Sensitivity Level Fig 13. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature

Product data sheet Rev. 2 — 19 February 2018 24 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 15. Soldering Fig 14. PCB footprint for SOT1442-1 (DHX2QFN18); reflow soldering 18X (0.2) 18X (0.3) ( 0.2) typ via 14X (0.4) (2.1) (1.7) (0.45) (1) (1.4) SYMM 5 9 1418 SYMM aaa-021290 0.05 min all around 0.05 max all around land pattern example scale: 25x; all dimensions are in mm solder mask opening metal under solder mask solder mask defined metal solder mask opening non solder mask defined (preferred)

Product data sheet Rev. 2 — 19 February 2018 25 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch Fig 15. Solder paste example 18X (0.2) 18X (0.3) metal typ 14X (0.4) (2.1) (1.7) (0.95) (1.3) 5 9 1418 SYMM solder paste example, based on 0.1 mm thick stencil exposed pad, 88 % printed solder coverage by area scale: 30x; all dimensions are in mm SYMM aaa-021333

Table 20. Abbreviations Table 21. Revision history

Product data sheet Rev. 2 — 19 February 2018 27 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch 18. Legal information

18.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of mu ltiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

18.2 Definitions

Draft — The document is a draft version only . The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

18.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable fo r any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoe ver, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes t o information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authori zed or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these product s are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and product s using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liabili ty related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors product s are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or constr ued as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specificati on for product development. Preliminary [short] data sheet Qualification This document contains data from t he preliminary specification. Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 2 — 19 February 2018 28 of 29 NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch Export control — This document as well as the item(s) described herein may b e subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly stat es that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for refe rence only. The English version shall prevail in case of any discrepancy between the translated and English versions.

18.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors PTN36043 USB Type-C SuperSpeed active switch © NXP Semiconductors N.V. 2018. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 19 February 2018 Document identifier: PTN36043 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 20. Contents

7.1 Receive equalization, transmitter de-emph

8 Application guideline for Control of CHx_SETx

13.1 SOT1442-1 (DHXQFN18); Reel dry pack, SMD,

13" Q1/T1 standard product orientation; Orderable part number ending ,518 or Y; Ordering