PTN3222 NXP | Alldatasheet

Document overview

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Technical content

Datasheet sections

  • 1 General description
  • 2 Features and benefits
  • 3 Applications
  • 4 Ordering information
  • 4.1 Ordering options
  • 4.2 Top side marking
  • 5 Functional diagram
  • 6 Pinning information
  • 6.1 Pinning
  • 6.2 Pin description
  • 7 Functional description
  • 7.1 Reset
  • 7.2 Operating modes
  • 7.3.1 Over-Voltage Protection on USB2 DP/DN
  • 7.5 I2C operation
  • 7.5.1 I2C target address
  • 7.5.2 Example of writing one or more registers
  • 7.5.3 Example of reading one or more registers
  • 8 System application
  • 8.1 Use cases
  • 8.2 Power supply requirement
  • 8.3 Ground requirement
  • 8.4 ESD requirements
  • 9 Register set
  • 9.1 Register overview
  • 9.2 I2C registers and descriptions
  • 9.2.1 Functional registers
  • 10 Limiting values
  • 11 Recommended operating conditions
  • 12 Characteristics
  • 12.1 Device characteristics
  • 12.2 USB2 and eUSB2 characteristics
  • 12.3 I2C dynamic/static
  • 12.4 ADDR pin characteristics
  • 12.5 RST_N pin characteristics
  • 13 Package outline
  • 13.1 SOT2063-1 (WLCSP12)
  • 13.2 SOT2074-1 (XQFN12)
  • 13.3 UBM stack-up information
  • 14 Packing information
  • 14.1 SOT2063-1 WLCSP12, wafer level chip
  • 14.1.1 Dimensions and quantities
  • 14.1.2 Product orientation
  • 14.1.3 Carrier tape dimensions
  • 14.2 SOT2074-1 XQFN12 ; Reel NDP, SMD, 13"
  • 14.2.1 Dimensions and quantities
  • 14.2.2 Product orientation
  • 14.2.3 Carrier tape dimensions
  • 15 Abbreviations
  • 16 References
  • 17 Revision history
  • 18 Legal information

1-port eUSB2 to USB2 redriver Rev. 1.2 — 11 August 2023 Product data sheet

1 General description

PTN3222 is a 1-port eUSB2 to USB2 redriver IC that performs translation between eUSB2 and USB2 signaling schemes. It is meant to be used in systems that have eUSB2 interface on one side and USB2 interface on the other side. It supports host repeater, device repeater or dual role repeater function. PTN3222 implements Repeater mode (eUSB2 to USB2 redriver) and it supports Link Power management features. PTN3222 is targeted to be USB2 compliant and eUSB2 conformant. It supports all three speeds/data rates: Low Speed (1.5 Mbps), Full Speed (12 Mbps) and High Speed (480 Mbps). PTN3222 provides a target I2C register interface to initialize the required functionality and features as per the platform application need. The I2C target address is selectable using a quaternary input pin (that selects one of the four addresses). The RST_N pin is used to reset the IC without power cycling. It is powered by two power supplies (VDD3V3, VDD1V8) and is available in a small thin WLCSP12 package pitch).

2 Features and benefits

  • 1-port eUSB2 to USB2 redriver functionality
  • Conforms to USB2 specification along with relevant ECNs
  • Conforms to eUSB2 specification v1.1
  • Supports host only repeater, device only repeater and dual mode repeater role
  • Supports all USB2.0 data rates – Low speed operation (1.5 Mbps) – Full speed operation (12 Mbps) – High speed operation (480 Mbps)
  • Supports RAP accesses for a select set of register accesses
  • Integrated and selectable pullup and pulldown resistors on both eUSB2 and USB2 ends
  • Signal Integrity (SI) configurability – eUSB2 – Tx de-emphasis, Rx equalization, Rx squelch threshold, Tx output swing – USB2 – HS disconnect detection threshold, Rx squelch threshold, Rx termination, Rx equalization, Tx de- emphasis, Tx slew rate, Tx output swing
  • Supports BC1.2 power provider CDP configuration capability in host mode
  • Low current consumption – Supports eUSB2 and USB2 power management – Implements Deep standby mode for lowest power consumption
  • Robustness features – USB2 data pins tolerate 5.5 V (DC) for 24 hours – USB2 data pins withstand short to GND for 24 hours – USB2 data pins withstand collision on DP/DN pins due to faulty USB devices
  • GPIOs and high speed data pins are backpower safe
  • I2C target interface supports standard mode, fast mode and fast mode plus
  • Power supplies - VDD3V3, VDD1V8
  • ESD HBM 2 kV CDM 500 V
  • Operating ambient temperature range -40 °C to +85 °C
  • Available in WLCSP12 and QFN12 package

3 Applications

  • eUSB2 to USB2 repeater function in platforms (e.g. hosts, devices, hubs, routers, protocol bridges, etc.) with Standard A/ Standard B/ Micro-B/USB Type-C connector scenarios – Host only repeater – Device only repeater – Dual role repeater (as determined dynamically in the application)

4 Ordering information

Table 1. Ordering information

4.1 Ordering options

8000 Tamb = -40 °C to 85 °C

Table 2. Ordering options

4.2 Top side marking

1 Pin 1 dot Pin 1 indicationLine A

  • "22": Production silicon Line B 1-3 Production information Lot ID 1-2 Production information Lot IDLine C

3 Production information Wafer number

Table 3. Top side marking for WLCSP package Table 4. Top side marking for QFN package PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

  • "22": Production silicon Line B 1-3 Production information Lot ID 1-2 Production information Lot IDLine C

Table 4. Top side marking for QFN package...continued

5 Functional diagram

Figure 1. Functional block diagram PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

6 Pinning information

6.1 Pinning

Figure 2. PTN3222 WLCSP pinning (transparent top view) Figure 3. PTN3222 QFN pinning (transparent top view)

6.2 Pin description

Table 5. Pin description PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 5. Pin description...continued

7 Functional description

  • eUSB2 repeater
  • BC1.2 support
  • I2C interface
  • Reset schemes

7.1 Reset

  • POR
  • Software reset
  • RST_N pin When in reset, PTN3222’s SCL and SDA IO pins are in high impedance state to prevent the I2C bus from being altered or corrupted in any way. All three reset schemes clear I2C registers but Software reset and RST_N pin do not reset digital circuity related to RST_N pin function itself. PTN3222 remains in the mode specified in OTP after exiting reset. When in reset, PTN3222’s SCL and SDA IO pins are in high impedance state such that the I2C bus is not altered or corrupted in any way. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023

7.2 Operating modes

that are kept powered in different modes. Table 6. Status of design blocks in different power modes resistors enabled under all situations. transition and associated arcs that enable role change. Figure 4. PTN3222 role transition Figure 5 illustrates the eUSB2 Host repeater usage in a typical Host platform application. topology) and on the system side, it interfaces with host controller w/eUSB2 PHY. Figure 5. PTN3222 as eUSB2 Host repeater Figure 6 illustrates the eUSB2 Device repeater usage in a typical peripheral environment. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 6. PTN3222 as eUSB2 Peripheral repeater various operating modes. It supports USB Link Power Management and supports L1 and L2 power states. avoid register overwrites leading to incorrect behavior and response from PTN3222. customer I2C registers are accessible.

7.3.1 Over-Voltage Protection on USB2 DP/DN pins

  1. PTN3222 checks DP/DN pin(s) for over voltage condition that is higher than VOVP,Th (Low to High Threshold
  2. PTN3222 enables USB2 analog IO path once the pin voltage falls below VOVP,Th (High to Low Threshold
  3. The SoC host and eUSB2 redriver would lose communication with the USB2 entity since the analog path
  4. So, the SoC host may try the following options to reestablish the link

with a downside of longer time duration to reestablish the link. a USB connect event and reset this I2C configuration bit. enabling of this feature in device repeater mode. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

7.5 I2C operation

reserved locations as indicated in the register map. whether a given address has a definition in the register map. conditions. PTN3222 does not inhibit other types of transactions as prescribed in I2C specification.

7.5.1 I2C target address

based on the quaternary address selection pin (ADDR). Table 7. PTN3222 target address definition

7.5.2 Example of writing one or more registers

  1. I2C controller asserts START condition or repeated-START condition
  2. Controller addresses PTN3222 target interface with R/W bit set as “Write”
  3. Target acknowledges the request by asserting an ACK
  4. Controller writes the desired starting register address
  5. Target acknowledges the register address with ACK, even if register address is not part of the defined
  6. Controller writes the data for that register address and the target updates the register value once all 8 bits of
  7. Target acknowledges the data with an ACK

PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

  1. If the controller wishes to write to the next consecutive register address, it supplies another data byte, which

Figure 7. Writing one or more consecutive registers

7.5.3 Example of reading one or more registers

  1. Controller asserts START condition or repeated-START condition
  2. Controller addresses PTN3222’s target address with R/W bit set as “Write”
  3. Target acknowledges the request by asserting ACK
  4. Controller writes the desired starting register address
  5. Target acknowledges the register address with ACK, even if the register address is not part of the defined
  6. Controller issues a repeated-START condition
  7. Controller addresses PTN3222’s target address with R/W bit set as “Read”
  8. In the following clock pulses, the target clocks out the value of the requested register
  9. If controller wishes to read the next consecutive register, it issues an ACK and then provides another set of

space, the target can return undefined data value of 0xFF.

  1. When the controller does not wish to read additional consecutive registers, it supplies a NACK in response

to the final register value it wishes to read and then issues a STOP or repeated-START condition. Figure 8. Reading one or more consecutive registers

8 System application

8.1 Use cases

PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 11. Use case 3 – Interfacing via passive switch

8.2 Power supply requirement

limits are specified in Section 11. PTN3222 does not suffer from backpower issue (VDD node getting powered via a non-power pin). The power supply decoupling capacitors shall be soldered close to power pins.

8.3 Ground requirement

PTN3222 has two ground pins, AGND and DGND. Both pins provide connection to GND plane with low ground noise in the application PCB.

8.4 ESD requirements

PTN3222 supports 2 kV HBM and 500 V CDM on all pins. To achieve system level ESD protection (e.g. ESD diodes shall be used near the connector. Matching of diodes is important to minimize DP/DN skew.

9 Register set

Table 8. Register type definitions PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

9.1 Register overview

Table 9 lists all the registers used for PTN3222. Default POR values of registers are also shown in this table. Table 9. Register overview

9.2 I2C registers and descriptions

9.2.1 Functional registers

PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 10. Register 0x00 – Reserved software reset and this bit automatically clears to ‘0’. All R/W registers are reset to POR settings. Table 11. Register 0x01 – RESET CONTROL managed via Host eUSB2 exchanges. acknowledge the configuration message from the host.

3 RSVD RAZ b'0 Reserved

Table 12. Register 0x02 – LINK CONTROL 1 PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

acted upon only at the time the write occurs to this register. the eUSB/USB2 bus conditions. Table 12. Register 0x02 – LINK CONTROL 1...continued

0 Force ESE1 RW b'0 Bit to force Extended SE1 signaling

extended SE1 onto the eUSB pins. Table 13. Register 0x03 – LINK CONTROL 2 PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 14. Register 0x04 – eUSB2 RX CONTROL Table 15. Register 0x05 – eUSB2 TX CONTROL PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 15. Register 0x05 – eUSB2 TX CONTROL...continued

7 RSVD RAZ b'0 Reserved

Table 16. Register 0x06 – USB2 RX CONTROL PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 17. Register 0x07 – USB2 TX CONTROL 1 Figure 12 illustrates the difference between pre-emphasis and de-emphasis functions. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 12. Difference between pre-emphasis and de-emphasis functions transmit signal swing level. Table 18. De-emphasis level to USB2 Tx output swing level PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

6 USB2 FS rise/fall time RW b'1 This bit determines the FS Tx driver rise/fall time on USB2 pins

3 RSVD RAZ 0 Reserved

Table 19. Register 0x08 – USB2 TX CONTROL 2 Table 20. Register 0x09 – USB2 HS TERMINATION PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 21. Register 0x0A – USB2 HS DISCONNECT THRESHOLD the registers of the redriver. Table 22. Register 0x0D – RAP Signature BC 1.2 spec VDM_SRC definition).

0 VDX_Ctrl RW b'0 VDX Control - Host Side Repeater Function

detection of the next connection. Table 23. Register 0x0E – VDX_CONTROL PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

0x0F Device Status The register indicates the current state of repeater functionality. Table 24. Register 0x0F – DEVICE STATUS Table 25. Register 0x10 – LINK STATUS Rev ID is a read only register whose value never changes. Table 26. Register 0x13 – REVISION_ID PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 27. Register 0x14 – CHIP_ID_0 Table 28. Register 0x15 – CHIP_ID_1 Table 29. Register 0x16 – CHIP_ID_2 PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

10 Limiting values

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. occur, and all characteristics must still be met after the part is returned to recommended operating conditions. Min/Max values are based on all valid PVT ranges. In accordance with the Absolute Maximum Rating System (IEC 60134); all voltage values are with respect to network ground terminal. Table 30. Limiting values Discharge Association, Rome, NY, USA.

11 Recommended operating conditions

to internal voltage reference used by PTN3222 for determining the logic levels of SCL/SDA pins.

1.8 V voltage reference used for I2C pins

Table 31. Operating conditions PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

to internal voltage reference used by PTN3222 for determining the logic levels of SCL/SDA pins. Table 31. Operating conditions...continued [1] PTN3222 is simulated for functionality up to junction temperature of 125 °C, but it is not guaranteed to meet the power/current consumption specifications. Table 32. Thermal resistance application-specific environment.

12 Characteristics

12.1 Device characteristics

Table 33. Device characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

0 V to final value

Table 33. Device characteristics...continued

12.2 USB2 and eUSB2 characteristics

Table 34. USB2 and eUSB2 characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 34. USB2 and eUSB2 characteristics...continued PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

2 GHz frequency band

12.3 I2C dynamic/static characteristics

Table 35. Standard mode I2C characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 35. Standard mode I2C characteristics...continued Table 36. Fast mode I2C characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 36. Fast mode I2C characteristics...continued PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 13. Definition of timing for Fast/Standard mode devices on the I2C bus at 25 °C unless otherwise noted. Table 37. Fast mode plus I2C characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

at 25 °C unless otherwise noted. Table 37. Fast mode plus I2C characteristics...continued

12.4 ADDR pin characteristics

Table 38. ADDR characteristics

12.5 RST_N pin characteristics

Table 39. RST_N characteristics PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Table 39. RST_N characteristics...continued PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

13.1 SOT2063-1 (WLCSP12)

Figure 14. Package outline SOT2063-1 (WLCSP12) (1/5) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 15. Package outline SOT2063-1 (WLCSP12) (2/5) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 16. Package outline SOT2063-1 (WLCSP12) (3/5) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 17. Package outline SOT2063-1 (WLCSP12) (4/5) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 18. Package outline SOT2063-1 (WLCSP12) (5/5) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

13.2 SOT2074-1 (XQFN12)

Figure 19. Package outline SOT2074-1 (XQFN12) (1/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 20. Package outline SOT2074-1 (XQFN12) (2/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 21. Package outline SOT2074-1 (XQFN12) (3/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 22. Package outline SOT2074-1 (XQFN12) (4/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 23. Package outline SOT2074-1 (XQFN12) (5/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

Figure 24. Package outline SOT2074-1 (XQFN12) (6/6) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

13.3 UBM stack-up information

Figure 25. UBM stack-up Table 40. UBM stack-up parameters PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

14 Packing information

14.1.1 Dimensions and quantities

Table 41. Dimension and quantities

14.1.2 Product orientation

Figure 26. Product orientation in carrier tape PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

14.1.3 Carrier tape dimensions

Figure 27. Carrier tape dimensions

14.2 SOT2074-1 XQFN12 ; Reel NDP, SMD, 13" Q1 standard product orientation

14.2.1 Dimensions and quantities

Table 42. Dimension and quantities PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

14.2.2 Product orientation

Figure 28. Product orientation in carrier tape

14.2.3 Carrier tape dimensions

Figure 29. Carrier tape dimensions PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

15 Abbreviations

Table 43. Abbreviations PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.

NXP Semiconductors PTN3222 1-port eUSB2 to USB2 redriver

16 References

[1] UM10204 — I2C-bus specification and user manual, NXP Semiconductors [2] USB-IF organization document repository for eUSB2 specification — Embedded USB2 Physical Layer Supplement to USB Revision 2.0 specification, Revision 1.1, November 3, 2018 [3] USB-IF organization document repository for USB2 specification — Universal Serial Bus Specification, Rev 2.0, April 27, 2000 and approved ECNs as per USB2.0 document package release (usb_20_20190524.zip) [4] USB BC1.2 specification — USB Battery Charging (BC1.2) specification from USB-IF PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023

NXP Semiconductors PTN3222 1-port eUSB2 to USB2 redriver Document ID Release Date Data sheet status Change notice Supersedes PTN3222_CUK v1.2 20230811 Product 202307033I PTN3222_CUK v1.2 Modifications: • Figure 9, Figure 10, and Figure 11: Corrected "eUSB2" to "USB2" in right hand side connector; swapped position of VDD3V3 and VDD1V8 PTN3222_CUK v1.1 20221214 Product - PTN3222_CUK v1.0 PTN3222_CUK v1.0 20220817 Product - -

Revision history

PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023

NXP Semiconductors PTN3222 1-port eUSB2 to USB2 redriver

18 Legal information

18.1 Data sheet status

Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

18.2 Definitions

Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

18.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023

NXP Semiconductors PTN3222 1-port eUSB2 to USB2 redriver Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.

18.4 Trademarks

Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners. NXP — wordmark and logo are trademarks of NXP B.V. PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023

NXP Semiconductors PTN3222 1-port eUSB2 to USB2 redriver Tables Tab. 6. Status of design blocks in different power Tab. 18. De-emphasis level to USB2 Tx output Tab. 21. Register 0x0A – USB2 HS DISCONNECT Figures Fig. 2. PTN3222 WLCSP pinning (transparent top Fig. 3. PTN3222 QFN pinning (transparent top Fig. 12. Difference between pre-emphasis and de- Fig. 13. Definition of timing for Fast/Standard mode Fig. 14. Package outline SOT2063-1 (WLCSP12) Fig. 15. Package outline SOT2063-1 (WLCSP12) Fig. 16. Package outline SOT2063-1 (WLCSP12) Fig. 17. Package outline SOT2063-1 (WLCSP12) Fig. 18. Package outline SOT2063-1 (WLCSP12) Fig. 19. Package outline SOT2074-1 (XQFN12) Fig. 20. Package outline SOT2074-1 (XQFN12) Fig. 21. Package outline SOT2074-1 (XQFN12) Fig. 22. Package outline SOT2074-1 (XQFN12) Fig. 23. Package outline SOT2074-1 (XQFN12) Fig. 24. Package outline SOT2074-1 (XQFN12) PTN3222_CUK All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 1.2 — 11 August 2023